1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 3 4define i8 @test_int_x86_avx512_mask_cmp_ss(<4 x float> %a, float* %b, i8 %mask) { 5; CHECK-LABEL: test_int_x86_avx512_mask_cmp_ss: 6; CHECK: ## %bb.0: 7; CHECK-NEXT: kmovw %esi, %k1 8; CHECK-NEXT: vcmpunordss (%rdi), %xmm0, %k0 {%k1} 9; CHECK-NEXT: kmovw %k0, %eax 10; CHECK-NEXT: ## kill: def $al killed $al killed $eax 11; CHECK-NEXT: retq 12 %b.val = load float, float* %b 13 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0 14 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1 15 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2 16 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3 17 %res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %a, <4 x float> %bv, i32 3, i8 %mask, i32 4) 18 ret i8 %res2 19} 20declare i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float>, <4 x float>, i32, i8, i32) 21 22define <4 x float> @test_mask_max_ss(<4 x float> %a, float* %b, i8 %mask) { 23; CHECK-LABEL: test_mask_max_ss: 24; CHECK: ## %bb.0: 25; CHECK-NEXT: kmovw %esi, %k1 26; CHECK-NEXT: vmaxss (%rdi), %xmm0, %xmm0 {%k1} {z} 27; CHECK-NEXT: retq 28 %b.val = load float, float* %b 29 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0 30 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1 31 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2 32 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3 33 %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4) 34 ret <4 x float> %res 35} 36declare <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone 37 38define <4 x float> @test_maskz_add_ss(<4 x float> %a, float* %b, i8 %mask) { 39; CHECK-LABEL: test_maskz_add_ss: 40; CHECK: ## %bb.0: 41; CHECK-NEXT: kmovw %esi, %k1 42; CHECK-NEXT: vaddss (%rdi), %xmm0, %xmm0 {%k1} {z} 43; CHECK-NEXT: retq 44 %b.val = load float, float* %b 45 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0 46 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1 47 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2 48 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3 49 %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4) 50 ret <4 x float> %res 51} 52 53declare <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone 54 55declare <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32) 56 57define <2 x double> @test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %a, <2 x double> %b, double* %c, i8 %mask){ 58; CHECK-LABEL: test_int_x86_avx512_mask_vfmadd_sd: 59; CHECK: ## %bb.0: 60; CHECK-NEXT: kmovw %esi, %k1 61; CHECK-NEXT: vfmadd213sd (%rdi), %xmm1, %xmm0 {%k1} 62; CHECK-NEXT: retq 63 %c.val = load double, double* %c 64 %cv0 = insertelement <2 x double> undef, double %c.val, i32 0 65 %cv = insertelement <2 x double> %cv0, double 0.000000e+00, i32 1 66 %res = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %a, <2 x double> %b, <2 x double> %cv, i8 %mask, i32 4) 67 ret <2 x double> %res 68} 69 70; Test what happens when the load when we have multiple uses of the fadds DAG node via separate vselect nodes. 71; TODO: We shouldn't fold the load twice here. 72define <4 x float> @test_mask_add_ss_double_use(<4 x float> %a, float* %b, i8 %mask, <4 x float> %c) { 73; CHECK-LABEL: test_mask_add_ss_double_use: 74; CHECK: ## %bb.0: 75; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero 76; CHECK-NEXT: kmovw %esi, %k1 77; CHECK-NEXT: vaddss %xmm2, %xmm0, %xmm1 {%k1} 78; CHECK-NEXT: vaddss %xmm2, %xmm0, %xmm0 {%k1} {z} 79; CHECK-NEXT: vmulps %xmm0, %xmm1, %xmm0 80; CHECK-NEXT: retq 81 %b.val = load float, float* %b 82 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0 83 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1 84 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2 85 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3 86 %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> %c, i8 %mask, i32 4) 87 %res2 = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4) 88 %res3 = fmul <4 x float> %res, %res2 89 ret <4 x float> %res3 90} 91