1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512dq -mattr=+avx512vl| FileCheck %s 3 4define <8 x i1> @test(<2 x i1> %a) { 5; CHECK-LABEL: test: 6; CHECK: # %bb.0: 7; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0 8; CHECK-NEXT: vpmovq2m %xmm0, %k0 9; CHECK-NEXT: kshiftlb $2, %k0, %k0 10; CHECK-NEXT: vpmovm2w %k0, %xmm0 11; CHECK-NEXT: retq 12 %res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef> 13 ret <8 x i1> %res 14} 15 16define <8 x i1> @test1(<2 x i1> %a) { 17; CHECK-LABEL: test1: 18; CHECK: # %bb.0: 19; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0 20; CHECK-NEXT: vpmovq2m %xmm0, %k0 21; CHECK-NEXT: kshiftlb $4, %k0, %k0 22; CHECK-NEXT: vpmovm2w %k0, %xmm0 23; CHECK-NEXT: retq 24 %res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef> 25 ret <8 x i1> %res 26} 27 28define <8 x i1> @test2(<2 x i1> %a) { 29; CHECK-LABEL: test2: 30; CHECK: # %bb.0: 31; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0 32; CHECK-NEXT: vpmovq2m %xmm0, %k0 33; CHECK-NEXT: vpmovm2d %k0, %ymm0 34; CHECK-NEXT: vperm2i128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1] 35; CHECK-NEXT: vpmovd2m %ymm0, %k0 36; CHECK-NEXT: vpmovm2w %k0, %xmm0 37; CHECK-NEXT: vzeroupper 38; CHECK-NEXT: retq 39 %res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef> 40 ret <8 x i1> %res 41} 42 43define <8 x i1> @test3(<4 x i1> %a) { 44; CHECK-LABEL: test3: 45; CHECK: # %bb.0: 46; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 47; CHECK-NEXT: vpmovd2m %xmm0, %k0 48; CHECK-NEXT: vpmovm2w %k0, %xmm0 49; CHECK-NEXT: retq 50 51 %res = shufflevector <4 x i1> %a, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 52 ret <8 x i1> %res 53} 54 55define <8 x i1> @test4(<4 x i1> %a, <4 x i1>%b) { 56; CHECK-LABEL: test4: 57; CHECK: # %bb.0: 58; CHECK-NEXT: vpslld $31, %xmm1, %xmm1 59; CHECK-NEXT: vpmovd2m %xmm1, %k0 60; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 61; CHECK-NEXT: vpmovd2m %xmm0, %k1 62; CHECK-NEXT: kshiftlb $4, %k0, %k0 63; CHECK-NEXT: korb %k0, %k1, %k0 64; CHECK-NEXT: vpmovm2w %k0, %xmm0 65; CHECK-NEXT: retq 66 67 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 68 ret <8 x i1> %res 69} 70 71define <4 x i1> @test5(<2 x i1> %a, <2 x i1>%b) { 72; CHECK-LABEL: test5: 73; CHECK: # %bb.0: 74; CHECK-NEXT: vpsllq $63, %xmm1, %xmm1 75; CHECK-NEXT: vpmovq2m %xmm1, %k0 76; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0 77; CHECK-NEXT: vpmovq2m %xmm0, %k1 78; CHECK-NEXT: kshiftlb $2, %k0, %k0 79; CHECK-NEXT: korb %k0, %k1, %k0 80; CHECK-NEXT: vpmovm2d %k0, %xmm0 81; CHECK-NEXT: retq 82 83 %res = shufflevector <2 x i1> %a, <2 x i1> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 84 ret <4 x i1> %res 85} 86 87define <16 x i1> @test6(<2 x i1> %a, <2 x i1>%b) { 88; CHECK-LABEL: test6: 89; CHECK: # %bb.0: 90; CHECK-NEXT: vpsllq $63, %xmm1, %xmm1 91; CHECK-NEXT: vpmovq2m %xmm1, %k0 92; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0 93; CHECK-NEXT: vpmovq2m %xmm0, %k1 94; CHECK-NEXT: kshiftlb $2, %k0, %k0 95; CHECK-NEXT: korb %k0, %k1, %k0 96; CHECK-NEXT: vpmovm2b %k0, %xmm0 97; CHECK-NEXT: retq 98 99 %res = shufflevector <2 x i1> %a, <2 x i1> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 100 ret <16 x i1> %res 101} 102 103define <32 x i1> @test7(<4 x i1> %a, <4 x i1>%b) { 104; CHECK-LABEL: test7: 105; CHECK: # %bb.0: 106; CHECK-NEXT: vpslld $31, %xmm1, %xmm1 107; CHECK-NEXT: vpmovd2m %xmm1, %k0 108; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 109; CHECK-NEXT: vpmovd2m %xmm0, %k1 110; CHECK-NEXT: kshiftlb $4, %k0, %k0 111; CHECK-NEXT: korb %k0, %k1, %k0 112; CHECK-NEXT: vpmovm2b %k0, %ymm0 113; CHECK-NEXT: retq 114 115 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 116 ret <32 x i1> %res 117} 118 119define <64 x i1> @test8(<8 x i1> %a, <8 x i1>%b) { 120; CHECK-LABEL: test8: 121; CHECK: # %bb.0: 122; CHECK-NEXT: vpsllw $15, %xmm1, %xmm1 123; CHECK-NEXT: vpmovw2m %xmm1, %k0 124; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 125; CHECK-NEXT: vpmovw2m %xmm0, %k1 126; CHECK-NEXT: kunpckdq %k1, %k0, %k0 127; CHECK-NEXT: vpmovm2b %k0, %zmm0 128; CHECK-NEXT: retq 129 130 %res = shufflevector <8 x i1> %a, <8 x i1> %b, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 131 ret <64 x i1> %res 132} 133 134define <4 x i1> @test9(<8 x i1> %a, <8 x i1> %b) { 135; CHECK-LABEL: test9: 136; CHECK: # %bb.0: 137; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 138; CHECK-NEXT: vpmovw2m %xmm0, %k0 139; CHECK-NEXT: kshiftrb $4, %k0, %k0 140; CHECK-NEXT: vpmovm2d %k0, %xmm0 141; CHECK-NEXT: retq 142 %res = shufflevector <8 x i1> %a, <8 x i1> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 7> 143 ret <4 x i1> %res 144} 145 146define <2 x i1> @test10(<4 x i1> %a, <4 x i1> %b) { 147; CHECK-LABEL: test10: 148; CHECK: # %bb.0: 149; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 150; CHECK-NEXT: vpmovd2m %xmm0, %k0 151; CHECK-NEXT: kshiftrb $2, %k0, %k0 152; CHECK-NEXT: vpmovm2q %k0, %xmm0 153; CHECK-NEXT: retq 154 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <2 x i32> <i32 2, i32 3> 155 ret <2 x i1> %res 156} 157 158define <8 x i1> @test11(<4 x i1> %a, <4 x i1>%b) { 159; CHECK-LABEL: test11: 160; CHECK: # %bb.0: 161; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 162; CHECK-NEXT: vpmovd2m %xmm0, %k0 163; CHECK-NEXT: kshiftlb $4, %k0, %k0 164; CHECK-NEXT: vpmovm2w %k0, %xmm0 165; CHECK-NEXT: retq 166 %res = shufflevector <4 x i1> %a, <4 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3> 167 ret <8 x i1> %res 168} 169