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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
3
4; Verify that the backend correctly combines AVX2 builtin intrinsics.
5
6
7define <16 x i16> @test_x86_avx2_pblendw(<16 x i16> %a0) {
8; CHECK-LABEL: test_x86_avx2_pblendw:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    retq
11  %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a0, i32 7)
12  ret <16 x i16> %res
13}
14
15define <4 x i32> @test_x86_avx2_pblendd_128(<4 x i32> %a0) {
16; CHECK-LABEL: test_x86_avx2_pblendd_128:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    retq
19  %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a0, i32 7)
20  ret <4 x i32> %res
21}
22
23define <8 x i32> @test_x86_avx2_pblendd_256(<8 x i32> %a0) {
24; CHECK-LABEL: test_x86_avx2_pblendd_256:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    retq
27  %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a0, i32 7)
28  ret <8 x i32> %res
29}
30
31define <16 x i16> @test2_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) {
32; CHECK-LABEL: test2_x86_avx2_pblendw:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    retq
35  %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i32 0)
36  ret <16 x i16> %res
37}
38
39define <4 x i32> @test2_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) {
40; CHECK-LABEL: test2_x86_avx2_pblendd_128:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    retq
43  %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 0)
44  ret <4 x i32> %res
45}
46
47define <8 x i32> @test2_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) {
48; CHECK-LABEL: test2_x86_avx2_pblendd_256:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    retq
51  %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 0)
52  ret <8 x i32> %res
53}
54
55define <16 x i16> @test3_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) {
56; CHECK-LABEL: test3_x86_avx2_pblendw:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    vmovaps %ymm1, %ymm0
59; CHECK-NEXT:    retq
60  %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i32 -1)
61  ret <16 x i16> %res
62}
63
64define <4 x i32> @test3_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) {
65; CHECK-LABEL: test3_x86_avx2_pblendd_128:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    vmovaps %xmm1, %xmm0
68; CHECK-NEXT:    retq
69  %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 -1)
70  ret <4 x i32> %res
71}
72
73define <8 x i32> @test3_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) {
74; CHECK-LABEL: test3_x86_avx2_pblendd_256:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    vmovaps %ymm1, %ymm0
77; CHECK-NEXT:    retq
78  %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 -1)
79  ret <8 x i32> %res
80}
81
82declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i32)
83declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i32)
84declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i32)
85
86