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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -enable-unsafe-fp-math -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s
3
4
5; rdar://13126763
6; Expression "x + x*x" was mistakenly transformed into "x * 3.0f".
7
8define float @test1(float %x) {
9; CHECK-LABEL: test1:
10; CHECK:       ## %bb.0:
11; CHECK-NEXT:    vmulss %xmm0, %xmm0, %xmm1
12; CHECK-NEXT:    vaddss %xmm0, %xmm1, %xmm0
13; CHECK-NEXT:    retq
14  %t1 = fmul fast float %x, %x
15  %t2 = fadd fast float %t1, %x
16  ret float %t2
17}
18
19; (x + x) + x => x * 3.0
20define float @test2(float %x) {
21; CHECK-LABEL: test2:
22; CHECK:       ## %bb.0:
23; CHECK-NEXT:    vmulss {{.*}}(%rip), %xmm0, %xmm0
24; CHECK-NEXT:    retq
25  %t1 = fadd fast float %x, %x
26  %t2 = fadd fast float %t1, %x
27  ret float %t2
28}
29
30; x + (x + x) => x * 3.0
31define float @test3(float %x) {
32; CHECK-LABEL: test3:
33; CHECK:       ## %bb.0:
34; CHECK-NEXT:    vmulss {{.*}}(%rip), %xmm0, %xmm0
35; CHECK-NEXT:    retq
36  %t1 = fadd fast float %x, %x
37  %t2 = fadd fast float %x, %t1
38  ret float %t2
39}
40
41; (y + x) + x != x * 3.0
42define float @test4(float %x, float %y) {
43; CHECK-LABEL: test4:
44; CHECK:       ## %bb.0:
45; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm1
46; CHECK-NEXT:    vaddss %xmm0, %xmm1, %xmm0
47; CHECK-NEXT:    retq
48  %t1 = fadd fast float %x, %y
49  %t2 = fadd fast float %t1, %x
50  ret float %t2
51}
52
53; rdar://13445387
54; "x + x + x => 3.0 * x" should be disabled after legalization because
55; Instruction-Selection doesn't know how to handle "3.0"
56;
57define float @test5(<4 x float> %x) {
58; CHECK-LABEL: test5:
59; CHECK:       ## %bb.0:
60; CHECK-NEXT:    vmulss {{.*}}(%rip), %xmm0, %xmm0
61; CHECK-NEXT:    retq
62  %splat = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> zeroinitializer
63  %v1 = extractelement <4 x float> %splat, i32 1
64  %v0 = extractelement <4 x float> %splat, i32 0
65  %add1 = fadd float %v0, %v1
66  %v2 = extractelement <4 x float> %splat, i32 2
67  %add2 = fadd float %v2, %add1
68  ret float %add2
69}
70
71