1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass x86-domain-reassignment -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq -o - %s | FileCheck %s 3--- | 4 ; ModuleID = '../test/CodeGen/X86/gpr-to-mask.ll' 5 source_filename = "../test/CodeGen/X86/gpr-to-mask.ll" 6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 7 target triple = "x86_64-unknown-unknown" 8 9 define void @test_fcmp_storefloat(i1 %cond, float* %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) #0 { 10 entry: 11 br i1 %cond, label %if, label %else 12 13 if: ; preds = %entry 14 %cmp1 = fcmp oeq float %f3, %f4 15 br label %exit 16 17 else: ; preds = %entry 18 %cmp2 = fcmp oeq float %f5, %f6 19 br label %exit 20 21 exit: ; preds = %else, %if 22 %val = phi i1 [ %cmp1, %if ], [ %cmp2, %else ] 23 %selected = select i1 %val, float %f1, float %f2 24 store float %selected, float* %fptr 25 ret void 26 } 27 28 define void @test_8bitops() #0 { 29 ret void 30 } 31 define void @test_16bitops() #0 { 32 ret void 33 } 34 define void @test_32bitops() #0 { 35 ret void 36 } 37 define void @test_64bitops() #0 { 38 ret void 39 } 40 define void @test_16bitext() #0 { 41 ret void 42 } 43 define void @test_32bitext() #0 { 44 ret void 45 } 46 define void @test_64bitext() #0 { 47 ret void 48 } 49... 50--- 51name: test_fcmp_storefloat 52alignment: 4 53exposesReturnsTwice: false 54legalized: false 55regBankSelected: false 56selected: false 57tracksRegLiveness: true 58registers: 59 - { id: 0, class: gr8, preferred-register: '' } 60 - { id: 1, class: gr8, preferred-register: '' } 61 - { id: 2, class: gr8, preferred-register: '' } 62 - { id: 3, class: gr32, preferred-register: '' } 63 - { id: 4, class: gr64, preferred-register: '' } 64 - { id: 5, class: vr128x, preferred-register: '' } 65 - { id: 6, class: fr32x, preferred-register: '' } 66 - { id: 7, class: fr32x, preferred-register: '' } 67 - { id: 8, class: fr32x, preferred-register: '' } 68 - { id: 9, class: fr32x, preferred-register: '' } 69 - { id: 10, class: fr32x, preferred-register: '' } 70 - { id: 11, class: gr8, preferred-register: '' } 71 - { id: 12, class: vk1, preferred-register: '' } 72 - { id: 13, class: gr32, preferred-register: '' } 73 - { id: 14, class: vk1, preferred-register: '' } 74 - { id: 15, class: gr32, preferred-register: '' } 75 - { id: 16, class: gr32, preferred-register: '' } 76 - { id: 17, class: gr32, preferred-register: '' } 77 - { id: 18, class: vk1wm, preferred-register: '' } 78 - { id: 19, class: vr128x, preferred-register: '' } 79 - { id: 20, class: vr128, preferred-register: '' } 80 - { id: 21, class: vr128, preferred-register: '' } 81 - { id: 22, class: fr32x, preferred-register: '' } 82liveins: 83 - { reg: '$edi', virtual-reg: '%3' } 84 - { reg: '$rsi', virtual-reg: '%4' } 85 - { reg: '$xmm0', virtual-reg: '%5' } 86 - { reg: '$xmm1', virtual-reg: '%6' } 87 - { reg: '$xmm2', virtual-reg: '%7' } 88 - { reg: '$xmm3', virtual-reg: '%8' } 89 - { reg: '$xmm4', virtual-reg: '%9' } 90 - { reg: '$xmm5', virtual-reg: '%10' } 91frameInfo: 92 isFrameAddressTaken: false 93 isReturnAddressTaken: false 94 hasStackMap: false 95 hasPatchPoint: false 96 stackSize: 0 97 offsetAdjustment: 0 98 maxAlignment: 0 99 adjustsStack: false 100 hasCalls: false 101 stackProtector: '' 102 maxCallFrameSize: 4294967295 103 hasOpaqueSPAdjustment: false 104 hasVAStart: false 105 hasMustTailInVarArgFunc: false 106 savePoint: '' 107 restorePoint: '' 108fixedStack: 109stack: 110constants: 111body: | 112 ; CHECK-LABEL: name: test_fcmp_storefloat 113 ; CHECK: bb.0.entry: 114 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 115 ; CHECK: liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5 116 ; CHECK: [[COPY:%[0-9]+]]:fr32x = COPY $xmm5 117 ; CHECK: [[COPY1:%[0-9]+]]:fr32x = COPY $xmm4 118 ; CHECK: [[COPY2:%[0-9]+]]:fr32x = COPY $xmm3 119 ; CHECK: [[COPY3:%[0-9]+]]:fr32x = COPY $xmm2 120 ; CHECK: [[COPY4:%[0-9]+]]:fr32x = COPY $xmm1 121 ; CHECK: [[COPY5:%[0-9]+]]:vr128x = COPY $xmm0 122 ; CHECK: [[COPY6:%[0-9]+]]:gr64 = COPY $rsi 123 ; CHECK: [[COPY7:%[0-9]+]]:gr32 = COPY $edi 124 ; CHECK: [[COPY8:%[0-9]+]]:gr8 = COPY [[COPY7]].sub_8bit 125 ; CHECK: TEST8ri killed [[COPY8]], 1, implicit-def $eflags 126 ; CHECK: JE_1 %bb.2, implicit $eflags 127 ; CHECK: JMP_1 %bb.1 128 ; CHECK: bb.1.if: 129 ; CHECK: successors: %bb.3(0x80000000) 130 ; CHECK: [[VCMPSSZrr:%[0-9]+]]:vk1 = VCMPSSZrr [[COPY3]], [[COPY2]], 0 131 ; CHECK: [[COPY9:%[0-9]+]]:vk32 = COPY [[VCMPSSZrr]] 132 ; CHECK: [[COPY10:%[0-9]+]]:vk8 = COPY [[COPY9]] 133 ; CHECK: JMP_1 %bb.3 134 ; CHECK: bb.2.else: 135 ; CHECK: successors: %bb.3(0x80000000) 136 ; CHECK: [[VCMPSSZrr1:%[0-9]+]]:vk1 = VCMPSSZrr [[COPY1]], [[COPY]], 0 137 ; CHECK: [[COPY11:%[0-9]+]]:vk32 = COPY [[VCMPSSZrr1]] 138 ; CHECK: [[COPY12:%[0-9]+]]:vk8 = COPY [[COPY11]] 139 ; CHECK: bb.3.exit: 140 ; CHECK: [[PHI:%[0-9]+]]:vk8 = PHI [[COPY12]], %bb.2, [[COPY10]], %bb.1 141 ; CHECK: [[COPY13:%[0-9]+]]:vk32 = COPY [[PHI]] 142 ; CHECK: [[COPY14:%[0-9]+]]:vk1wm = COPY [[COPY13]] 143 ; CHECK: [[COPY15:%[0-9]+]]:vr128x = COPY [[COPY4]] 144 ; CHECK: [[DEF:%[0-9]+]]:vr128 = IMPLICIT_DEF 145 ; CHECK: [[VMOVSSZrrk:%[0-9]+]]:vr128 = VMOVSSZrrk [[COPY15]], killed [[COPY14]], killed [[DEF]], [[COPY5]] 146 ; CHECK: [[COPY16:%[0-9]+]]:fr32x = COPY [[VMOVSSZrrk]] 147 ; CHECK: VMOVSSZmr [[COPY6]], 1, $noreg, 0, $noreg, killed [[COPY16]] :: (store 4 into %ir.fptr) 148 ; CHECK: RET 0 149 bb.0.entry: 150 successors: %bb.1(0x40000000), %bb.2(0x40000000) 151 liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5 152 153 %10 = COPY $xmm5 154 %9 = COPY $xmm4 155 %8 = COPY $xmm3 156 %7 = COPY $xmm2 157 %6 = COPY $xmm1 158 %5 = COPY $xmm0 159 %4 = COPY $rsi 160 %3 = COPY $edi 161 %11 = COPY %3.sub_8bit 162 TEST8ri killed %11, 1, implicit-def $eflags 163 JE_1 %bb.2, implicit $eflags 164 JMP_1 %bb.1 165 166 bb.1.if: 167 successors: %bb.3(0x80000000) 168 169 %14 = VCMPSSZrr %7, %8, 0 170 171 ; check that cross domain copies are replaced with same domain copies. 172 173 %15 = COPY %14 174 %0 = COPY %15.sub_8bit 175 JMP_1 %bb.3 176 177 bb.2.else: 178 successors: %bb.3(0x80000000) 179 %12 = VCMPSSZrr %9, %10, 0 180 181 ; check that cross domain copies are replaced with same domain copies. 182 183 %13 = COPY %12 184 %1 = COPY %13.sub_8bit 185 186 bb.3.exit: 187 188 ; check PHI, IMPLICIT_DEF, and INSERT_SUBREG replacers. 189 190 %2 = PHI %1, %bb.2, %0, %bb.1 191 %17 = IMPLICIT_DEF 192 %16 = INSERT_SUBREG %17, %2, 1 193 %18 = COPY %16 194 %19 = COPY %6 195 %21 = IMPLICIT_DEF 196 %20 = VMOVSSZrrk %19, killed %18, killed %21, %5 197 %22 = COPY %20 198 VMOVSSZmr %4, 1, $noreg, 0, $noreg, killed %22 :: (store 4 into %ir.fptr) 199 RET 0 200 201... 202--- 203name: test_8bitops 204alignment: 4 205exposesReturnsTwice: false 206legalized: false 207regBankSelected: false 208selected: false 209tracksRegLiveness: true 210registers: 211 - { id: 0, class: gr64, preferred-register: '' } 212 - { id: 1, class: vr512, preferred-register: '' } 213 - { id: 2, class: vr512, preferred-register: '' } 214 - { id: 3, class: vr512, preferred-register: '' } 215 - { id: 4, class: vr512, preferred-register: '' } 216 - { id: 5, class: vk8, preferred-register: '' } 217 - { id: 6, class: gr32, preferred-register: '' } 218 - { id: 7, class: gr8, preferred-register: '' } 219 - { id: 8, class: gr32, preferred-register: '' } 220 - { id: 9, class: gr32, preferred-register: '' } 221 - { id: 10, class: vk8wm, preferred-register: '' } 222 - { id: 11, class: vr512, preferred-register: '' } 223 - { id: 12, class: gr8, preferred-register: '' } 224 - { id: 13, class: gr8, preferred-register: '' } 225 - { id: 14, class: gr8, preferred-register: '' } 226 - { id: 15, class: gr8, preferred-register: '' } 227 - { id: 16, class: gr8, preferred-register: '' } 228 - { id: 17, class: gr8, preferred-register: '' } 229 - { id: 18, class: gr8, preferred-register: '' } 230liveins: 231 - { reg: '$rdi', virtual-reg: '%0' } 232 - { reg: '$zmm0', virtual-reg: '%1' } 233 - { reg: '$zmm1', virtual-reg: '%2' } 234 - { reg: '$zmm2', virtual-reg: '%3' } 235 - { reg: '$zmm3', virtual-reg: '%4' } 236frameInfo: 237 isFrameAddressTaken: false 238 isReturnAddressTaken: false 239 hasStackMap: false 240 hasPatchPoint: false 241 stackSize: 0 242 offsetAdjustment: 0 243 maxAlignment: 0 244 adjustsStack: false 245 hasCalls: false 246 stackProtector: '' 247 maxCallFrameSize: 4294967295 248 hasOpaqueSPAdjustment: false 249 hasVAStart: false 250 hasMustTailInVarArgFunc: false 251 savePoint: '' 252 restorePoint: '' 253fixedStack: 254stack: 255constants: 256body: | 257 ; CHECK-LABEL: name: test_8bitops 258 ; CHECK: bb.0: 259 ; CHECK: successors: %bb.1(0x80000000) 260 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 261 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 262 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 263 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 264 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2 265 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3 266 ; CHECK: [[VCMPPDZrri:%[0-9]+]]:vk8 = VCMPPDZrri [[COPY3]], [[COPY4]], 0 267 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPDZrri]] 268 ; CHECK: [[COPY6:%[0-9]+]]:vk8 = COPY [[COPY5]] 269 ; CHECK: [[KSHIFTRBri:%[0-9]+]]:vk8 = KSHIFTRBri [[COPY6]], 2 270 ; CHECK: [[KSHIFTLBri:%[0-9]+]]:vk8 = KSHIFTLBri [[KSHIFTRBri]], 1 271 ; CHECK: [[KNOTBrr:%[0-9]+]]:vk8 = KNOTBrr [[KSHIFTLBri]] 272 ; CHECK: [[KORBrr:%[0-9]+]]:vk8 = KORBrr [[KNOTBrr]], [[KSHIFTRBri]] 273 ; CHECK: [[KANDBrr:%[0-9]+]]:vk8 = KANDBrr [[KORBrr]], [[KSHIFTLBri]] 274 ; CHECK: [[KXORBrr:%[0-9]+]]:vk8 = KXORBrr [[KANDBrr]], [[KSHIFTRBri]] 275 ; CHECK: [[KADDBrr:%[0-9]+]]:vk8 = KADDBrr [[KXORBrr]], [[KNOTBrr]] 276 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KADDBrr]] 277 ; CHECK: [[COPY8:%[0-9]+]]:vk8wm = COPY [[COPY7]] 278 ; CHECK: [[VMOVAPDZrrk:%[0-9]+]]:vr512 = VMOVAPDZrrk [[COPY2]], killed [[COPY8]], [[COPY1]] 279 ; CHECK: VMOVAPDZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPDZrrk]] 280 ; CHECK: bb.1: 281 ; CHECK: successors: %bb.2(0x80000000) 282 ; CHECK: bb.2: 283 ; CHECK: RET 0 284 bb.0: 285 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 286 287 %0 = COPY $rdi 288 %1 = COPY $zmm0 289 %2 = COPY $zmm1 290 %3 = COPY $zmm2 291 %4 = COPY $zmm3 292 293 %5 = VCMPPDZrri %3, %4, 0 294 %6 = COPY %5 295 %7 = COPY %6.sub_8bit 296 297 %12 = SHR8ri %7, 2, implicit-def dead $eflags 298 %13 = SHL8ri %12, 1, implicit-def dead $eflags 299 %14 = NOT8r %13 300 %15 = OR8rr %14, %12, implicit-def dead $eflags 301 %16 = AND8rr %15, %13, implicit-def dead $eflags 302 %17 = XOR8rr %16, %12, implicit-def dead $eflags 303 %18 = ADD8rr %17, %14, implicit-def dead $eflags 304 305 %8 = IMPLICIT_DEF 306 %9 = INSERT_SUBREG %8, %18, 1 307 %10 = COPY %9 308 %11 = VMOVAPDZrrk %2, killed %10, %1 309 VMOVAPDZmr %0, 1, $noreg, 0, $noreg, killed %11 310 311 ; FIXME We can't replace TEST with KTEST due to flag differences 312 ; TEST8rr %18, %18, implicit-def $eflags 313 ; JE_1 %bb.1, implicit $eflags 314 ; JMP_1 %bb.2 315 316 bb.1: 317 318 bb.2: 319 RET 0 320 321... 322--- 323name: test_16bitops 324alignment: 4 325exposesReturnsTwice: false 326legalized: false 327regBankSelected: false 328selected: false 329tracksRegLiveness: true 330registers: 331 - { id: 0, class: gr64, preferred-register: '' } 332 - { id: 1, class: vr512, preferred-register: '' } 333 - { id: 2, class: vr512, preferred-register: '' } 334 - { id: 3, class: vr512, preferred-register: '' } 335 - { id: 4, class: vr512, preferred-register: '' } 336 - { id: 5, class: vk16, preferred-register: '' } 337 - { id: 6, class: gr32, preferred-register: '' } 338 - { id: 7, class: gr16, preferred-register: '' } 339 - { id: 8, class: gr32, preferred-register: '' } 340 - { id: 9, class: gr32, preferred-register: '' } 341 - { id: 10, class: vk16wm, preferred-register: '' } 342 - { id: 11, class: vr512, preferred-register: '' } 343 - { id: 12, class: gr16, preferred-register: '' } 344 - { id: 13, class: gr16, preferred-register: '' } 345 - { id: 14, class: gr16, preferred-register: '' } 346 - { id: 15, class: gr16, preferred-register: '' } 347 - { id: 16, class: gr16, preferred-register: '' } 348 - { id: 17, class: gr16, preferred-register: '' } 349liveins: 350 - { reg: '$rdi', virtual-reg: '%0' } 351 - { reg: '$zmm0', virtual-reg: '%1' } 352 - { reg: '$zmm1', virtual-reg: '%2' } 353 - { reg: '$zmm2', virtual-reg: '%3' } 354 - { reg: '$zmm3', virtual-reg: '%4' } 355frameInfo: 356 isFrameAddressTaken: false 357 isReturnAddressTaken: false 358 hasStackMap: false 359 hasPatchPoint: false 360 stackSize: 0 361 offsetAdjustment: 0 362 maxAlignment: 0 363 adjustsStack: false 364 hasCalls: false 365 stackProtector: '' 366 maxCallFrameSize: 4294967295 367 hasOpaqueSPAdjustment: false 368 hasVAStart: false 369 hasMustTailInVarArgFunc: false 370 savePoint: '' 371 restorePoint: '' 372fixedStack: 373stack: 374constants: 375body: | 376 ; CHECK-LABEL: name: test_16bitops 377 ; CHECK: bb.0: 378 ; CHECK: successors: %bb.1(0x80000000) 379 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 380 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 381 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 382 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 383 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2 384 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3 385 ; CHECK: [[VCMPPSZrri:%[0-9]+]]:vk16 = VCMPPSZrri [[COPY3]], [[COPY4]], 0 386 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPSZrri]] 387 ; CHECK: [[COPY6:%[0-9]+]]:vk16 = COPY [[COPY5]] 388 ; CHECK: [[KSHIFTRWri:%[0-9]+]]:vk16 = KSHIFTRWri [[COPY6]], 2 389 ; CHECK: [[KSHIFTLWri:%[0-9]+]]:vk16 = KSHIFTLWri [[KSHIFTRWri]], 1 390 ; CHECK: [[KNOTWrr:%[0-9]+]]:vk16 = KNOTWrr [[KSHIFTLWri]] 391 ; CHECK: [[KORWrr:%[0-9]+]]:vk16 = KORWrr [[KNOTWrr]], [[KSHIFTRWri]] 392 ; CHECK: [[KANDWrr:%[0-9]+]]:vk16 = KANDWrr [[KORWrr]], [[KSHIFTLWri]] 393 ; CHECK: [[KXORWrr:%[0-9]+]]:vk16 = KXORWrr [[KANDWrr]], [[KSHIFTRWri]] 394 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KXORWrr]] 395 ; CHECK: [[COPY8:%[0-9]+]]:vk16wm = COPY [[COPY7]] 396 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY8]], [[COPY1]] 397 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]] 398 ; CHECK: bb.1: 399 ; CHECK: successors: %bb.2(0x80000000) 400 ; CHECK: bb.2: 401 ; CHECK: RET 0 402 bb.0: 403 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 404 405 %0 = COPY $rdi 406 %1 = COPY $zmm0 407 %2 = COPY $zmm1 408 %3 = COPY $zmm2 409 %4 = COPY $zmm3 410 411 %5 = VCMPPSZrri %3, %4, 0 412 %6 = COPY %5 413 %7 = COPY %6.sub_16bit 414 415 %12 = SHR16ri %7, 2, implicit-def dead $eflags 416 %13 = SHL16ri %12, 1, implicit-def dead $eflags 417 %14 = NOT16r %13 418 %15 = OR16rr %14, %12, implicit-def dead $eflags 419 %16 = AND16rr %15, %13, implicit-def dead $eflags 420 %17 = XOR16rr %16, %12, implicit-def dead $eflags 421 422 %8 = IMPLICIT_DEF 423 %9 = INSERT_SUBREG %8, %17, 3 424 %10 = COPY %9 425 %11 = VMOVAPSZrrk %2, killed %10, %1 426 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %11 427 428 ; FIXME We can't replace TEST with KTEST due to flag differences 429 ; FIXME TEST16rr %17, %17, implicit-def $eflags 430 ; FIXME JE_1 %bb.1, implicit $eflags 431 ; FIXME JMP_1 %bb.2 432 433 bb.1: 434 435 bb.2: 436 RET 0 437 438... 439--- 440name: test_32bitops 441alignment: 4 442exposesReturnsTwice: false 443legalized: false 444regBankSelected: false 445selected: false 446tracksRegLiveness: true 447registers: 448 - { id: 0, class: gr64, preferred-register: '' } 449 - { id: 1, class: vr512, preferred-register: '' } 450 - { id: 2, class: vr512, preferred-register: '' } 451 - { id: 3, class: vk32wm, preferred-register: '' } 452 - { id: 4, class: vr512, preferred-register: '' } 453 - { id: 5, class: gr32, preferred-register: '' } 454 - { id: 6, class: gr32, preferred-register: '' } 455 - { id: 7, class: gr32, preferred-register: '' } 456 - { id: 8, class: gr32, preferred-register: '' } 457 - { id: 9, class: gr32, preferred-register: '' } 458 - { id: 10, class: gr32, preferred-register: '' } 459 - { id: 11, class: gr32, preferred-register: '' } 460 - { id: 12, class: gr32, preferred-register: '' } 461 - { id: 13, class: gr32, preferred-register: '' } 462liveins: 463 - { reg: '$rdi', virtual-reg: '%0' } 464 - { reg: '$zmm0', virtual-reg: '%1' } 465 - { reg: '$zmm1', virtual-reg: '%2' } 466frameInfo: 467 isFrameAddressTaken: false 468 isReturnAddressTaken: false 469 hasStackMap: false 470 hasPatchPoint: false 471 stackSize: 0 472 offsetAdjustment: 0 473 maxAlignment: 0 474 adjustsStack: false 475 hasCalls: false 476 stackProtector: '' 477 maxCallFrameSize: 4294967295 478 hasOpaqueSPAdjustment: false 479 hasVAStart: false 480 hasMustTailInVarArgFunc: false 481 savePoint: '' 482 restorePoint: '' 483fixedStack: 484stack: 485constants: 486body: | 487 ; CHECK-LABEL: name: test_32bitops 488 ; CHECK: bb.0: 489 ; CHECK: successors: %bb.1(0x80000000) 490 ; CHECK: liveins: $rdi, $zmm0, $zmm1 491 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 492 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 493 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 494 ; CHECK: [[KMOVDkm:%[0-9]+]]:vk32 = KMOVDkm [[COPY]], 1, $noreg, 0, $noreg 495 ; CHECK: [[KSHIFTRDri:%[0-9]+]]:vk32 = KSHIFTRDri [[KMOVDkm]], 2 496 ; CHECK: [[KSHIFTLDri:%[0-9]+]]:vk32 = KSHIFTLDri [[KSHIFTRDri]], 1 497 ; CHECK: [[KNOTDrr:%[0-9]+]]:vk32 = KNOTDrr [[KSHIFTLDri]] 498 ; CHECK: [[KORDrr:%[0-9]+]]:vk32 = KORDrr [[KNOTDrr]], [[KSHIFTRDri]] 499 ; CHECK: [[KANDDrr:%[0-9]+]]:vk32 = KANDDrr [[KORDrr]], [[KSHIFTLDri]] 500 ; CHECK: [[KXORDrr:%[0-9]+]]:vk32 = KXORDrr [[KANDDrr]], [[KSHIFTRDri]] 501 ; CHECK: [[KANDNDrr:%[0-9]+]]:vk32 = KANDNDrr [[KXORDrr]], [[KORDrr]] 502 ; CHECK: [[KADDDrr:%[0-9]+]]:vk32 = KADDDrr [[KANDNDrr]], [[KXORDrr]] 503 ; CHECK: [[COPY3:%[0-9]+]]:vk32wm = COPY [[KADDDrr]] 504 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]] 505 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]] 506 ; CHECK: bb.1: 507 ; CHECK: successors: %bb.2(0x80000000) 508 ; CHECK: bb.2: 509 ; CHECK: RET 0 510 bb.0: 511 liveins: $rdi, $zmm0, $zmm1 512 513 %0 = COPY $rdi 514 %1 = COPY $zmm0 515 %2 = COPY $zmm1 516 517 %5 = MOV32rm %0, 1, $noreg, 0, $noreg 518 %6 = SHR32ri %5, 2, implicit-def dead $eflags 519 %7 = SHL32ri %6, 1, implicit-def dead $eflags 520 %8 = NOT32r %7 521 %9 = OR32rr %8, %6, implicit-def dead $eflags 522 %10 = AND32rr %9, %7, implicit-def dead $eflags 523 %11 = XOR32rr %10, %6, implicit-def dead $eflags 524 %12 = ANDN32rr %11, %9, implicit-def dead $eflags 525 %13 = ADD32rr %12, %11, implicit-def dead $eflags 526 527 %3 = COPY %13 528 %4 = VMOVDQU16Zrrk %2, killed %3, %1 529 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 530 531 ; FIXME We can't replace TEST with KTEST due to flag differences 532 ; FIXME TEST32rr %13, %13, implicit-def $eflags 533 ; FIXME JE_1 %bb.1, implicit $eflags 534 ; FIXME JMP_1 %bb.2 535 536 bb.1: 537 538 bb.2: 539 RET 0 540 541... 542--- 543name: test_64bitops 544alignment: 4 545exposesReturnsTwice: false 546legalized: false 547regBankSelected: false 548selected: false 549tracksRegLiveness: true 550registers: 551 - { id: 0, class: gr64, preferred-register: '' } 552 - { id: 1, class: vr512, preferred-register: '' } 553 - { id: 2, class: vr512, preferred-register: '' } 554 - { id: 3, class: vk64wm, preferred-register: '' } 555 - { id: 4, class: vr512, preferred-register: '' } 556 - { id: 5, class: gr64, preferred-register: '' } 557 - { id: 6, class: gr64, preferred-register: '' } 558 - { id: 7, class: gr64, preferred-register: '' } 559 - { id: 8, class: gr64, preferred-register: '' } 560 - { id: 9, class: gr64, preferred-register: '' } 561 - { id: 10, class: gr64, preferred-register: '' } 562 - { id: 11, class: gr64, preferred-register: '' } 563 - { id: 12, class: gr64, preferred-register: '' } 564 - { id: 13, class: gr64, preferred-register: '' } 565liveins: 566 - { reg: '$rdi', virtual-reg: '%0' } 567 - { reg: '$zmm0', virtual-reg: '%1' } 568 - { reg: '$zmm1', virtual-reg: '%2' } 569frameInfo: 570 isFrameAddressTaken: false 571 isReturnAddressTaken: false 572 hasStackMap: false 573 hasPatchPoint: false 574 stackSize: 0 575 offsetAdjustment: 0 576 maxAlignment: 0 577 adjustsStack: false 578 hasCalls: false 579 stackProtector: '' 580 maxCallFrameSize: 4294967295 581 hasOpaqueSPAdjustment: false 582 hasVAStart: false 583 hasMustTailInVarArgFunc: false 584 savePoint: '' 585 restorePoint: '' 586fixedStack: 587stack: 588constants: 589body: | 590 ; CHECK-LABEL: name: test_64bitops 591 ; CHECK: bb.0: 592 ; CHECK: successors: %bb.1(0x80000000) 593 ; CHECK: liveins: $rdi, $zmm0, $zmm1 594 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 595 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 596 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 597 ; CHECK: [[KMOVQkm:%[0-9]+]]:vk64 = KMOVQkm [[COPY]], 1, $noreg, 0, $noreg 598 ; CHECK: [[KSHIFTRQri:%[0-9]+]]:vk64 = KSHIFTRQri [[KMOVQkm]], 2 599 ; CHECK: [[KSHIFTLQri:%[0-9]+]]:vk64 = KSHIFTLQri [[KSHIFTRQri]], 1 600 ; CHECK: [[KNOTQrr:%[0-9]+]]:vk64 = KNOTQrr [[KSHIFTLQri]] 601 ; CHECK: [[KORQrr:%[0-9]+]]:vk64 = KORQrr [[KNOTQrr]], [[KSHIFTRQri]] 602 ; CHECK: [[KANDQrr:%[0-9]+]]:vk64 = KANDQrr [[KORQrr]], [[KSHIFTLQri]] 603 ; CHECK: [[KXORQrr:%[0-9]+]]:vk64 = KXORQrr [[KANDQrr]], [[KSHIFTRQri]] 604 ; CHECK: [[KANDNQrr:%[0-9]+]]:vk64 = KANDNQrr [[KXORQrr]], [[KORQrr]] 605 ; CHECK: [[KADDQrr:%[0-9]+]]:vk64 = KADDQrr [[KANDNQrr]], [[KXORQrr]] 606 ; CHECK: [[COPY3:%[0-9]+]]:vk64wm = COPY [[KADDQrr]] 607 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]] 608 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]] 609 ; CHECK: bb.1: 610 ; CHECK: successors: %bb.2(0x80000000) 611 ; CHECK: bb.2: 612 ; CHECK: RET 0 613 bb.0: 614 liveins: $rdi, $zmm0, $zmm1 615 616 %0 = COPY $rdi 617 %1 = COPY $zmm0 618 %2 = COPY $zmm1 619 620 %5 = MOV64rm %0, 1, $noreg, 0, $noreg 621 %6 = SHR64ri %5, 2, implicit-def dead $eflags 622 %7 = SHL64ri %6, 1, implicit-def dead $eflags 623 %8 = NOT64r %7 624 %9 = OR64rr %8, %6, implicit-def dead $eflags 625 %10 = AND64rr %9, %7, implicit-def dead $eflags 626 %11 = XOR64rr %10, %6, implicit-def dead $eflags 627 %12 = ANDN64rr %11, %9, implicit-def dead $eflags 628 %13 = ADD64rr %12, %11, implicit-def dead $eflags 629 630 %3 = COPY %13 631 %4 = VMOVDQU8Zrrk %2, killed %3, %1 632 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 633 634 ; FIXME We can't replace TEST with KTEST due to flag differences 635 ; FIXME TEST64rr %13, %13, implicit-def $eflags 636 ; FIXME JE_1 %bb.1, implicit $eflags 637 ; FIXME JMP_1 %bb.2 638 639 bb.1: 640 641 bb.2: 642 RET 0 643 644... 645--- 646name: test_16bitext 647alignment: 4 648exposesReturnsTwice: false 649legalized: false 650regBankSelected: false 651selected: false 652tracksRegLiveness: true 653registers: 654 - { id: 0, class: gr64, preferred-register: '' } 655 - { id: 1, class: vr512, preferred-register: '' } 656 - { id: 2, class: vr512, preferred-register: '' } 657 - { id: 3, class: vk16wm, preferred-register: '' } 658 - { id: 4, class: vr512, preferred-register: '' } 659 - { id: 5, class: gr16, preferred-register: '' } 660 - { id: 6, class: gr16, preferred-register: '' } 661liveins: 662 - { reg: '$rdi', virtual-reg: '%0' } 663 - { reg: '$zmm0', virtual-reg: '%1' } 664 - { reg: '$zmm1', virtual-reg: '%2' } 665frameInfo: 666 isFrameAddressTaken: false 667 isReturnAddressTaken: false 668 hasStackMap: false 669 hasPatchPoint: false 670 stackSize: 0 671 offsetAdjustment: 0 672 maxAlignment: 0 673 adjustsStack: false 674 hasCalls: false 675 stackProtector: '' 676 maxCallFrameSize: 4294967295 677 hasOpaqueSPAdjustment: false 678 hasVAStart: false 679 hasMustTailInVarArgFunc: false 680 savePoint: '' 681 restorePoint: '' 682fixedStack: 683stack: 684constants: 685body: | 686 bb.0: 687 liveins: $rdi, $zmm0, $zmm1 688 689 ; CHECK-LABEL: name: test_16bitext 690 ; CHECK: liveins: $rdi, $zmm0, $zmm1 691 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 692 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 693 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 694 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 695 ; CHECK: [[COPY3:%[0-9]+]]:vk16 = COPY [[KMOVBkm]] 696 ; CHECK: [[KNOTWrr:%[0-9]+]]:vk16 = KNOTWrr [[COPY3]] 697 ; CHECK: [[COPY4:%[0-9]+]]:vk16wm = COPY [[KNOTWrr]] 698 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY4]], [[COPY1]] 699 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]] 700 ; CHECK: RET 0 701 %0 = COPY $rdi 702 %1 = COPY $zmm0 703 %2 = COPY $zmm1 704 705 %5 = MOVZX16rm8 %0, 1, $noreg, 0, $noreg 706 %6 = NOT16r %5 707 708 %3 = COPY %6 709 %4 = VMOVAPSZrrk %2, killed %3, %1 710 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %4 711 RET 0 712 713... 714--- 715name: test_32bitext 716alignment: 4 717exposesReturnsTwice: false 718legalized: false 719regBankSelected: false 720selected: false 721tracksRegLiveness: true 722registers: 723 - { id: 0, class: gr64, preferred-register: '' } 724 - { id: 1, class: vr512, preferred-register: '' } 725 - { id: 2, class: vr512, preferred-register: '' } 726 - { id: 3, class: vk64wm, preferred-register: '' } 727 - { id: 4, class: vr512, preferred-register: '' } 728 - { id: 5, class: gr32, preferred-register: '' } 729 - { id: 6, class: gr32, preferred-register: '' } 730 - { id: 7, class: gr32, preferred-register: '' } 731liveins: 732 - { reg: '$rdi', virtual-reg: '%0' } 733 - { reg: '$zmm0', virtual-reg: '%1' } 734 - { reg: '$zmm1', virtual-reg: '%2' } 735frameInfo: 736 isFrameAddressTaken: false 737 isReturnAddressTaken: false 738 hasStackMap: false 739 hasPatchPoint: false 740 stackSize: 0 741 offsetAdjustment: 0 742 maxAlignment: 0 743 adjustsStack: false 744 hasCalls: false 745 stackProtector: '' 746 maxCallFrameSize: 4294967295 747 hasOpaqueSPAdjustment: false 748 hasVAStart: false 749 hasMustTailInVarArgFunc: false 750 savePoint: '' 751 restorePoint: '' 752fixedStack: 753stack: 754constants: 755body: | 756 bb.0: 757 liveins: $rdi, $zmm0, $zmm1 758 759 ; CHECK-LABEL: name: test_32bitext 760 ; CHECK: liveins: $rdi, $zmm0, $zmm1 761 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 762 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 763 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 764 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 765 ; CHECK: [[COPY3:%[0-9]+]]:vk32 = COPY [[KMOVBkm]] 766 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg 767 ; CHECK: [[COPY4:%[0-9]+]]:vk32 = COPY [[KMOVWkm]] 768 ; CHECK: [[KADDDrr:%[0-9]+]]:vk32 = KADDDrr [[COPY3]], [[COPY4]] 769 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDDrr]] 770 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]] 771 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]] 772 ; CHECK: RET 0 773 %0 = COPY $rdi 774 %1 = COPY $zmm0 775 %2 = COPY $zmm1 776 777 %5 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg 778 %6 = MOVZX32rm16 %0, 1, $noreg, 0, $noreg 779 %7 = ADD32rr %5, %6, implicit-def dead $eflags 780 781 %3 = COPY %7 782 %4 = VMOVDQU16Zrrk %2, killed %3, %1 783 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 784 RET 0 785 786... 787--- 788name: test_64bitext 789alignment: 4 790exposesReturnsTwice: false 791legalized: false 792regBankSelected: false 793selected: false 794tracksRegLiveness: true 795registers: 796 - { id: 0, class: gr64, preferred-register: '' } 797 - { id: 1, class: vr512, preferred-register: '' } 798 - { id: 2, class: vr512, preferred-register: '' } 799 - { id: 3, class: vk64wm, preferred-register: '' } 800 - { id: 4, class: vr512, preferred-register: '' } 801 - { id: 5, class: gr64, preferred-register: '' } 802 - { id: 6, class: gr64, preferred-register: '' } 803 - { id: 7, class: gr64, preferred-register: '' } 804liveins: 805 - { reg: '$rdi', virtual-reg: '%0' } 806 - { reg: '$zmm0', virtual-reg: '%1' } 807 - { reg: '$zmm1', virtual-reg: '%2' } 808frameInfo: 809 isFrameAddressTaken: false 810 isReturnAddressTaken: false 811 hasStackMap: false 812 hasPatchPoint: false 813 stackSize: 0 814 offsetAdjustment: 0 815 maxAlignment: 0 816 adjustsStack: false 817 hasCalls: false 818 stackProtector: '' 819 maxCallFrameSize: 4294967295 820 hasOpaqueSPAdjustment: false 821 hasVAStart: false 822 hasMustTailInVarArgFunc: false 823 savePoint: '' 824 restorePoint: '' 825fixedStack: 826stack: 827constants: 828body: | 829 bb.0: 830 liveins: $rdi, $zmm0, $zmm1 831 832 ; CHECK-LABEL: name: test_64bitext 833 ; CHECK: liveins: $rdi, $zmm0, $zmm1 834 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 835 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 836 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 837 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 838 ; CHECK: [[COPY3:%[0-9]+]]:vk64 = COPY [[KMOVBkm]] 839 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg 840 ; CHECK: [[COPY4:%[0-9]+]]:vk64 = COPY [[KMOVWkm]] 841 ; CHECK: [[KADDQrr:%[0-9]+]]:vk64 = KADDQrr [[COPY3]], [[COPY4]] 842 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDQrr]] 843 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]] 844 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]] 845 ; CHECK: RET 0 846 %0 = COPY $rdi 847 %1 = COPY $zmm0 848 %2 = COPY $zmm1 849 850 %5 = MOVZX64rm8 %0, 1, $noreg, 0, $noreg 851 %6 = MOVZX64rm16 %0, 1, $noreg, 0, $noreg 852 %7 = ADD64rr %5, %6, implicit-def dead $eflags 853 854 %3 = COPY %7 855 %4 = VMOVDQU8Zrrk %2, killed %3, %1 856 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 857 RET 0 858 859... 860