1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32 --check-prefix=SSE-X32 --check-prefix=SSE2-X32 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE2-X64 4; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32 --check-prefix=SSE-X32 --check-prefix=SSE41-X32 5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE41-X64 6; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=AVX-X32 7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX-X64 8; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128 9; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128 10 11define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind { 12; SSE2-X32-LABEL: extract_i8_0: 13; SSE2-X32: # %bb.0: 14; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 15; SSE2-X32-NEXT: movd %xmm0, %ecx 16; SSE2-X32-NEXT: movb %cl, (%eax) 17; SSE2-X32-NEXT: retl 18; 19; SSE2-X64-LABEL: extract_i8_0: 20; SSE2-X64: # %bb.0: 21; SSE2-X64-NEXT: movd %xmm0, %eax 22; SSE2-X64-NEXT: movb %al, (%rdi) 23; SSE2-X64-NEXT: retq 24; 25; SSE41-X32-LABEL: extract_i8_0: 26; SSE41-X32: # %bb.0: 27; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 28; SSE41-X32-NEXT: pextrb $0, %xmm0, (%eax) 29; SSE41-X32-NEXT: retl 30; 31; SSE41-X64-LABEL: extract_i8_0: 32; SSE41-X64: # %bb.0: 33; SSE41-X64-NEXT: pextrb $0, %xmm0, (%rdi) 34; SSE41-X64-NEXT: retq 35; 36; AVX-X32-LABEL: extract_i8_0: 37; AVX-X32: # %bb.0: 38; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 39; AVX-X32-NEXT: vpextrb $0, %xmm0, (%eax) 40; AVX-X32-NEXT: retl 41; 42; AVX-X64-LABEL: extract_i8_0: 43; AVX-X64: # %bb.0: 44; AVX-X64-NEXT: vpextrb $0, %xmm0, (%rdi) 45; AVX-X64-NEXT: retq 46; 47; SSE-F128-LABEL: extract_i8_0: 48; SSE-F128: # %bb.0: 49; SSE-F128-NEXT: movd %xmm0, %eax 50; SSE-F128-NEXT: movb %al, (%rdi) 51; SSE-F128-NEXT: retq 52 %vecext = extractelement <16 x i8> %foo, i32 0 53 store i8 %vecext, i8* %dst, align 1 54 ret void 55} 56 57define void @extract_i8_3(i8* nocapture %dst, <16 x i8> %foo) nounwind { 58; SSE2-X32-LABEL: extract_i8_3: 59; SSE2-X32: # %bb.0: 60; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 61; SSE2-X32-NEXT: movd %xmm0, %ecx 62; SSE2-X32-NEXT: shrl $24, %ecx 63; SSE2-X32-NEXT: movb %cl, (%eax) 64; SSE2-X32-NEXT: retl 65; 66; SSE2-X64-LABEL: extract_i8_3: 67; SSE2-X64: # %bb.0: 68; SSE2-X64-NEXT: movd %xmm0, %eax 69; SSE2-X64-NEXT: shrl $24, %eax 70; SSE2-X64-NEXT: movb %al, (%rdi) 71; SSE2-X64-NEXT: retq 72; 73; SSE41-X32-LABEL: extract_i8_3: 74; SSE41-X32: # %bb.0: 75; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 76; SSE41-X32-NEXT: pextrb $3, %xmm0, (%eax) 77; SSE41-X32-NEXT: retl 78; 79; SSE41-X64-LABEL: extract_i8_3: 80; SSE41-X64: # %bb.0: 81; SSE41-X64-NEXT: pextrb $3, %xmm0, (%rdi) 82; SSE41-X64-NEXT: retq 83; 84; AVX-X32-LABEL: extract_i8_3: 85; AVX-X32: # %bb.0: 86; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 87; AVX-X32-NEXT: vpextrb $3, %xmm0, (%eax) 88; AVX-X32-NEXT: retl 89; 90; AVX-X64-LABEL: extract_i8_3: 91; AVX-X64: # %bb.0: 92; AVX-X64-NEXT: vpextrb $3, %xmm0, (%rdi) 93; AVX-X64-NEXT: retq 94; 95; SSE-F128-LABEL: extract_i8_3: 96; SSE-F128: # %bb.0: 97; SSE-F128-NEXT: movd %xmm0, %eax 98; SSE-F128-NEXT: shrl $24, %eax 99; SSE-F128-NEXT: movb %al, (%rdi) 100; SSE-F128-NEXT: retq 101 %vecext = extractelement <16 x i8> %foo, i32 3 102 store i8 %vecext, i8* %dst, align 1 103 ret void 104} 105 106define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind { 107; SSE2-X32-LABEL: extract_i8_15: 108; SSE2-X32: # %bb.0: 109; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 110; SSE2-X32-NEXT: pextrw $7, %xmm0, %ecx 111; SSE2-X32-NEXT: movb %ch, (%eax) 112; SSE2-X32-NEXT: retl 113; 114; SSE2-X64-LABEL: extract_i8_15: 115; SSE2-X64: # %bb.0: 116; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax 117; SSE2-X64-NEXT: movb %ah, (%rdi) 118; SSE2-X64-NEXT: retq 119; 120; SSE41-X32-LABEL: extract_i8_15: 121; SSE41-X32: # %bb.0: 122; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 123; SSE41-X32-NEXT: pextrb $15, %xmm0, (%eax) 124; SSE41-X32-NEXT: retl 125; 126; SSE41-X64-LABEL: extract_i8_15: 127; SSE41-X64: # %bb.0: 128; SSE41-X64-NEXT: pextrb $15, %xmm0, (%rdi) 129; SSE41-X64-NEXT: retq 130; 131; AVX-X32-LABEL: extract_i8_15: 132; AVX-X32: # %bb.0: 133; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 134; AVX-X32-NEXT: vpextrb $15, %xmm0, (%eax) 135; AVX-X32-NEXT: retl 136; 137; AVX-X64-LABEL: extract_i8_15: 138; AVX-X64: # %bb.0: 139; AVX-X64-NEXT: vpextrb $15, %xmm0, (%rdi) 140; AVX-X64-NEXT: retq 141; 142; SSE-F128-LABEL: extract_i8_15: 143; SSE-F128: # %bb.0: 144; SSE-F128-NEXT: pextrw $7, %xmm0, %eax 145; SSE-F128-NEXT: movb %ah, (%rdi) 146; SSE-F128-NEXT: retq 147 %vecext = extractelement <16 x i8> %foo, i32 15 148 store i8 %vecext, i8* %dst, align 1 149 ret void 150} 151 152define void @extract_i16_0(i16* nocapture %dst, <8 x i16> %foo) nounwind { 153; SSE2-X32-LABEL: extract_i16_0: 154; SSE2-X32: # %bb.0: 155; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 156; SSE2-X32-NEXT: movd %xmm0, %ecx 157; SSE2-X32-NEXT: movw %cx, (%eax) 158; SSE2-X32-NEXT: retl 159; 160; SSE2-X64-LABEL: extract_i16_0: 161; SSE2-X64: # %bb.0: 162; SSE2-X64-NEXT: movd %xmm0, %eax 163; SSE2-X64-NEXT: movw %ax, (%rdi) 164; SSE2-X64-NEXT: retq 165; 166; SSE41-X32-LABEL: extract_i16_0: 167; SSE41-X32: # %bb.0: 168; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 169; SSE41-X32-NEXT: pextrw $0, %xmm0, (%eax) 170; SSE41-X32-NEXT: retl 171; 172; SSE41-X64-LABEL: extract_i16_0: 173; SSE41-X64: # %bb.0: 174; SSE41-X64-NEXT: pextrw $0, %xmm0, (%rdi) 175; SSE41-X64-NEXT: retq 176; 177; AVX-X32-LABEL: extract_i16_0: 178; AVX-X32: # %bb.0: 179; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 180; AVX-X32-NEXT: vpextrw $0, %xmm0, (%eax) 181; AVX-X32-NEXT: retl 182; 183; AVX-X64-LABEL: extract_i16_0: 184; AVX-X64: # %bb.0: 185; AVX-X64-NEXT: vpextrw $0, %xmm0, (%rdi) 186; AVX-X64-NEXT: retq 187; 188; SSE-F128-LABEL: extract_i16_0: 189; SSE-F128: # %bb.0: 190; SSE-F128-NEXT: movd %xmm0, %eax 191; SSE-F128-NEXT: movw %ax, (%rdi) 192; SSE-F128-NEXT: retq 193 %vecext = extractelement <8 x i16> %foo, i32 0 194 store i16 %vecext, i16* %dst, align 1 195 ret void 196} 197 198define void @extract_i16_7(i16* nocapture %dst, <8 x i16> %foo) nounwind { 199; SSE2-X32-LABEL: extract_i16_7: 200; SSE2-X32: # %bb.0: 201; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 202; SSE2-X32-NEXT: pextrw $7, %xmm0, %ecx 203; SSE2-X32-NEXT: movw %cx, (%eax) 204; SSE2-X32-NEXT: retl 205; 206; SSE2-X64-LABEL: extract_i16_7: 207; SSE2-X64: # %bb.0: 208; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax 209; SSE2-X64-NEXT: movw %ax, (%rdi) 210; SSE2-X64-NEXT: retq 211; 212; SSE41-X32-LABEL: extract_i16_7: 213; SSE41-X32: # %bb.0: 214; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 215; SSE41-X32-NEXT: pextrw $7, %xmm0, (%eax) 216; SSE41-X32-NEXT: retl 217; 218; SSE41-X64-LABEL: extract_i16_7: 219; SSE41-X64: # %bb.0: 220; SSE41-X64-NEXT: pextrw $7, %xmm0, (%rdi) 221; SSE41-X64-NEXT: retq 222; 223; AVX-X32-LABEL: extract_i16_7: 224; AVX-X32: # %bb.0: 225; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 226; AVX-X32-NEXT: vpextrw $7, %xmm0, (%eax) 227; AVX-X32-NEXT: retl 228; 229; AVX-X64-LABEL: extract_i16_7: 230; AVX-X64: # %bb.0: 231; AVX-X64-NEXT: vpextrw $7, %xmm0, (%rdi) 232; AVX-X64-NEXT: retq 233; 234; SSE-F128-LABEL: extract_i16_7: 235; SSE-F128: # %bb.0: 236; SSE-F128-NEXT: pextrw $7, %xmm0, %eax 237; SSE-F128-NEXT: movw %ax, (%rdi) 238; SSE-F128-NEXT: retq 239 %vecext = extractelement <8 x i16> %foo, i32 7 240 store i16 %vecext, i16* %dst, align 1 241 ret void 242} 243 244define void @extract_i32_0(i32* nocapture %dst, <4 x i32> %foo) nounwind { 245; SSE-X32-LABEL: extract_i32_0: 246; SSE-X32: # %bb.0: 247; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 248; SSE-X32-NEXT: movss %xmm0, (%eax) 249; SSE-X32-NEXT: retl 250; 251; SSE-X64-LABEL: extract_i32_0: 252; SSE-X64: # %bb.0: 253; SSE-X64-NEXT: movss %xmm0, (%rdi) 254; SSE-X64-NEXT: retq 255; 256; AVX-X32-LABEL: extract_i32_0: 257; AVX-X32: # %bb.0: 258; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 259; AVX-X32-NEXT: vmovss %xmm0, (%eax) 260; AVX-X32-NEXT: retl 261; 262; AVX-X64-LABEL: extract_i32_0: 263; AVX-X64: # %bb.0: 264; AVX-X64-NEXT: vmovss %xmm0, (%rdi) 265; AVX-X64-NEXT: retq 266 %vecext = extractelement <4 x i32> %foo, i32 0 267 store i32 %vecext, i32* %dst, align 1 268 ret void 269} 270 271define void @extract_i32_3(i32* nocapture %dst, <4 x i32> %foo) nounwind { 272; SSE2-X32-LABEL: extract_i32_3: 273; SSE2-X32: # %bb.0: 274; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 275; SSE2-X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 276; SSE2-X32-NEXT: movd %xmm0, (%eax) 277; SSE2-X32-NEXT: retl 278; 279; SSE2-X64-LABEL: extract_i32_3: 280; SSE2-X64: # %bb.0: 281; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 282; SSE2-X64-NEXT: movd %xmm0, (%rdi) 283; SSE2-X64-NEXT: retq 284; 285; SSE41-X32-LABEL: extract_i32_3: 286; SSE41-X32: # %bb.0: 287; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 288; SSE41-X32-NEXT: extractps $3, %xmm0, (%eax) 289; SSE41-X32-NEXT: retl 290; 291; SSE41-X64-LABEL: extract_i32_3: 292; SSE41-X64: # %bb.0: 293; SSE41-X64-NEXT: extractps $3, %xmm0, (%rdi) 294; SSE41-X64-NEXT: retq 295; 296; AVX-X32-LABEL: extract_i32_3: 297; AVX-X32: # %bb.0: 298; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 299; AVX-X32-NEXT: vextractps $3, %xmm0, (%eax) 300; AVX-X32-NEXT: retl 301; 302; AVX-X64-LABEL: extract_i32_3: 303; AVX-X64: # %bb.0: 304; AVX-X64-NEXT: vextractps $3, %xmm0, (%rdi) 305; AVX-X64-NEXT: retq 306; 307; SSE-F128-LABEL: extract_i32_3: 308; SSE-F128: # %bb.0: 309; SSE-F128-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 310; SSE-F128-NEXT: movd %xmm0, (%rdi) 311; SSE-F128-NEXT: retq 312 %vecext = extractelement <4 x i32> %foo, i32 3 313 store i32 %vecext, i32* %dst, align 1 314 ret void 315} 316 317define void @extract_i64_0(i64* nocapture %dst, <2 x i64> %foo) nounwind { 318; SSE-X32-LABEL: extract_i64_0: 319; SSE-X32: # %bb.0: 320; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 321; SSE-X32-NEXT: movlps %xmm0, (%eax) 322; SSE-X32-NEXT: retl 323; 324; SSE-X64-LABEL: extract_i64_0: 325; SSE-X64: # %bb.0: 326; SSE-X64-NEXT: movlps %xmm0, (%rdi) 327; SSE-X64-NEXT: retq 328; 329; AVX-X32-LABEL: extract_i64_0: 330; AVX-X32: # %bb.0: 331; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 332; AVX-X32-NEXT: vmovlps %xmm0, (%eax) 333; AVX-X32-NEXT: retl 334; 335; AVX-X64-LABEL: extract_i64_0: 336; AVX-X64: # %bb.0: 337; AVX-X64-NEXT: vmovlps %xmm0, (%rdi) 338; AVX-X64-NEXT: retq 339 %vecext = extractelement <2 x i64> %foo, i32 0 340 store i64 %vecext, i64* %dst, align 1 341 ret void 342} 343 344define void @extract_i64_1(i64* nocapture %dst, <2 x i64> %foo) nounwind { 345; SSE-X32-LABEL: extract_i64_1: 346; SSE-X32: # %bb.0: 347; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 348; SSE-X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3] 349; SSE-X32-NEXT: movq %xmm0, (%eax) 350; SSE-X32-NEXT: retl 351; 352; SSE2-X64-LABEL: extract_i64_1: 353; SSE2-X64: # %bb.0: 354; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 355; SSE2-X64-NEXT: movq %xmm0, (%rdi) 356; SSE2-X64-NEXT: retq 357; 358; SSE41-X64-LABEL: extract_i64_1: 359; SSE41-X64: # %bb.0: 360; SSE41-X64-NEXT: pextrq $1, %xmm0, (%rdi) 361; SSE41-X64-NEXT: retq 362; 363; AVX-X32-LABEL: extract_i64_1: 364; AVX-X32: # %bb.0: 365; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 366; AVX-X32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1] 367; AVX-X32-NEXT: vmovlps %xmm0, (%eax) 368; AVX-X32-NEXT: retl 369; 370; AVX-X64-LABEL: extract_i64_1: 371; AVX-X64: # %bb.0: 372; AVX-X64-NEXT: vpextrq $1, %xmm0, (%rdi) 373; AVX-X64-NEXT: retq 374; 375; SSE-F128-LABEL: extract_i64_1: 376; SSE-F128: # %bb.0: 377; SSE-F128-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 378; SSE-F128-NEXT: movq %xmm0, (%rdi) 379; SSE-F128-NEXT: retq 380 %vecext = extractelement <2 x i64> %foo, i32 1 381 store i64 %vecext, i64* %dst, align 1 382 ret void 383} 384 385define void @extract_f32_0(float* nocapture %dst, <4 x float> %foo) nounwind { 386; SSE-X32-LABEL: extract_f32_0: 387; SSE-X32: # %bb.0: 388; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 389; SSE-X32-NEXT: movss %xmm0, (%eax) 390; SSE-X32-NEXT: retl 391; 392; SSE-X64-LABEL: extract_f32_0: 393; SSE-X64: # %bb.0: 394; SSE-X64-NEXT: movss %xmm0, (%rdi) 395; SSE-X64-NEXT: retq 396; 397; AVX-X32-LABEL: extract_f32_0: 398; AVX-X32: # %bb.0: 399; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 400; AVX-X32-NEXT: vmovss %xmm0, (%eax) 401; AVX-X32-NEXT: retl 402; 403; AVX-X64-LABEL: extract_f32_0: 404; AVX-X64: # %bb.0: 405; AVX-X64-NEXT: vmovss %xmm0, (%rdi) 406; AVX-X64-NEXT: retq 407 %vecext = extractelement <4 x float> %foo, i32 0 408 store float %vecext, float* %dst, align 1 409 ret void 410} 411 412define void @extract_f32_3(float* nocapture %dst, <4 x float> %foo) nounwind { 413; SSE2-X32-LABEL: extract_f32_3: 414; SSE2-X32: # %bb.0: 415; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 416; SSE2-X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3] 417; SSE2-X32-NEXT: movss %xmm0, (%eax) 418; SSE2-X32-NEXT: retl 419; 420; SSE2-X64-LABEL: extract_f32_3: 421; SSE2-X64: # %bb.0: 422; SSE2-X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3] 423; SSE2-X64-NEXT: movss %xmm0, (%rdi) 424; SSE2-X64-NEXT: retq 425; 426; SSE41-X32-LABEL: extract_f32_3: 427; SSE41-X32: # %bb.0: 428; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 429; SSE41-X32-NEXT: extractps $3, %xmm0, (%eax) 430; SSE41-X32-NEXT: retl 431; 432; SSE41-X64-LABEL: extract_f32_3: 433; SSE41-X64: # %bb.0: 434; SSE41-X64-NEXT: extractps $3, %xmm0, (%rdi) 435; SSE41-X64-NEXT: retq 436; 437; AVX-X32-LABEL: extract_f32_3: 438; AVX-X32: # %bb.0: 439; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 440; AVX-X32-NEXT: vextractps $3, %xmm0, (%eax) 441; AVX-X32-NEXT: retl 442; 443; AVX-X64-LABEL: extract_f32_3: 444; AVX-X64: # %bb.0: 445; AVX-X64-NEXT: vextractps $3, %xmm0, (%rdi) 446; AVX-X64-NEXT: retq 447; 448; SSE-F128-LABEL: extract_f32_3: 449; SSE-F128: # %bb.0: 450; SSE-F128-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3] 451; SSE-F128-NEXT: movss %xmm0, (%rdi) 452; SSE-F128-NEXT: retq 453 %vecext = extractelement <4 x float> %foo, i32 3 454 store float %vecext, float* %dst, align 1 455 ret void 456} 457 458define void @extract_f64_0(double* nocapture %dst, <2 x double> %foo) nounwind { 459; SSE-X32-LABEL: extract_f64_0: 460; SSE-X32: # %bb.0: 461; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 462; SSE-X32-NEXT: movlps %xmm0, (%eax) 463; SSE-X32-NEXT: retl 464; 465; SSE-X64-LABEL: extract_f64_0: 466; SSE-X64: # %bb.0: 467; SSE-X64-NEXT: movlps %xmm0, (%rdi) 468; SSE-X64-NEXT: retq 469; 470; AVX-X32-LABEL: extract_f64_0: 471; AVX-X32: # %bb.0: 472; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 473; AVX-X32-NEXT: vmovlps %xmm0, (%eax) 474; AVX-X32-NEXT: retl 475; 476; AVX-X64-LABEL: extract_f64_0: 477; AVX-X64: # %bb.0: 478; AVX-X64-NEXT: vmovlps %xmm0, (%rdi) 479; AVX-X64-NEXT: retq 480 %vecext = extractelement <2 x double> %foo, i32 0 481 store double %vecext, double* %dst, align 1 482 ret void 483} 484 485define void @extract_f64_1(double* nocapture %dst, <2 x double> %foo) nounwind { 486; SSE-X32-LABEL: extract_f64_1: 487; SSE-X32: # %bb.0: 488; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 489; SSE-X32-NEXT: movhpd %xmm0, (%eax) 490; SSE-X32-NEXT: retl 491; 492; SSE-X64-LABEL: extract_f64_1: 493; SSE-X64: # %bb.0: 494; SSE-X64-NEXT: movhpd %xmm0, (%rdi) 495; SSE-X64-NEXT: retq 496; 497; AVX-X32-LABEL: extract_f64_1: 498; AVX-X32: # %bb.0: 499; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 500; AVX-X32-NEXT: vmovhpd %xmm0, (%eax) 501; AVX-X32-NEXT: retl 502; 503; AVX-X64-LABEL: extract_f64_1: 504; AVX-X64: # %bb.0: 505; AVX-X64-NEXT: vmovhpd %xmm0, (%rdi) 506; AVX-X64-NEXT: retq 507 %vecext = extractelement <2 x double> %foo, i32 1 508 store double %vecext, double* %dst, align 1 509 ret void 510} 511 512define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 513; SSE-X32-LABEL: extract_f128_0: 514; SSE-X32: # %bb.0: 515; SSE-X32-NEXT: pushl %edi 516; SSE-X32-NEXT: pushl %esi 517; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 518; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %ecx 519; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %edx 520; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %esi 521; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %edi 522; SSE-X32-NEXT: movl %esi, 12(%edi) 523; SSE-X32-NEXT: movl %edx, 8(%edi) 524; SSE-X32-NEXT: movl %ecx, 4(%edi) 525; SSE-X32-NEXT: movl %eax, (%edi) 526; SSE-X32-NEXT: popl %esi 527; SSE-X32-NEXT: popl %edi 528; SSE-X32-NEXT: retl 529; 530; SSE2-X64-LABEL: extract_f128_0: 531; SSE2-X64: # %bb.0: 532; SSE2-X64-NEXT: movq %rdx, 8(%rdi) 533; SSE2-X64-NEXT: movq %rsi, (%rdi) 534; SSE2-X64-NEXT: retq 535; 536; SSE41-X64-LABEL: extract_f128_0: 537; SSE41-X64: # %bb.0: 538; SSE41-X64-NEXT: movq %rdx, 8(%rdi) 539; SSE41-X64-NEXT: movq %rsi, (%rdi) 540; SSE41-X64-NEXT: retq 541; 542; AVX-X32-LABEL: extract_f128_0: 543; AVX-X32: # %bb.0: 544; AVX-X32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0 545; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 546; AVX-X32-NEXT: vmovups %xmm0, (%eax) 547; AVX-X32-NEXT: retl 548; 549; AVX-X64-LABEL: extract_f128_0: 550; AVX-X64: # %bb.0: 551; AVX-X64-NEXT: movq %rdx, 8(%rdi) 552; AVX-X64-NEXT: movq %rsi, (%rdi) 553; AVX-X64-NEXT: retq 554; 555; SSE-F128-LABEL: extract_f128_0: 556; SSE-F128: # %bb.0: 557; SSE-F128-NEXT: movups %xmm0, (%rdi) 558; SSE-F128-NEXT: retq 559 %vecext = extractelement <2 x fp128> %foo, i32 0 560 store fp128 %vecext, fp128* %dst, align 1 561 ret void 562} 563 564define void @extract_f128_1(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 565; SSE-X32-LABEL: extract_f128_1: 566; SSE-X32: # %bb.0: 567; SSE-X32-NEXT: pushl %edi 568; SSE-X32-NEXT: pushl %esi 569; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 570; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %ecx 571; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %edx 572; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %esi 573; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %edi 574; SSE-X32-NEXT: movl %esi, 12(%edi) 575; SSE-X32-NEXT: movl %edx, 8(%edi) 576; SSE-X32-NEXT: movl %ecx, 4(%edi) 577; SSE-X32-NEXT: movl %eax, (%edi) 578; SSE-X32-NEXT: popl %esi 579; SSE-X32-NEXT: popl %edi 580; SSE-X32-NEXT: retl 581; 582; SSE2-X64-LABEL: extract_f128_1: 583; SSE2-X64: # %bb.0: 584; SSE2-X64-NEXT: movq %r8, 8(%rdi) 585; SSE2-X64-NEXT: movq %rcx, (%rdi) 586; SSE2-X64-NEXT: retq 587; 588; SSE41-X64-LABEL: extract_f128_1: 589; SSE41-X64: # %bb.0: 590; SSE41-X64-NEXT: movq %r8, 8(%rdi) 591; SSE41-X64-NEXT: movq %rcx, (%rdi) 592; SSE41-X64-NEXT: retq 593; 594; AVX-X32-LABEL: extract_f128_1: 595; AVX-X32: # %bb.0: 596; AVX-X32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0 597; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax 598; AVX-X32-NEXT: vmovups %xmm0, (%eax) 599; AVX-X32-NEXT: retl 600; 601; AVX-X64-LABEL: extract_f128_1: 602; AVX-X64: # %bb.0: 603; AVX-X64-NEXT: movq %r8, 8(%rdi) 604; AVX-X64-NEXT: movq %rcx, (%rdi) 605; AVX-X64-NEXT: retq 606; 607; SSE-F128-LABEL: extract_f128_1: 608; SSE-F128: # %bb.0: 609; SSE-F128-NEXT: movups %xmm1, (%rdi) 610; SSE-F128-NEXT: retq 611 %vecext = extractelement <2 x fp128> %foo, i32 1 612 store fp128 %vecext, fp128* %dst, align 1 613 ret void 614} 615 616define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) nounwind { 617; X32-LABEL: extract_i8_undef: 618; X32: # %bb.0: 619; X32-NEXT: retl 620; 621; X64-LABEL: extract_i8_undef: 622; X64: # %bb.0: 623; X64-NEXT: retq 624 %vecext = extractelement <16 x i8> %foo, i32 16 ; undef 625 store i8 %vecext, i8* %dst, align 1 626 ret void 627} 628 629define void @extract_i16_undef(i16* nocapture %dst, <8 x i16> %foo) nounwind { 630; X32-LABEL: extract_i16_undef: 631; X32: # %bb.0: 632; X32-NEXT: retl 633; 634; X64-LABEL: extract_i16_undef: 635; X64: # %bb.0: 636; X64-NEXT: retq 637 %vecext = extractelement <8 x i16> %foo, i32 9 ; undef 638 store i16 %vecext, i16* %dst, align 1 639 ret void 640} 641 642define void @extract_i32_undef(i32* nocapture %dst, <4 x i32> %foo) nounwind { 643; X32-LABEL: extract_i32_undef: 644; X32: # %bb.0: 645; X32-NEXT: retl 646; 647; X64-LABEL: extract_i32_undef: 648; X64: # %bb.0: 649; X64-NEXT: retq 650 %vecext = extractelement <4 x i32> %foo, i32 6 ; undef 651 store i32 %vecext, i32* %dst, align 1 652 ret void 653} 654 655define void @extract_i64_undef(i64* nocapture %dst, <2 x i64> %foo) nounwind { 656; X32-LABEL: extract_i64_undef: 657; X32: # %bb.0: 658; X32-NEXT: retl 659; 660; X64-LABEL: extract_i64_undef: 661; X64: # %bb.0: 662; X64-NEXT: retq 663 %vecext = extractelement <2 x i64> %foo, i32 2 ; undef 664 store i64 %vecext, i64* %dst, align 1 665 ret void 666} 667 668define void @extract_f32_undef(float* nocapture %dst, <4 x float> %foo) nounwind { 669; X32-LABEL: extract_f32_undef: 670; X32: # %bb.0: 671; X32-NEXT: retl 672; 673; X64-LABEL: extract_f32_undef: 674; X64: # %bb.0: 675; X64-NEXT: retq 676 %vecext = extractelement <4 x float> %foo, i32 6 ; undef 677 store float %vecext, float* %dst, align 1 678 ret void 679} 680 681define void @extract_f64_undef(double* nocapture %dst, <2 x double> %foo) nounwind { 682; X32-LABEL: extract_f64_undef: 683; X32: # %bb.0: 684; X32-NEXT: retl 685; 686; X64-LABEL: extract_f64_undef: 687; X64: # %bb.0: 688; X64-NEXT: retq 689 %vecext = extractelement <2 x double> %foo, i32 2 ; undef 690 store double %vecext, double* %dst, align 1 691 ret void 692} 693 694define void @extract_f128_undef(fp128* nocapture %dst, <2 x fp128> %foo) nounwind { 695; X32-LABEL: extract_f128_undef: 696; X32: # %bb.0: 697; X32-NEXT: retl 698; 699; X64-LABEL: extract_f128_undef: 700; X64: # %bb.0: 701; X64-NEXT: retq 702 %vecext = extractelement <2 x fp128> %foo, i32 2 ; undef 703 store fp128 %vecext, fp128* %dst, align 1 704 ret void 705} 706