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1; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
2
3define i32 @fcmp_oeq1(float %x) {
4; CHECK-LABEL: fcmp_oeq1
5; CHECK:       ucomiss  %xmm0, %xmm0
6; CHECK-NEXT:  jp {{LBB.+_1}}
7  %1 = fcmp oeq float %x, %x
8  br i1 %1, label %bb1, label %bb2
9bb2:
10  ret i32 1
11bb1:
12  ret i32 0
13}
14
15define i32 @fcmp_oeq2(float %x) {
16; CHECK-LABEL: fcmp_oeq2
17; CHECK:       xorps    %xmm1, %xmm1
18; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
19; CHECK-NEXT:  jne {{LBB.+_1}}
20; CHECK-NEXT:  jp {{LBB.+_1}}
21  %1 = fcmp oeq float %x, 0.000000e+00
22  br i1 %1, label %bb1, label %bb2
23bb2:
24  ret i32 1
25bb1:
26  ret i32 0
27}
28
29define i32 @fcmp_ogt1(float %x) {
30; CHECK-LABEL: fcmp_ogt1
31; CHECK-NOT:   ucomiss
32; CHECK:       movl $1, %eax
33  %1 = fcmp ogt float %x, %x
34  br i1 %1, label %bb1, label %bb2
35bb2:
36  ret i32 1
37bb1:
38  ret i32 0
39}
40
41define i32 @fcmp_ogt2(float %x) {
42; CHECK-LABEL: fcmp_ogt2
43; CHECK:       xorps    %xmm1, %xmm1
44; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
45; CHECK-NEXT:  jbe {{LBB.+_1}}
46  %1 = fcmp ogt float %x, 0.000000e+00
47  br i1 %1, label %bb1, label %bb2
48bb2:
49  ret i32 1
50bb1:
51  ret i32 0
52}
53
54define i32 @fcmp_oge1(float %x) {
55; CHECK-LABEL: fcmp_oge1
56; CHECK:       ucomiss  %xmm0, %xmm0
57; CHECK-NEXT:  jp {{LBB.+_1}}
58  %1 = fcmp oge float %x, %x
59  br i1 %1, label %bb1, label %bb2
60bb2:
61  ret i32 1
62bb1:
63  ret i32 0
64}
65
66define i32 @fcmp_oge2(float %x) {
67; CHECK-LABEL: fcmp_oge2
68; CHECK:       xorps    %xmm1, %xmm1
69; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
70; CHECK-NEXT:  jb {{LBB.+_1}}
71  %1 = fcmp oge float %x, 0.000000e+00
72  br i1 %1, label %bb1, label %bb2
73bb2:
74  ret i32 1
75bb1:
76  ret i32 0
77}
78
79define i32 @fcmp_olt1(float %x) {
80; CHECK-LABEL: fcmp_olt1
81; CHECK-NOT:   ucomiss
82; CHECK:       movl $1, %eax
83  %1 = fcmp olt float %x, %x
84  br i1 %1, label %bb1, label %bb2
85bb2:
86  ret i32 1
87bb1:
88  ret i32 0
89}
90
91define i32 @fcmp_olt2(float %x) {
92; CHECK-LABEL: fcmp_olt2
93; CHECK:       xorps    %xmm1, %xmm1
94; CHECK-NEXT:  ucomiss  %xmm0, %xmm1
95; CHECK-NEXT:  jbe {{LBB.+_1}}
96  %1 = fcmp olt float %x, 0.000000e+00
97  br i1 %1, label %bb1, label %bb2
98bb2:
99  ret i32 1
100bb1:
101  ret i32 0
102}
103
104define i32 @fcmp_ole1(float %x) {
105; CHECK-LABEL: fcmp_ole1
106; CHECK:       ucomiss  %xmm0, %xmm0
107; CHECK-NEXT:  jp {{LBB.+_1}}
108  %1 = fcmp ole float %x, %x
109  br i1 %1, label %bb1, label %bb2
110bb2:
111  ret i32 1
112bb1:
113  ret i32 0
114}
115
116define i32 @fcmp_ole2(float %x) {
117; CHECK-LABEL: fcmp_ole2
118; CHECK:       xorps    %xmm1, %xmm1
119; CHECK-NEXT:  ucomiss  %xmm0, %xmm1
120; CHECK-NEXT:  jb {{LBB.+_1}}
121  %1 = fcmp ole float %x, 0.000000e+00
122  br i1 %1, label %bb1, label %bb2
123bb2:
124  ret i32 1
125bb1:
126  ret i32 0
127}
128
129define i32 @fcmp_one1(float %x) {
130; CHECK-LABEL: fcmp_one1
131; CHECK-NOT:   ucomiss
132; CHECK:       movl $1, %eax
133  %1 = fcmp one float %x, %x
134  br i1 %1, label %bb1, label %bb2
135bb2:
136  ret i32 1
137bb1:
138  ret i32 0
139}
140
141define i32 @fcmp_one2(float %x) {
142; CHECK-LABEL: fcmp_one2
143; CHECK:       xorps    %xmm1, %xmm1
144; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
145; CHECK-NEXT:  je {{LBB.+_1}}
146  %1 = fcmp one float %x, 0.000000e+00
147  br i1 %1, label %bb1, label %bb2
148bb2:
149  ret i32 1
150bb1:
151  ret i32 0
152}
153
154define i32 @fcmp_ord1(float %x) {
155; CHECK-LABEL: fcmp_ord1
156; CHECK:       ucomiss  %xmm0, %xmm0
157; CHECK-NEXT:  jp {{LBB.+_1}}
158  %1 = fcmp ord float %x, %x
159  br i1 %1, label %bb1, label %bb2
160bb2:
161  ret i32 1
162bb1:
163  ret i32 0
164}
165
166define i32 @fcmp_ord2(float %x) {
167; CHECK-LABEL: fcmp_ord2
168; CHECK:       ucomiss  %xmm0, %xmm0
169; CHECK-NEXT:  jp {{LBB.+_1}}
170  %1 = fcmp ord float %x, 0.000000e+00
171  br i1 %1, label %bb1, label %bb2
172bb2:
173  ret i32 1
174bb1:
175  ret i32 0
176}
177
178define i32 @fcmp_uno1(float %x) {
179; CHECK-LABEL: fcmp_uno1
180; CHECK:       ucomiss  %xmm0, %xmm0
181; CHECK-NEXT:  jp {{LBB.+_2}}
182  %1 = fcmp uno float %x, %x
183  br i1 %1, label %bb1, label %bb2
184bb2:
185  ret i32 1
186bb1:
187  ret i32 0
188}
189
190define i32 @fcmp_uno2(float %x) {
191; CHECK-LABEL: fcmp_uno2
192; CHECK:       ucomiss  %xmm0, %xmm0
193; CHECK-NEXT:  jp {{LBB.+_2}}
194  %1 = fcmp uno float %x, 0.000000e+00
195  br i1 %1, label %bb1, label %bb2
196bb2:
197  ret i32 1
198bb1:
199  ret i32 0
200}
201
202define i32 @fcmp_ueq1(float %x) {
203; CHECK-LABEL: fcmp_ueq1
204; CHECK-NOT:   ucomiss
205  %1 = fcmp ueq float %x, %x
206  br i1 %1, label %bb1, label %bb2
207bb2:
208  ret i32 1
209bb1:
210  ret i32 0
211}
212
213define i32 @fcmp_ueq2(float %x) {
214; CHECK-LABEL: fcmp_ueq2
215; CHECK:       xorps    %xmm1, %xmm1
216; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
217; CHECK-NEXT:  je {{LBB.+_2}}
218  %1 = fcmp ueq float %x, 0.000000e+00
219  br i1 %1, label %bb1, label %bb2
220bb2:
221  ret i32 1
222bb1:
223  ret i32 0
224}
225
226define i32 @fcmp_ugt1(float %x) {
227; CHECK-LABEL: fcmp_ugt1
228; CHECK:       ucomiss  %xmm0, %xmm0
229; CHECK-NEXT:  jnp {{LBB.+_1}}
230  %1 = fcmp ugt float %x, %x
231  br i1 %1, label %bb1, label %bb2
232bb2:
233  ret i32 1
234bb1:
235  ret i32 0
236}
237
238define i32 @fcmp_ugt2(float %x) {
239; CHECK-LABEL: fcmp_ugt2
240; CHECK:       xorps    %xmm1, %xmm1
241; CHECK-NEXT:  ucomiss  %xmm0, %xmm1
242; CHECK-NEXT:  jae {{LBB.+_1}}
243  %1 = fcmp ugt float %x, 0.000000e+00
244  br i1 %1, label %bb1, label %bb2
245bb2:
246  ret i32 1
247bb1:
248  ret i32 0
249}
250
251define i32 @fcmp_uge1(float %x) {
252; CHECK-LABEL: fcmp_uge1
253; CHECK-NOT:   ucomiss
254  %1 = fcmp uge float %x, %x
255  br i1 %1, label %bb1, label %bb2
256bb2:
257  ret i32 1
258bb1:
259  ret i32 0
260}
261
262define i32 @fcmp_uge2(float %x) {
263; CHECK-LABEL: fcmp_uge2
264; CHECK:       xorps    %xmm1, %xmm1
265; CHECK-NEXT:  ucomiss  %xmm0, %xmm1
266; CHECK-NEXT:  ja {{LBB.+_1}}
267  %1 = fcmp uge float %x, 0.000000e+00
268  br i1 %1, label %bb1, label %bb2
269bb2:
270  ret i32 1
271bb1:
272  ret i32 0
273}
274
275define i32 @fcmp_ult1(float %x) {
276; CHECK-LABEL: fcmp_ult1
277; CHECK:       ucomiss  %xmm0, %xmm0
278; CHECK-NEXT:  jnp {{LBB.+_1}}
279  %1 = fcmp ult float %x, %x
280  br i1 %1, label %bb1, label %bb2
281bb2:
282  ret i32 1
283bb1:
284  ret i32 0
285}
286
287define i32 @fcmp_ult2(float %x) {
288; CHECK-LABEL: fcmp_ult2
289; CHECK:       xorps    %xmm1, %xmm1
290; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
291; CHECK-NEXT:  jae {{LBB.+_1}}
292  %1 = fcmp ult float %x, 0.000000e+00
293  br i1 %1, label %bb1, label %bb2
294bb2:
295  ret i32 1
296bb1:
297  ret i32 0
298}
299
300define i32 @fcmp_ule1(float %x) {
301; CHECK-LABEL: fcmp_ule1
302; CHECK-NOT:   ucomiss
303  %1 = fcmp ule float %x, %x
304  br i1 %1, label %bb1, label %bb2
305bb2:
306  ret i32 1
307bb1:
308  ret i32 0
309}
310
311define i32 @fcmp_ule2(float %x) {
312; CHECK-LABEL: fcmp_ule2
313; CHECK:       xorps    %xmm1, %xmm1
314; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
315; CHECK-NEXT:  ja {{LBB.+_1}}
316  %1 = fcmp ule float %x, 0.000000e+00
317  br i1 %1, label %bb1, label %bb2
318bb2:
319  ret i32 1
320bb1:
321  ret i32 0
322}
323
324define i32 @fcmp_une1(float %x) {
325; CHECK-LABEL: fcmp_une1
326; CHECK:       ucomiss  %xmm0, %xmm0
327; CHECK-NEXT:  jnp {{LBB.+_1}}
328  %1 = fcmp une float %x, %x
329  br i1 %1, label %bb1, label %bb2
330bb2:
331  ret i32 1
332bb1:
333  ret i32 0
334}
335
336define i32 @fcmp_une2(float %x) {
337; CHECK-LABEL: fcmp_une2
338; CHECK:       xorps    %xmm1, %xmm1
339; CHECK-NEXT:  ucomiss  %xmm1, %xmm0
340; CHECK-NEXT:  jne {{LBB.+_2}}
341; CHECK-NEXT:  jnp {{LBB.+_1}}
342  %1 = fcmp une float %x, 0.000000e+00
343  br i1 %1, label %bb1, label %bb2
344bb2:
345  ret i32 1
346bb1:
347  ret i32 0
348}
349
350define i32 @icmp_eq(i32 %x) {
351; CHECK-LABEL: icmp_eq
352; CHECK-NOT:   cmpl
353; CHECK:       xorl %eax, %eax
354  %1 = icmp eq i32 %x, %x
355  br i1 %1, label %bb1, label %bb2
356bb2:
357  ret i32 1
358bb1:
359  ret i32 0
360}
361
362define i32 @icmp_ne(i32 %x) {
363; CHECK-LABEL: icmp_ne
364; CHECK-NOT:   cmpl
365; CHECK:       movl $1, %eax
366  %1 = icmp ne i32 %x, %x
367  br i1 %1, label %bb1, label %bb2
368bb2:
369  ret i32 1
370bb1:
371  ret i32 0
372}
373
374define i32 @icmp_ugt(i32 %x) {
375; CHECK-LABEL: icmp_ugt
376; CHECK-NOT:   cmpl
377; CHECK:       movl $1, %eax
378  %1 = icmp ugt i32 %x, %x
379  br i1 %1, label %bb1, label %bb2
380bb2:
381  ret i32 1
382bb1:
383  ret i32 0
384}
385
386define i32 @icmp_uge(i32 %x) {
387; CHECK-LABEL: icmp_uge
388; CHECK-NOT:   cmpl
389; CHECK:       xorl %eax, %eax
390  %1 = icmp uge i32 %x, %x
391  br i1 %1, label %bb1, label %bb2
392bb2:
393  ret i32 1
394bb1:
395  ret i32 0
396}
397
398define i32 @icmp_ult(i32 %x) {
399; CHECK-LABEL: icmp_ult
400; CHECK-NOT:   cmpl
401; CHECK:       movl $1, %eax
402  %1 = icmp ult i32 %x, %x
403  br i1 %1, label %bb1, label %bb2
404bb2:
405  ret i32 1
406bb1:
407  ret i32 0
408}
409
410define i32 @icmp_ule(i32 %x) {
411; CHECK-LABEL: icmp_ule
412; CHECK-NOT:   cmpl
413; CHECK:       xorl %eax, %eax
414  %1 = icmp ule i32 %x, %x
415  br i1 %1, label %bb1, label %bb2
416bb2:
417  ret i32 1
418bb1:
419  ret i32 0
420}
421
422define i32 @icmp_sgt(i32 %x) {
423; CHECK-LABEL: icmp_sgt
424; CHECK-NOT:   cmpl
425; CHECK:       movl $1, %eax
426  %1 = icmp sgt i32 %x, %x
427  br i1 %1, label %bb1, label %bb2
428bb2:
429  ret i32 1
430bb1:
431  ret i32 0
432}
433
434define i32 @icmp_sge(i32 %x) {
435; CHECK-LABEL: icmp_sge
436; CHECK-NOT:   cmpl
437; CHECK:       xorl %eax, %eax
438  %1 = icmp sge i32 %x, %x
439  br i1 %1, label %bb1, label %bb2
440bb2:
441  ret i32 1
442bb1:
443  ret i32 0
444}
445
446define i32 @icmp_slt(i32 %x) {
447; CHECK-LABEL: icmp_slt
448; CHECK-NOT:   cmpl
449; CHECK:       movl $1, %eax
450  %1 = icmp slt i32 %x, %x
451  br i1 %1, label %bb1, label %bb2
452bb2:
453  ret i32 1
454bb1:
455  ret i32 0
456}
457
458define i32 @icmp_sle(i32 %x) {
459; CHECK-LABEL: icmp_sle
460; CHECK-NOT:   cmpl
461; CHECK:       xorl %eax, %eax
462  %1 = icmp sle i32 %x, %x
463  br i1 %1, label %bb1, label %bb2
464bb2:
465  ret i32 1
466bb1:
467  ret i32 0
468}
469
470