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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
3; RUN: llc -verify-machineinstrs -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
4
5
6define double @int_to_double_rr(i32 %a) {
7; AVX-LABEL: int_to_double_rr:
8; AVX:       # %bb.0: # %entry
9; AVX-NEXT:    vcvtusi2sdl %edi, %xmm0, %xmm0
10; AVX-NEXT:    retq
11;
12; AVX_X86-LABEL: int_to_double_rr:
13; AVX_X86:       # %bb.0: # %entry
14; AVX_X86-NEXT:    pushl %ebp
15; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
16; AVX_X86-NEXT:    .cfi_offset %ebp, -8
17; AVX_X86-NEXT:    movl %esp, %ebp
18; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
19; AVX_X86-NEXT:    andl $-8, %esp
20; AVX_X86-NEXT:    subl $8, %esp
21; AVX_X86-NEXT:    movl 8(%ebp), %eax
22; AVX_X86-NEXT:    vcvtusi2sdl %eax, %xmm0, %xmm0
23; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
24; AVX_X86-NEXT:    fldl (%esp)
25; AVX_X86-NEXT:    movl %ebp, %esp
26; AVX_X86-NEXT:    popl %ebp
27; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
28; AVX_X86-NEXT:    retl
29entry:
30  %0 = uitofp i32 %a to double
31  ret double %0
32}
33
34define double @int_to_double_rm(i32* %a) {
35; AVX-LABEL: int_to_double_rm:
36; AVX:       # %bb.0: # %entry
37; AVX-NEXT:    movl (%rdi), %eax
38; AVX-NEXT:    vcvtusi2sdl %eax, %xmm0, %xmm0
39; AVX-NEXT:    retq
40;
41; AVX_X86-LABEL: int_to_double_rm:
42; AVX_X86:       # %bb.0: # %entry
43; AVX_X86-NEXT:    pushl %ebp
44; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
45; AVX_X86-NEXT:    .cfi_offset %ebp, -8
46; AVX_X86-NEXT:    movl %esp, %ebp
47; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
48; AVX_X86-NEXT:    andl $-8, %esp
49; AVX_X86-NEXT:    subl $8, %esp
50; AVX_X86-NEXT:    movl 8(%ebp), %eax
51; AVX_X86-NEXT:    vcvtusi2sdl (%eax), %xmm0, %xmm0
52; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
53; AVX_X86-NEXT:    fldl (%esp)
54; AVX_X86-NEXT:    movl %ebp, %esp
55; AVX_X86-NEXT:    popl %ebp
56; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
57; AVX_X86-NEXT:    retl
58entry:
59  %0 = load i32, i32* %a
60  %1 = uitofp i32 %0 to double
61  ret double %1
62}
63
64define double @int_to_double_rm_optsize(i32* %a) optsize {
65; AVX-LABEL: int_to_double_rm_optsize:
66; AVX:       # %bb.0: # %entry
67; AVX-NEXT:    vcvtusi2sdl (%rdi), %xmm0, %xmm0
68; AVX-NEXT:    retq
69;
70; AVX_X86-LABEL: int_to_double_rm_optsize:
71; AVX_X86:       # %bb.0: # %entry
72; AVX_X86-NEXT:    pushl %ebp
73; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
74; AVX_X86-NEXT:    .cfi_offset %ebp, -8
75; AVX_X86-NEXT:    movl %esp, %ebp
76; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
77; AVX_X86-NEXT:    andl $-8, %esp
78; AVX_X86-NEXT:    subl $8, %esp
79; AVX_X86-NEXT:    movl 8(%ebp), %eax
80; AVX_X86-NEXT:    vcvtusi2sdl (%eax), %xmm0, %xmm0
81; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
82; AVX_X86-NEXT:    fldl (%esp)
83; AVX_X86-NEXT:    movl %ebp, %esp
84; AVX_X86-NEXT:    popl %ebp
85; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
86; AVX_X86-NEXT:    retl
87entry:
88  %0 = load i32, i32* %a
89  %1 = uitofp i32 %0 to double
90  ret double %1
91}
92
93define float @int_to_float_rr(i32 %a) {
94; AVX-LABEL: int_to_float_rr:
95; AVX:       # %bb.0: # %entry
96; AVX-NEXT:    vcvtusi2ssl %edi, %xmm0, %xmm0
97; AVX-NEXT:    retq
98;
99; AVX_X86-LABEL: int_to_float_rr:
100; AVX_X86:       # %bb.0: # %entry
101; AVX_X86-NEXT:    pushl %eax
102; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
103; AVX_X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
104; AVX_X86-NEXT:    vcvtusi2ssl %eax, %xmm0, %xmm0
105; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
106; AVX_X86-NEXT:    flds (%esp)
107; AVX_X86-NEXT:    popl %eax
108; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
109; AVX_X86-NEXT:    retl
110entry:
111  %0 = uitofp i32 %a to float
112  ret float %0
113}
114
115define float @int_to_float_rm(i32* %a) {
116; AVX-LABEL: int_to_float_rm:
117; AVX:       # %bb.0: # %entry
118; AVX-NEXT:    movl (%rdi), %eax
119; AVX-NEXT:    vcvtusi2ssl %eax, %xmm0, %xmm0
120; AVX-NEXT:    retq
121;
122; AVX_X86-LABEL: int_to_float_rm:
123; AVX_X86:       # %bb.0: # %entry
124; AVX_X86-NEXT:    pushl %eax
125; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
126; AVX_X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
127; AVX_X86-NEXT:    vcvtusi2ssl (%eax), %xmm0, %xmm0
128; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
129; AVX_X86-NEXT:    flds (%esp)
130; AVX_X86-NEXT:    popl %eax
131; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
132; AVX_X86-NEXT:    retl
133entry:
134  %0 = load i32, i32* %a
135  %1 = uitofp i32 %0 to float
136  ret float %1
137}
138
139define float @int_to_float_rm_optsize(i32* %a) optsize {
140; AVX-LABEL: int_to_float_rm_optsize:
141; AVX:       # %bb.0: # %entry
142; AVX-NEXT:    vcvtusi2ssl (%rdi), %xmm0, %xmm0
143; AVX-NEXT:    retq
144;
145; AVX_X86-LABEL: int_to_float_rm_optsize:
146; AVX_X86:       # %bb.0: # %entry
147; AVX_X86-NEXT:    pushl %eax
148; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
149; AVX_X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
150; AVX_X86-NEXT:    vcvtusi2ssl (%eax), %xmm0, %xmm0
151; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
152; AVX_X86-NEXT:    flds (%esp)
153; AVX_X86-NEXT:    popl %eax
154; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
155; AVX_X86-NEXT:    retl
156entry:
157  %0 = load i32, i32* %a
158  %1 = uitofp i32 %0 to float
159  ret float %1
160}
161