1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-linux -mattr=-bmi | FileCheck %s --check-prefix=CHECK 3; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=-bmi | FileCheck %s --check-prefix=GNUX32 4 5; LLVM creates virtual registers for values live across blocks 6; based on the type of the value. Make sure that the extracts 7; here use the GR64_NOREX register class for their result, 8; instead of plain GR64. 9 10define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h) { 11; CHECK-LABEL: foo: 12; CHECK: # %bb.0: 13; CHECK-NEXT: pushq %rbp 14; CHECK-NEXT: .cfi_def_cfa_offset 16 15; CHECK-NEXT: pushq %rbx 16; CHECK-NEXT: .cfi_def_cfa_offset 24 17; CHECK-NEXT: .cfi_offset %rbx, -24 18; CHECK-NEXT: .cfi_offset %rbp, -16 19; CHECK-NEXT: movq %rsi, %rax 20; CHECK-NEXT: movq %rdi, %rbx 21; CHECK-NEXT: movzbl %bh, %esi 22; CHECK-NEXT: movzbl %ah, %eax 23; CHECK-NEXT: movq %rax, %r10 24; CHECK-NEXT: movzbl %dh, %edx 25; CHECK-NEXT: movzbl %ch, %ebp 26; CHECK-NEXT: movq %r8, %rax 27; CHECK-NEXT: movzbl %ah, %ecx 28; CHECK-NEXT: movq %r9, %rax 29; CHECK-NEXT: movzbl %ah, %edi 30; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %eax 31; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx 32; CHECK-NEXT: addq %r10, %rsi 33; CHECK-NEXT: addq %rbp, %rdx 34; CHECK-NEXT: addq %rsi, %rdx 35; CHECK-NEXT: addq %rdi, %rcx 36; CHECK-NEXT: addq %rbx, %rax 37; CHECK-NEXT: addq %rcx, %rax 38; CHECK-NEXT: addq %rdx, %rax 39; CHECK-NEXT: popq %rbx 40; CHECK-NEXT: .cfi_def_cfa_offset 16 41; CHECK-NEXT: popq %rbp 42; CHECK-NEXT: .cfi_def_cfa_offset 8 43; CHECK-NEXT: retq 44; 45; GNUX32-LABEL: foo: 46; GNUX32: # %bb.0: 47; GNUX32-NEXT: pushq %rbp 48; GNUX32-NEXT: .cfi_def_cfa_offset 16 49; GNUX32-NEXT: pushq %rbx 50; GNUX32-NEXT: .cfi_def_cfa_offset 24 51; GNUX32-NEXT: .cfi_offset %rbx, -24 52; GNUX32-NEXT: .cfi_offset %rbp, -16 53; GNUX32-NEXT: movq %rsi, %rax 54; GNUX32-NEXT: movq %rdi, %rbx 55; GNUX32-NEXT: movzbl %bh, %esi 56; GNUX32-NEXT: movzbl %ah, %eax 57; GNUX32-NEXT: movq %rax, %r10 58; GNUX32-NEXT: movzbl %dh, %edx 59; GNUX32-NEXT: movzbl %ch, %ebp 60; GNUX32-NEXT: movq %r8, %rax 61; GNUX32-NEXT: movzbl %ah, %ecx 62; GNUX32-NEXT: movq %r9, %rax 63; GNUX32-NEXT: movzbl %ah, %edi 64; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %eax 65; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %ebx 66; GNUX32-NEXT: addq %r10, %rsi 67; GNUX32-NEXT: addq %rbp, %rdx 68; GNUX32-NEXT: addq %rsi, %rdx 69; GNUX32-NEXT: addq %rdi, %rcx 70; GNUX32-NEXT: addq %rbx, %rax 71; GNUX32-NEXT: addq %rcx, %rax 72; GNUX32-NEXT: addq %rdx, %rax 73; GNUX32-NEXT: popq %rbx 74; GNUX32-NEXT: .cfi_def_cfa_offset 16 75; GNUX32-NEXT: popq %rbp 76; GNUX32-NEXT: .cfi_def_cfa_offset 8 77; GNUX32-NEXT: retq 78 %sa = lshr i64 %a, 8 79 %A = and i64 %sa, 255 80 %sb = lshr i64 %b, 8 81 %B = and i64 %sb, 255 82 %sc = lshr i64 %c, 8 83 %C = and i64 %sc, 255 84 %sd = lshr i64 %d, 8 85 %D = and i64 %sd, 255 86 %se = lshr i64 %e, 8 87 %E = and i64 %se, 255 88 %sf = lshr i64 %f, 8 89 %F = and i64 %sf, 255 90 %sg = lshr i64 %g, 8 91 %G = and i64 %sg, 255 92 %sh = lshr i64 %h, 8 93 %H = and i64 %sh, 255 94 br label %next 95 96next: 97 %u = add i64 %A, %B 98 %v = add i64 %C, %D 99 %w = add i64 %E, %F 100 %x = add i64 %G, %H 101 %y = add i64 %u, %v 102 %z = add i64 %w, %x 103 %t = add i64 %y, %z 104 ret i64 %t 105} 106