1; RUN: llc < %s -mtriple=i686-- -mcpu=core2 -no-integrated-as | FileCheck %s 2 3define i32 @t1() nounwind { 4entry: 5 %0 = tail call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind 6 ret i32 %0 7; CHECK: t1 8; CHECK: {{## InlineAsm Start|#APP}} 9; CHECK: .intel_syntax 10; CHECK: mov eax, ecx 11; CHECK: mov ecx, eax 12; CHECK: .att_syntax 13; CHECK: {{## InlineAsm End|#NO_APP}} 14} 15 16define void @t2() nounwind { 17entry: 18 call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind 19 ret void 20; CHECK: t2 21; CHECK: {{## InlineAsm Start|#APP}} 22; CHECK: .intel_syntax 23; CHECK: mov eax, 1 24; CHECK: .att_syntax 25; CHECK: {{## InlineAsm End|#NO_APP}} 26} 27 28define void @t3(i32 %V) nounwind { 29entry: 30 %V.addr = alloca i32, align 4 31 store i32 %V, i32* %V.addr, align 4 32 call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind 33 ret void 34; CHECK: t3 35; CHECK: {{## InlineAsm Start|#APP}} 36; CHECK: .intel_syntax 37; CHECK: mov eax, DWORD PTR {{[[esp]}} 38; CHECK: .att_syntax 39; CHECK: {{## InlineAsm End|#NO_APP}} 40} 41 42%struct.t18_type = type { i32, i32 } 43 44define i32 @t18() nounwind { 45entry: 46 %foo = alloca %struct.t18_type, align 4 47 %a = getelementptr inbounds %struct.t18_type, %struct.t18_type* %foo, i32 0, i32 0 48 store i32 1, i32* %a, align 4 49 %b = getelementptr inbounds %struct.t18_type, %struct.t18_type* %foo, i32 0, i32 1 50 store i32 2, i32* %b, align 4 51 call void asm sideeffect inteldialect "lea ebx, foo\0A\09mov eax, [ebx].0\0A\09mov [ebx].4, ecx", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind 52 %b1 = getelementptr inbounds %struct.t18_type, %struct.t18_type* %foo, i32 0, i32 1 53 %0 = load i32, i32* %b1, align 4 54 ret i32 %0 55; CHECK: t18 56; CHECK: {{## InlineAsm Start|#APP}} 57; CHECK: .intel_syntax 58; CHECK: lea ebx, foo 59; CHECK: mov eax, [ebx].0 60; CHECK: mov [ebx].4, ecx 61; CHECK: .att_syntax 62; CHECK: {{## InlineAsm End|#NO_APP}} 63} 64 65define void @t19_helper() nounwind { 66entry: 67 ret void 68} 69 70define void @t19() nounwind { 71entry: 72 call void asm sideeffect inteldialect "call $0", "r,~{dirflag},~{fpsr},~{flags}"(void ()* @t19_helper) nounwind 73 ret void 74; CHECK-LABEL: t19: 75; CHECK: movl ${{_?}}t19_helper, %eax 76; CHECK: {{## InlineAsm Start|#APP}} 77; CHECK: .intel_syntax 78; CHECK: call eax 79; CHECK: .att_syntax 80; CHECK: {{## InlineAsm End|#NO_APP}} 81} 82 83@results = global [2 x i32] [i32 3, i32 2], align 4 84 85define i32* @t30() nounwind ssp { 86entry: 87 %res = alloca i32*, align 4 88 call void asm sideeffect inteldialect "lea edi, dword ptr $0", "*m,~{edi},~{dirflag},~{fpsr},~{flags}"([2 x i32]* @results) nounwind 89 call void asm sideeffect inteldialect "mov dword ptr $0, edi", "=*m,~{dirflag},~{fpsr},~{flags}"(i32** %res) nounwind 90 %0 = load i32*, i32** %res, align 4 91 ret i32* %0 92; CHECK-LABEL: t30: 93; CHECK: {{## InlineAsm Start|#APP}} 94; CHECK: .intel_syntax 95; CHECK: lea edi, dword ptr [{{_?}}results] 96; CHECK: .att_syntax 97; CHECK: {{## InlineAsm End|#NO_APP}} 98; CHECK: {{## InlineAsm Start|#APP}} 99; CHECK: .intel_syntax 100; CHECK: mov dword ptr [esp], edi 101; CHECK: .att_syntax 102; CHECK: {{## InlineAsm End|#NO_APP}} 103; CHECK: movl (%esp), %eax 104} 105 106; Stack realignment plus MS inline asm that does *not* adjust the stack is no 107; longer an error. 108 109define i32 @t31() { 110entry: 111 %val = alloca i32, align 64 112 store i32 -1, i32* %val, align 64 113 call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %val) 114 %sp = load i32, i32* %val, align 64 115 ret i32 %sp 116; CHECK-LABEL: t31: 117; CHECK: pushl %ebp 118; CHECK: movl %esp, %ebp 119; CHECK: andl $-64, %esp 120; CHECK: {{## InlineAsm Start|#APP}} 121; CHECK: .intel_syntax 122; CHECK: mov dword ptr [esp], esp 123; CHECK: .att_syntax 124; CHECK: {{## InlineAsm End|#NO_APP}} 125; CHECK: movl (%esp), %eax 126; CHECK: ret 127} 128 129; Make sure ${:uid} works. Clang uses it for MS inline asm labels. 130; 131; C source: 132; int uid() { 133; int r; 134; __asm { 135; xor eax, eax 136; wloop: 137; inc eax 138; cmp eax, 42 139; jne wloop 140; mov r, eax 141; } 142; return r; 143; } 144define i32 @uid() { 145entry: 146 %r = alloca i32, align 4 147 %0 = bitcast i32* %r to i8* 148 call void asm sideeffect inteldialect "xor eax, eax\0A\09.L__MSASMLABEL_.${:uid}__wloop:\0A\09inc eax\0A\09cmp eax, $$42\0A\09jne .L__MSASMLABEL_.${:uid}__wloop\0A\09mov dword ptr $0, eax", "=*m,~{eax},~{flags},~{dirflag},~{fpsr},~{flags}"(i32* nonnull %r) 149 %1 = load i32, i32* %r, align 4 150 ret i32 %1 151; CHECK-LABEL: uid: 152; CHECK: {{## InlineAsm Start|#APP}} 153; CHECK: .L__MSASMLABEL_.0__wloop: 154; CHECK: jne .L__MSASMLABEL_.0__wloop 155; CHECK: .att_syntax 156; CHECK: {{## InlineAsm End|#NO_APP}} 157; CHECK: ret 158} 159 160declare hidden void @other_func() 161 162define void @naked() #0 { 163 call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{eax},~{ebx},~{ecx},~{edx},~{edi},~{esi},~{esp},~{ebp},~{dirflag},~{fpsr},~{flags}"(void()* @other_func) 164 unreachable 165} 166 167attributes #0 = { naked } 168