1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -fast-isel-sink-local-values < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s 3 4define i32 @_Z3foov() { 5; CHECK-LABEL: _Z3foov: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: subl $16, %esp 8; CHECK-NEXT: .cfi_def_cfa_offset 20 9; CHECK-NEXT: movw $10959, {{[0-9]+}}(%esp) # imm = 0x2ACF 10; CHECK-NEXT: movw $-15498, {{[0-9]+}}(%esp) # imm = 0xC376 11; CHECK-NEXT: movw $19417, {{[0-9]+}}(%esp) # imm = 0x4BD9 12; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 13; CHECK-NEXT: cmpw $0, {{[0-9]+}}(%esp) 14; CHECK-NEXT: movb $1, %cl 15; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill 16; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill 17; CHECK-NEXT: jne .LBB0_2 18; CHECK-NEXT: # %bb.1: # %lor.rhs 19; CHECK-NEXT: xorl %eax, %eax 20; CHECK-NEXT: movb %al, %cl 21; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill 22; CHECK-NEXT: jmp .LBB0_2 23; CHECK-NEXT: .LBB0_2: # %lor.end 24; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al # 1-byte Reload 25; CHECK-NEXT: andb $1, %al 26; CHECK-NEXT: movzbl %al, %ecx 27; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx # 4-byte Reload 28; CHECK-NEXT: cmpl %ecx, %edx 29; CHECK-NEXT: setl %al 30; CHECK-NEXT: andb $1, %al 31; CHECK-NEXT: movzbl %al, %ecx 32; CHECK-NEXT: xorl $-1, %ecx 33; CHECK-NEXT: cmpl $0, %ecx 34; CHECK-NEXT: movb $1, %al 35; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp) # 1-byte Spill 36; CHECK-NEXT: jne .LBB0_4 37; CHECK-NEXT: # %bb.3: # %lor.rhs4 38; CHECK-NEXT: xorl %eax, %eax 39; CHECK-NEXT: movb %al, %cl 40; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill 41; CHECK-NEXT: jmp .LBB0_4 42; CHECK-NEXT: .LBB0_4: # %lor.end5 43; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al # 1-byte Reload 44; CHECK-NEXT: andb $1, %al 45; CHECK-NEXT: movzbl %al, %ecx 46; CHECK-NEXT: movw %cx, %dx 47; CHECK-NEXT: movw %dx, {{[0-9]+}}(%esp) 48; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 49; CHECK-NEXT: addl $16, %esp 50; CHECK-NEXT: .cfi_def_cfa_offset 4 51; CHECK-NEXT: retl 52entry: 53 %aa = alloca i16, align 2 54 %bb = alloca i16, align 2 55 %cc = alloca i16, align 2 56 store i16 10959, i16* %aa, align 2 57 store i16 -15498, i16* %bb, align 2 58 store i16 19417, i16* %cc, align 2 59 %0 = load i16, i16* %aa, align 2 60 %conv = zext i16 %0 to i32 61 %1 = load i16, i16* %cc, align 2 62 %tobool = icmp ne i16 %1, 0 63 br i1 %tobool, label %lor.end, label %lor.rhs 64 65lor.rhs: ; preds = %entry 66 br label %lor.end 67 68lor.end: ; preds = %lor.rhs, %entry 69 %2 = phi i1 [ true, %entry ], [ false, %lor.rhs ] 70 %conv1 = zext i1 %2 to i32 71 %cmp = icmp slt i32 %conv, %conv1 72 %conv2 = zext i1 %cmp to i32 73 %neg = xor i32 %conv2, -1 74 %tobool3 = icmp ne i32 %neg, 0 75 br i1 %tobool3, label %lor.end5, label %lor.rhs4 76 77lor.rhs4: ; preds = %lor.end 78 br label %lor.end5 79 80lor.end5: ; preds = %lor.rhs4, %lor.end 81 %3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs4 ] 82 %conv6 = zext i1 %3 to i16 83 store i16 %conv6, i16* %bb, align 2 84 %4 = load i16, i16* %bb, align 2 85 %conv7 = zext i16 %4 to i32 86 ret i32 %conv7 87} 88