1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX256 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F 6 7define <8 x i16> @testv8i16(<8 x i16> %in) { 8; AVX256-LABEL: testv8i16: 9; AVX256: # %bb.0: 10; AVX256-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 11; AVX256-NEXT: vplzcntd %ymm0, %ymm0 12; AVX256-NEXT: vpmovdw %ymm0, %xmm0 13; AVX256-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 14; AVX256-NEXT: vzeroupper 15; AVX256-NEXT: retq 16; 17; AVX512VL-LABEL: testv8i16: 18; AVX512VL: # %bb.0: 19; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 20; AVX512VL-NEXT: vplzcntd %ymm0, %ymm0 21; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 22; AVX512VL-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 23; AVX512VL-NEXT: vzeroupper 24; AVX512VL-NEXT: retq 25; 26; AVX512F-LABEL: testv8i16: 27; AVX512F: # %bb.0: 28; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 29; AVX512F-NEXT: vplzcntd %zmm0, %zmm0 30; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 31; AVX512F-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 32; AVX512F-NEXT: vzeroupper 33; AVX512F-NEXT: retq 34 %out = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %in, i1 false) 35 ret <8 x i16> %out 36} 37 38define <16 x i8> @testv16i8(<16 x i8> %in) { 39; AVX256-LABEL: testv16i8: 40; AVX256: # %bb.0: 41; AVX256-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 42; AVX256-NEXT: vpand %xmm1, %xmm0, %xmm2 43; AVX256-NEXT: vmovdqa {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0] 44; AVX256-NEXT: vpshufb %xmm2, %xmm3, %xmm2 45; AVX256-NEXT: vpsrlw $4, %xmm0, %xmm0 46; AVX256-NEXT: vpand %xmm1, %xmm0, %xmm0 47; AVX256-NEXT: vpxor %xmm1, %xmm1, %xmm1 48; AVX256-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1 49; AVX256-NEXT: vpand %xmm1, %xmm2, %xmm1 50; AVX256-NEXT: vpshufb %xmm0, %xmm3, %xmm0 51; AVX256-NEXT: vpaddb %xmm0, %xmm1, %xmm0 52; AVX256-NEXT: retq 53; 54; AVX512-LABEL: testv16i8: 55; AVX512: # %bb.0: 56; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 57; AVX512-NEXT: vplzcntd %zmm0, %zmm0 58; AVX512-NEXT: vpmovdb %zmm0, %xmm0 59; AVX512-NEXT: vpsubb {{.*}}(%rip), %xmm0, %xmm0 60; AVX512-NEXT: vzeroupper 61; AVX512-NEXT: retq 62 %out = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %in, i1 false) 63 ret <16 x i8> %out 64} 65 66define <16 x i16> @testv16i16(<16 x i16> %in) { 67; AVX256-LABEL: testv16i16: 68; AVX256: # %bb.0: 69; AVX256-NEXT: vextracti128 $1, %ymm0, %xmm1 70; AVX256-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 71; AVX256-NEXT: vplzcntd %ymm1, %ymm1 72; AVX256-NEXT: vpmovdw %ymm1, %xmm1 73; AVX256-NEXT: vmovdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] 74; AVX256-NEXT: vpsubw %xmm2, %xmm1, %xmm1 75; AVX256-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 76; AVX256-NEXT: vplzcntd %ymm0, %ymm0 77; AVX256-NEXT: vpmovdw %ymm0, %xmm0 78; AVX256-NEXT: vpsubw %xmm2, %xmm0, %xmm0 79; AVX256-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 80; AVX256-NEXT: retq 81; 82; AVX512-LABEL: testv16i16: 83; AVX512: # %bb.0: 84; AVX512-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 85; AVX512-NEXT: vplzcntd %zmm0, %zmm0 86; AVX512-NEXT: vpmovdw %zmm0, %ymm0 87; AVX512-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 88; AVX512-NEXT: retq 89 %out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 false) 90 ret <16 x i16> %out 91} 92 93define <32 x i8> @testv32i8(<32 x i8> %in) { 94; AVX256-LABEL: testv32i8: 95; AVX256: # %bb.0: 96; AVX256-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 97; AVX256-NEXT: vpand %ymm1, %ymm0, %ymm2 98; AVX256-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0] 99; AVX256-NEXT: vpshufb %ymm2, %ymm3, %ymm2 100; AVX256-NEXT: vpsrlw $4, %ymm0, %ymm0 101; AVX256-NEXT: vpand %ymm1, %ymm0, %ymm0 102; AVX256-NEXT: vpxor %xmm1, %xmm1, %xmm1 103; AVX256-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm1 104; AVX256-NEXT: vpand %ymm1, %ymm2, %ymm1 105; AVX256-NEXT: vpshufb %ymm0, %ymm3, %ymm0 106; AVX256-NEXT: vpaddb %ymm0, %ymm1, %ymm0 107; AVX256-NEXT: retq 108; 109; AVX512-LABEL: testv32i8: 110; AVX512: # %bb.0: 111; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1 112; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero 113; AVX512-NEXT: vplzcntd %zmm1, %zmm1 114; AVX512-NEXT: vpmovdb %zmm1, %xmm1 115; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24] 116; AVX512-NEXT: vpsubb %xmm2, %xmm1, %xmm1 117; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 118; AVX512-NEXT: vplzcntd %zmm0, %zmm0 119; AVX512-NEXT: vpmovdb %zmm0, %xmm0 120; AVX512-NEXT: vpsubb %xmm2, %xmm0, %xmm0 121; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 122; AVX512-NEXT: retq 123 %out = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %in, i1 false) 124 ret <32 x i8> %out 125} 126 127declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) 128declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) 129declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1) 130declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1) 131