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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX256
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
6
7define <8 x i16> @testv8i16(<8 x i16> %in) {
8; AVX256-LABEL: testv8i16:
9; AVX256:       # %bb.0:
10; AVX256-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
11; AVX256-NEXT:    vpopcntd %ymm0, %ymm0
12; AVX256-NEXT:    vpmovdw %ymm0, %xmm0
13; AVX256-NEXT:    vzeroupper
14; AVX256-NEXT:    retq
15;
16; AVX512VL-LABEL: testv8i16:
17; AVX512VL:       # %bb.0:
18; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
19; AVX512VL-NEXT:    vpopcntd %ymm0, %ymm0
20; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
21; AVX512VL-NEXT:    vzeroupper
22; AVX512VL-NEXT:    retq
23;
24; AVX512F-LABEL: testv8i16:
25; AVX512F:       # %bb.0:
26; AVX512F-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
27; AVX512F-NEXT:    vpopcntd %zmm0, %zmm0
28; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
29; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
30; AVX512F-NEXT:    vzeroupper
31; AVX512F-NEXT:    retq
32  %out = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %in)
33  ret <8 x i16> %out
34}
35
36define <16 x i8> @testv16i8(<16 x i8> %in) {
37; AVX256-LABEL: testv16i8:
38; AVX256:       # %bb.0:
39; AVX256-NEXT:    vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
40; AVX256-NEXT:    vpand %xmm1, %xmm0, %xmm2
41; AVX256-NEXT:    vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
42; AVX256-NEXT:    vpshufb %xmm2, %xmm3, %xmm2
43; AVX256-NEXT:    vpsrlw $4, %xmm0, %xmm0
44; AVX256-NEXT:    vpand %xmm1, %xmm0, %xmm0
45; AVX256-NEXT:    vpshufb %xmm0, %xmm3, %xmm0
46; AVX256-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
47; AVX256-NEXT:    retq
48;
49; AVX512-LABEL: testv16i8:
50; AVX512:       # %bb.0:
51; AVX512-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
52; AVX512-NEXT:    vpopcntd %zmm0, %zmm0
53; AVX512-NEXT:    vpmovdb %zmm0, %xmm0
54; AVX512-NEXT:    vzeroupper
55; AVX512-NEXT:    retq
56  %out = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %in)
57  ret <16 x i8> %out
58}
59
60define <16 x i16> @testv16i16(<16 x i16> %in) {
61; AVX256-LABEL: testv16i16:
62; AVX256:       # %bb.0:
63; AVX256-NEXT:    vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
64; AVX256-NEXT:    vpand %ymm1, %ymm0, %ymm2
65; AVX256-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
66; AVX256-NEXT:    vpshufb %ymm2, %ymm3, %ymm2
67; AVX256-NEXT:    vpsrlw $4, %ymm0, %ymm0
68; AVX256-NEXT:    vpand %ymm1, %ymm0, %ymm0
69; AVX256-NEXT:    vpshufb %ymm0, %ymm3, %ymm0
70; AVX256-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
71; AVX256-NEXT:    vpsllw $8, %ymm0, %ymm1
72; AVX256-NEXT:    vpaddb %ymm0, %ymm1, %ymm0
73; AVX256-NEXT:    vpsrlw $8, %ymm0, %ymm0
74; AVX256-NEXT:    retq
75;
76; AVX512-LABEL: testv16i16:
77; AVX512:       # %bb.0:
78; AVX512-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
79; AVX512-NEXT:    vpopcntd %zmm0, %zmm0
80; AVX512-NEXT:    vpmovdw %zmm0, %ymm0
81; AVX512-NEXT:    retq
82  %out = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> %in)
83  ret <16 x i16> %out
84}
85
86define <32 x i8> @testv32i8(<32 x i8> %in) {
87; CHECK-LABEL: testv32i8:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
90; CHECK-NEXT:    vpand %ymm1, %ymm0, %ymm2
91; CHECK-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
92; CHECK-NEXT:    vpshufb %ymm2, %ymm3, %ymm2
93; CHECK-NEXT:    vpsrlw $4, %ymm0, %ymm0
94; CHECK-NEXT:    vpand %ymm1, %ymm0, %ymm0
95; CHECK-NEXT:    vpshufb %ymm0, %ymm3, %ymm0
96; CHECK-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
97; CHECK-NEXT:    retq
98  %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %in)
99  ret <32 x i8> %out
100}
101
102declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)
103declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>)
104declare <16 x i16> @llvm.ctpop.v16i16(<16 x i16>)
105declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
106