1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -mcpu=core2 -mattr=+mmx,+sse2 | FileCheck %s 3; rdar://6602459 4 5@g_v1di = external global <1 x i64> 6 7define void @t1() nounwind { 8; CHECK-LABEL: t1: 9; CHECK: ## %bb.0: ## %entry 10; CHECK-NEXT: pushq %rax 11; CHECK-NEXT: callq _return_v1di 12; CHECK-NEXT: movq _g_v1di@{{.*}}(%rip), %rcx 13; CHECK-NEXT: movq %rax, (%rcx) 14; CHECK-NEXT: popq %rax 15; CHECK-NEXT: retq 16entry: 17 %call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0] 18 store <1 x i64> %call, <1 x i64>* @g_v1di 19 ret void 20} 21 22declare <1 x i64> @return_v1di() 23 24define <1 x i64> @t2() nounwind { 25; CHECK-LABEL: t2: 26; CHECK: ## %bb.0: 27; CHECK-NEXT: movl $1, %eax 28; CHECK-NEXT: retq 29 ret <1 x i64> <i64 1> 30} 31 32define <2 x i32> @t3() nounwind { 33; CHECK-LABEL: t3: 34; CHECK: ## %bb.0: 35; CHECK-NEXT: movl $1, %eax 36; CHECK-NEXT: movq %rax, %xmm0 37; CHECK-NEXT: retq 38 ret <2 x i32> <i32 1, i32 0> 39} 40 41define double @t4() nounwind { 42; CHECK-LABEL: t4: 43; CHECK: ## %bb.0: 44; CHECK-NEXT: movl $1, %eax 45; CHECK-NEXT: movd %eax, %xmm0 46; CHECK-NEXT: retq 47 ret double bitcast (<2 x i32> <i32 1, i32 0> to double) 48} 49 50