1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X86 3; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD 4; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2 5 6define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone { 7; ALL-LABEL: foo: 8; ALL: # %bb.0: # %entry 9; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl 10; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 11; ALL-NEXT: roll %cl, %eax 12; ALL-NEXT: retl 13entry: 14 %0 = shl i32 %x, %z 15 %1 = sub i32 32, %z 16 %2 = lshr i32 %x, %1 17 %3 = or i32 %2, %0 18 ret i32 %3 19} 20 21define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone { 22; ALL-LABEL: bar: 23; ALL: # %bb.0: # %entry 24; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl 25; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx 26; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 27; ALL-NEXT: shldl %cl, %edx, %eax 28; ALL-NEXT: retl 29entry: 30 %0 = shl i32 %y, %z 31 %1 = sub i32 32, %z 32 %2 = lshr i32 %x, %1 33 %3 = or i32 %2, %0 34 ret i32 %3 35} 36 37define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone { 38; ALL-LABEL: un: 39; ALL: # %bb.0: # %entry 40; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl 41; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 42; ALL-NEXT: rorl %cl, %eax 43; ALL-NEXT: retl 44entry: 45 %0 = lshr i32 %x, %z 46 %1 = sub i32 32, %z 47 %2 = shl i32 %x, %1 48 %3 = or i32 %2, %0 49 ret i32 %3 50} 51 52define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone { 53; ALL-LABEL: bu: 54; ALL: # %bb.0: # %entry 55; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl 56; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx 57; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 58; ALL-NEXT: shrdl %cl, %edx, %eax 59; ALL-NEXT: retl 60entry: 61 %0 = lshr i32 %y, %z 62 %1 = sub i32 32, %z 63 %2 = shl i32 %x, %1 64 %3 = or i32 %2, %0 65 ret i32 %3 66} 67 68define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone { 69; X86-LABEL: xfoo: 70; X86: # %bb.0: # %entry 71; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 72; X86-NEXT: roll $7, %eax 73; X86-NEXT: retl 74; 75; SHLD-LABEL: xfoo: 76; SHLD: # %bb.0: # %entry 77; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 78; SHLD-NEXT: shldl $7, %eax, %eax 79; SHLD-NEXT: retl 80; 81; BMI2-LABEL: xfoo: 82; BMI2: # %bb.0: # %entry 83; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax 84; BMI2-NEXT: retl 85entry: 86 %0 = lshr i32 %x, 25 87 %1 = shl i32 %x, 7 88 %2 = or i32 %0, %1 89 ret i32 %2 90} 91 92define i32 @xfoop(i32* %p) nounwind readnone { 93; X86-LABEL: xfoop: 94; X86: # %bb.0: # %entry 95; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 96; X86-NEXT: movl (%eax), %eax 97; X86-NEXT: roll $7, %eax 98; X86-NEXT: retl 99; 100; SHLD-LABEL: xfoop: 101; SHLD: # %bb.0: # %entry 102; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 103; SHLD-NEXT: movl (%eax), %eax 104; SHLD-NEXT: shldl $7, %eax, %eax 105; SHLD-NEXT: retl 106; 107; BMI2-LABEL: xfoop: 108; BMI2: # %bb.0: # %entry 109; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 110; BMI2-NEXT: rorxl $25, (%eax), %eax 111; BMI2-NEXT: retl 112entry: 113 %x = load i32, i32* %p 114 %a = lshr i32 %x, 25 115 %b = shl i32 %x, 7 116 %c = or i32 %a, %b 117 ret i32 %c 118} 119 120define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone { 121; ALL-LABEL: xbar: 122; ALL: # %bb.0: # %entry 123; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx 124; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 125; ALL-NEXT: shldl $7, %ecx, %eax 126; ALL-NEXT: retl 127entry: 128 %0 = shl i32 %y, 7 129 %1 = lshr i32 %x, 25 130 %2 = or i32 %0, %1 131 ret i32 %2 132} 133 134define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone { 135; X86-LABEL: xun: 136; X86: # %bb.0: # %entry 137; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 138; X86-NEXT: roll $25, %eax 139; X86-NEXT: retl 140; 141; SHLD-LABEL: xun: 142; SHLD: # %bb.0: # %entry 143; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 144; SHLD-NEXT: shldl $25, %eax, %eax 145; SHLD-NEXT: retl 146; 147; BMI2-LABEL: xun: 148; BMI2: # %bb.0: # %entry 149; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax 150; BMI2-NEXT: retl 151entry: 152 %0 = lshr i32 %x, 7 153 %1 = shl i32 %x, 25 154 %2 = or i32 %0, %1 155 ret i32 %2 156} 157 158define i32 @xunp(i32* %p) nounwind readnone { 159; X86-LABEL: xunp: 160; X86: # %bb.0: # %entry 161; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 162; X86-NEXT: movl (%eax), %eax 163; X86-NEXT: roll $25, %eax 164; X86-NEXT: retl 165; 166; SHLD-LABEL: xunp: 167; SHLD: # %bb.0: # %entry 168; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax 169; SHLD-NEXT: movl (%eax), %eax 170; SHLD-NEXT: shldl $25, %eax, %eax 171; SHLD-NEXT: retl 172; 173; BMI2-LABEL: xunp: 174; BMI2: # %bb.0: # %entry 175; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax 176; BMI2-NEXT: rorxl $7, (%eax), %eax 177; BMI2-NEXT: retl 178entry: 179; shld-label: xunp: 180; shld: shldl $25 181 %x = load i32, i32* %p 182 %a = lshr i32 %x, 7 183 %b = shl i32 %x, 25 184 %c = or i32 %a, %b 185 ret i32 %c 186} 187 188define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone { 189; ALL-LABEL: xbu: 190; ALL: # %bb.0: # %entry 191; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx 192; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax 193; ALL-NEXT: shldl $25, %ecx, %eax 194; ALL-NEXT: retl 195entry: 196 %0 = lshr i32 %y, 7 197 %1 = shl i32 %x, 25 198 %2 = or i32 %0, %1 199 ret i32 %2 200} 201