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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-linux | FileCheck %s --check-prefixes=X86
3; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefixes=X64
4
5define i64 @rotl64(i64 %A, i8 %Amt) nounwind {
6; X86-LABEL: rotl64:
7; X86:       # %bb.0:
8; X86-NEXT:    pushl %ebx
9; X86-NEXT:    pushl %edi
10; X86-NEXT:    pushl %esi
11; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
12; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
13; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
14; X86-NEXT:    movl %esi, %eax
15; X86-NEXT:    shll %cl, %eax
16; X86-NEXT:    movl %edi, %edx
17; X86-NEXT:    shldl %cl, %esi, %edx
18; X86-NEXT:    testb $32, %cl
19; X86-NEXT:    je .LBB0_2
20; X86-NEXT:  # %bb.1:
21; X86-NEXT:    movl %eax, %edx
22; X86-NEXT:    xorl %eax, %eax
23; X86-NEXT:  .LBB0_2:
24; X86-NEXT:    movb $64, %ch
25; X86-NEXT:    subb %cl, %ch
26; X86-NEXT:    movl %edi, %ebx
27; X86-NEXT:    movb %ch, %cl
28; X86-NEXT:    shrl %cl, %ebx
29; X86-NEXT:    shrdl %cl, %edi, %esi
30; X86-NEXT:    testb $32, %ch
31; X86-NEXT:    je .LBB0_4
32; X86-NEXT:  # %bb.3:
33; X86-NEXT:    movl %ebx, %esi
34; X86-NEXT:    xorl %ebx, %ebx
35; X86-NEXT:  .LBB0_4:
36; X86-NEXT:    orl %ebx, %edx
37; X86-NEXT:    orl %esi, %eax
38; X86-NEXT:    popl %esi
39; X86-NEXT:    popl %edi
40; X86-NEXT:    popl %ebx
41; X86-NEXT:    retl
42;
43; X64-LABEL: rotl64:
44; X64:       # %bb.0:
45; X64-NEXT:    movl %esi, %ecx
46; X64-NEXT:    rolq %cl, %rdi
47; X64-NEXT:    movq %rdi, %rax
48; X64-NEXT:    retq
49	%shift.upgrd.1 = zext i8 %Amt to i64
50	%B = shl i64 %A, %shift.upgrd.1
51	%Amt2 = sub i8 64, %Amt
52	%shift.upgrd.2 = zext i8 %Amt2 to i64
53	%C = lshr i64 %A, %shift.upgrd.2
54	%D = or i64 %B, %C
55	ret i64 %D
56}
57
58define i64 @rotr64(i64 %A, i8 %Amt) nounwind {
59; X86-LABEL: rotr64:
60; X86:       # %bb.0:
61; X86-NEXT:    pushl %ebx
62; X86-NEXT:    pushl %edi
63; X86-NEXT:    pushl %esi
64; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
65; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
66; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
67; X86-NEXT:    movl %esi, %edx
68; X86-NEXT:    shrl %cl, %edx
69; X86-NEXT:    movl %edi, %eax
70; X86-NEXT:    shrdl %cl, %esi, %eax
71; X86-NEXT:    testb $32, %cl
72; X86-NEXT:    je .LBB1_2
73; X86-NEXT:  # %bb.1:
74; X86-NEXT:    movl %edx, %eax
75; X86-NEXT:    xorl %edx, %edx
76; X86-NEXT:  .LBB1_2:
77; X86-NEXT:    movb $64, %ch
78; X86-NEXT:    subb %cl, %ch
79; X86-NEXT:    movl %edi, %ebx
80; X86-NEXT:    movb %ch, %cl
81; X86-NEXT:    shll %cl, %ebx
82; X86-NEXT:    shldl %cl, %edi, %esi
83; X86-NEXT:    testb $32, %ch
84; X86-NEXT:    je .LBB1_4
85; X86-NEXT:  # %bb.3:
86; X86-NEXT:    movl %ebx, %esi
87; X86-NEXT:    xorl %ebx, %ebx
88; X86-NEXT:  .LBB1_4:
89; X86-NEXT:    orl %esi, %edx
90; X86-NEXT:    orl %ebx, %eax
91; X86-NEXT:    popl %esi
92; X86-NEXT:    popl %edi
93; X86-NEXT:    popl %ebx
94; X86-NEXT:    retl
95;
96; X64-LABEL: rotr64:
97; X64:       # %bb.0:
98; X64-NEXT:    movl %esi, %ecx
99; X64-NEXT:    rorq %cl, %rdi
100; X64-NEXT:    movq %rdi, %rax
101; X64-NEXT:    retq
102	%shift.upgrd.3 = zext i8 %Amt to i64
103	%B = lshr i64 %A, %shift.upgrd.3
104	%Amt2 = sub i8 64, %Amt
105	%shift.upgrd.4 = zext i8 %Amt2 to i64
106	%C = shl i64 %A, %shift.upgrd.4
107	%D = or i64 %B, %C
108	ret i64 %D
109}
110
111define i64 @rotli64(i64 %A) nounwind {
112; X86-LABEL: rotli64:
113; X86:       # %bb.0:
114; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
115; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
116; X86-NEXT:    movl %ecx, %edx
117; X86-NEXT:    shldl $5, %eax, %edx
118; X86-NEXT:    shldl $5, %ecx, %eax
119; X86-NEXT:    retl
120;
121; X64-LABEL: rotli64:
122; X64:       # %bb.0:
123; X64-NEXT:    rolq $5, %rdi
124; X64-NEXT:    movq %rdi, %rax
125; X64-NEXT:    retq
126	%B = shl i64 %A, 5
127	%C = lshr i64 %A, 59
128	%D = or i64 %B, %C
129	ret i64 %D
130}
131
132define i64 @rotri64(i64 %A) nounwind {
133; X86-LABEL: rotri64:
134; X86:       # %bb.0:
135; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
136; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
137; X86-NEXT:    movl %ecx, %eax
138; X86-NEXT:    shldl $27, %edx, %eax
139; X86-NEXT:    shldl $27, %ecx, %edx
140; X86-NEXT:    retl
141;
142; X64-LABEL: rotri64:
143; X64:       # %bb.0:
144; X64-NEXT:    rolq $59, %rdi
145; X64-NEXT:    movq %rdi, %rax
146; X64-NEXT:    retq
147	%B = lshr i64 %A, 5
148	%C = shl i64 %A, 59
149	%D = or i64 %B, %C
150	ret i64 %D
151}
152
153define i64 @rotl1_64(i64 %A) nounwind {
154; X86-LABEL: rotl1_64:
155; X86:       # %bb.0:
156; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
157; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
158; X86-NEXT:    movl %ecx, %edx
159; X86-NEXT:    shldl $1, %eax, %edx
160; X86-NEXT:    shldl $1, %ecx, %eax
161; X86-NEXT:    retl
162;
163; X64-LABEL: rotl1_64:
164; X64:       # %bb.0:
165; X64-NEXT:    rolq %rdi
166; X64-NEXT:    movq %rdi, %rax
167; X64-NEXT:    retq
168	%B = shl i64 %A, 1
169	%C = lshr i64 %A, 63
170	%D = or i64 %B, %C
171	ret i64 %D
172}
173
174define i64 @rotr1_64(i64 %A) nounwind {
175; X86-LABEL: rotr1_64:
176; X86:       # %bb.0:
177; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
178; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
179; X86-NEXT:    movl %ecx, %eax
180; X86-NEXT:    shldl $31, %edx, %eax
181; X86-NEXT:    shldl $31, %ecx, %edx
182; X86-NEXT:    retl
183;
184; X64-LABEL: rotr1_64:
185; X64:       # %bb.0:
186; X64-NEXT:    rorq %rdi
187; X64-NEXT:    movq %rdi, %rax
188; X64-NEXT:    retq
189	%B = shl i64 %A, 63
190	%C = lshr i64 %A, 1
191	%D = or i64 %B, %C
192	ret i64 %D
193}
194
195define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
196; X86-LABEL: rotl32:
197; X86:       # %bb.0:
198; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
199; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
200; X86-NEXT:    roll %cl, %eax
201; X86-NEXT:    retl
202;
203; X64-LABEL: rotl32:
204; X64:       # %bb.0:
205; X64-NEXT:    movl %esi, %ecx
206; X64-NEXT:    roll %cl, %edi
207; X64-NEXT:    movl %edi, %eax
208; X64-NEXT:    retq
209	%shift.upgrd.1 = zext i8 %Amt to i32
210	%B = shl i32 %A, %shift.upgrd.1
211	%Amt2 = sub i8 32, %Amt
212	%shift.upgrd.2 = zext i8 %Amt2 to i32
213	%C = lshr i32 %A, %shift.upgrd.2
214	%D = or i32 %B, %C
215	ret i32 %D
216}
217
218define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
219; X86-LABEL: rotr32:
220; X86:       # %bb.0:
221; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
222; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
223; X86-NEXT:    rorl %cl, %eax
224; X86-NEXT:    retl
225;
226; X64-LABEL: rotr32:
227; X64:       # %bb.0:
228; X64-NEXT:    movl %esi, %ecx
229; X64-NEXT:    rorl %cl, %edi
230; X64-NEXT:    movl %edi, %eax
231; X64-NEXT:    retq
232	%shift.upgrd.3 = zext i8 %Amt to i32
233	%B = lshr i32 %A, %shift.upgrd.3
234	%Amt2 = sub i8 32, %Amt
235	%shift.upgrd.4 = zext i8 %Amt2 to i32
236	%C = shl i32 %A, %shift.upgrd.4
237	%D = or i32 %B, %C
238	ret i32 %D
239}
240
241define i32 @rotli32(i32 %A) nounwind {
242; X86-LABEL: rotli32:
243; X86:       # %bb.0:
244; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
245; X86-NEXT:    roll $5, %eax
246; X86-NEXT:    retl
247;
248; X64-LABEL: rotli32:
249; X64:       # %bb.0:
250; X64-NEXT:    roll $5, %edi
251; X64-NEXT:    movl %edi, %eax
252; X64-NEXT:    retq
253	%B = shl i32 %A, 5
254	%C = lshr i32 %A, 27
255	%D = or i32 %B, %C
256	ret i32 %D
257}
258
259define i32 @rotri32(i32 %A) nounwind {
260; X86-LABEL: rotri32:
261; X86:       # %bb.0:
262; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
263; X86-NEXT:    roll $27, %eax
264; X86-NEXT:    retl
265;
266; X64-LABEL: rotri32:
267; X64:       # %bb.0:
268; X64-NEXT:    roll $27, %edi
269; X64-NEXT:    movl %edi, %eax
270; X64-NEXT:    retq
271	%B = lshr i32 %A, 5
272	%C = shl i32 %A, 27
273	%D = or i32 %B, %C
274	ret i32 %D
275}
276
277define i32 @rotl1_32(i32 %A) nounwind {
278; X86-LABEL: rotl1_32:
279; X86:       # %bb.0:
280; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
281; X86-NEXT:    roll %eax
282; X86-NEXT:    retl
283;
284; X64-LABEL: rotl1_32:
285; X64:       # %bb.0:
286; X64-NEXT:    roll %edi
287; X64-NEXT:    movl %edi, %eax
288; X64-NEXT:    retq
289	%B = shl i32 %A, 1
290	%C = lshr i32 %A, 31
291	%D = or i32 %B, %C
292	ret i32 %D
293}
294
295define i32 @rotr1_32(i32 %A) nounwind {
296; X86-LABEL: rotr1_32:
297; X86:       # %bb.0:
298; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
299; X86-NEXT:    rorl %eax
300; X86-NEXT:    retl
301;
302; X64-LABEL: rotr1_32:
303; X64:       # %bb.0:
304; X64-NEXT:    rorl %edi
305; X64-NEXT:    movl %edi, %eax
306; X64-NEXT:    retq
307	%B = shl i32 %A, 31
308	%C = lshr i32 %A, 1
309	%D = or i32 %B, %C
310	ret i32 %D
311}
312
313define i16 @rotl16(i16 %A, i8 %Amt) nounwind {
314; X86-LABEL: rotl16:
315; X86:       # %bb.0:
316; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
317; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
318; X86-NEXT:    rolw %cl, %ax
319; X86-NEXT:    retl
320;
321; X64-LABEL: rotl16:
322; X64:       # %bb.0:
323; X64-NEXT:    movl %esi, %ecx
324; X64-NEXT:    rolw %cl, %di
325; X64-NEXT:    movl %edi, %eax
326; X64-NEXT:    retq
327	%shift.upgrd.5 = zext i8 %Amt to i16
328	%B = shl i16 %A, %shift.upgrd.5
329	%Amt2 = sub i8 16, %Amt
330	%shift.upgrd.6 = zext i8 %Amt2 to i16
331	%C = lshr i16 %A, %shift.upgrd.6
332	%D = or i16 %B, %C
333	ret i16 %D
334}
335
336define i16 @rotr16(i16 %A, i8 %Amt) nounwind {
337; X86-LABEL: rotr16:
338; X86:       # %bb.0:
339; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
340; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
341; X86-NEXT:    rorw %cl, %ax
342; X86-NEXT:    retl
343;
344; X64-LABEL: rotr16:
345; X64:       # %bb.0:
346; X64-NEXT:    movl %esi, %ecx
347; X64-NEXT:    rorw %cl, %di
348; X64-NEXT:    movl %edi, %eax
349; X64-NEXT:    retq
350	%shift.upgrd.7 = zext i8 %Amt to i16
351	%B = lshr i16 %A, %shift.upgrd.7
352	%Amt2 = sub i8 16, %Amt
353	%shift.upgrd.8 = zext i8 %Amt2 to i16
354	%C = shl i16 %A, %shift.upgrd.8
355	%D = or i16 %B, %C
356	ret i16 %D
357}
358
359define i16 @rotli16(i16 %A) nounwind {
360; X86-LABEL: rotli16:
361; X86:       # %bb.0:
362; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
363; X86-NEXT:    rolw $5, %ax
364; X86-NEXT:    retl
365;
366; X64-LABEL: rotli16:
367; X64:       # %bb.0:
368; X64-NEXT:    rolw $5, %di
369; X64-NEXT:    movl %edi, %eax
370; X64-NEXT:    retq
371	%B = shl i16 %A, 5
372	%C = lshr i16 %A, 11
373	%D = or i16 %B, %C
374	ret i16 %D
375}
376
377define i16 @rotri16(i16 %A) nounwind {
378; X86-LABEL: rotri16:
379; X86:       # %bb.0:
380; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
381; X86-NEXT:    rolw $11, %ax
382; X86-NEXT:    retl
383;
384; X64-LABEL: rotri16:
385; X64:       # %bb.0:
386; X64-NEXT:    rolw $11, %di
387; X64-NEXT:    movl %edi, %eax
388; X64-NEXT:    retq
389	%B = lshr i16 %A, 5
390	%C = shl i16 %A, 11
391	%D = or i16 %B, %C
392	ret i16 %D
393}
394
395define i16 @rotl1_16(i16 %A) nounwind {
396; X86-LABEL: rotl1_16:
397; X86:       # %bb.0:
398; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
399; X86-NEXT:    rolw %ax
400; X86-NEXT:    retl
401;
402; X64-LABEL: rotl1_16:
403; X64:       # %bb.0:
404; X64-NEXT:    rolw %di
405; X64-NEXT:    movl %edi, %eax
406; X64-NEXT:    retq
407	%B = shl i16 %A, 1
408	%C = lshr i16 %A, 15
409	%D = or i16 %B, %C
410	ret i16 %D
411}
412
413define i16 @rotr1_16(i16 %A) nounwind {
414; X86-LABEL: rotr1_16:
415; X86:       # %bb.0:
416; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
417; X86-NEXT:    rorw %ax
418; X86-NEXT:    retl
419;
420; X64-LABEL: rotr1_16:
421; X64:       # %bb.0:
422; X64-NEXT:    rorw %di
423; X64-NEXT:    movl %edi, %eax
424; X64-NEXT:    retq
425	%B = lshr i16 %A, 1
426	%C = shl i16 %A, 15
427	%D = or i16 %B, %C
428	ret i16 %D
429}
430
431define i8 @rotl8(i8 %A, i8 %Amt) nounwind {
432; X86-LABEL: rotl8:
433; X86:       # %bb.0:
434; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
435; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
436; X86-NEXT:    rolb %cl, %al
437; X86-NEXT:    retl
438;
439; X64-LABEL: rotl8:
440; X64:       # %bb.0:
441; X64-NEXT:    movl %esi, %ecx
442; X64-NEXT:    rolb %cl, %dil
443; X64-NEXT:    movl %edi, %eax
444; X64-NEXT:    retq
445	%B = shl i8 %A, %Amt
446	%Amt2 = sub i8 8, %Amt
447	%C = lshr i8 %A, %Amt2
448	%D = or i8 %B, %C
449	ret i8 %D
450}
451
452define i8 @rotr8(i8 %A, i8 %Amt) nounwind {
453; X86-LABEL: rotr8:
454; X86:       # %bb.0:
455; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
456; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
457; X86-NEXT:    rorb %cl, %al
458; X86-NEXT:    retl
459;
460; X64-LABEL: rotr8:
461; X64:       # %bb.0:
462; X64-NEXT:    movl %esi, %ecx
463; X64-NEXT:    rorb %cl, %dil
464; X64-NEXT:    movl %edi, %eax
465; X64-NEXT:    retq
466	%B = lshr i8 %A, %Amt
467	%Amt2 = sub i8 8, %Amt
468	%C = shl i8 %A, %Amt2
469	%D = or i8 %B, %C
470	ret i8 %D
471}
472
473define i8 @rotli8(i8 %A) nounwind {
474; X86-LABEL: rotli8:
475; X86:       # %bb.0:
476; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
477; X86-NEXT:    rolb $5, %al
478; X86-NEXT:    retl
479;
480; X64-LABEL: rotli8:
481; X64:       # %bb.0:
482; X64-NEXT:    rolb $5, %dil
483; X64-NEXT:    movl %edi, %eax
484; X64-NEXT:    retq
485	%B = shl i8 %A, 5
486	%C = lshr i8 %A, 3
487	%D = or i8 %B, %C
488	ret i8 %D
489}
490
491define i8 @rotri8(i8 %A) nounwind {
492; X86-LABEL: rotri8:
493; X86:       # %bb.0:
494; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
495; X86-NEXT:    rolb $3, %al
496; X86-NEXT:    retl
497;
498; X64-LABEL: rotri8:
499; X64:       # %bb.0:
500; X64-NEXT:    rolb $3, %dil
501; X64-NEXT:    movl %edi, %eax
502; X64-NEXT:    retq
503	%B = lshr i8 %A, 5
504	%C = shl i8 %A, 3
505	%D = or i8 %B, %C
506	ret i8 %D
507}
508
509define i8 @rotl1_8(i8 %A) nounwind {
510; X86-LABEL: rotl1_8:
511; X86:       # %bb.0:
512; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
513; X86-NEXT:    rolb %al
514; X86-NEXT:    retl
515;
516; X64-LABEL: rotl1_8:
517; X64:       # %bb.0:
518; X64-NEXT:    rolb %dil
519; X64-NEXT:    movl %edi, %eax
520; X64-NEXT:    retq
521	%B = shl i8 %A, 1
522	%C = lshr i8 %A, 7
523	%D = or i8 %B, %C
524	ret i8 %D
525}
526
527define i8 @rotr1_8(i8 %A) nounwind {
528; X86-LABEL: rotr1_8:
529; X86:       # %bb.0:
530; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
531; X86-NEXT:    rorb %al
532; X86-NEXT:    retl
533;
534; X64-LABEL: rotr1_8:
535; X64:       # %bb.0:
536; X64-NEXT:    rorb %dil
537; X64-NEXT:    movl %edi, %eax
538; X64-NEXT:    retq
539	%B = lshr i8 %A, 1
540	%C = shl i8 %A, 7
541	%D = or i8 %B, %C
542	ret i8 %D
543}
544
545define void @rotr1_64_mem(i64* %Aptr) nounwind {
546; X86-LABEL: rotr1_64_mem:
547; X86:       # %bb.0:
548; X86-NEXT:    pushl %esi
549; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
550; X86-NEXT:    movl (%eax), %ecx
551; X86-NEXT:    movl 4(%eax), %edx
552; X86-NEXT:    movl %edx, %esi
553; X86-NEXT:    shldl $31, %ecx, %esi
554; X86-NEXT:    shldl $31, %edx, %ecx
555; X86-NEXT:    movl %ecx, 4(%eax)
556; X86-NEXT:    movl %esi, (%eax)
557; X86-NEXT:    popl %esi
558; X86-NEXT:    retl
559;
560; X64-LABEL: rotr1_64_mem:
561; X64:       # %bb.0:
562; X64-NEXT:    rorq (%rdi)
563; X64-NEXT:    retq
564
565  %A = load i64, i64 *%Aptr
566  %B = shl i64 %A, 63
567  %C = lshr i64 %A, 1
568  %D = or i64 %B, %C
569  store i64 %D, i64* %Aptr
570  ret void
571}
572
573define void @rotr1_32_mem(i32* %Aptr) nounwind {
574; X86-LABEL: rotr1_32_mem:
575; X86:       # %bb.0:
576; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
577; X86-NEXT:    rorl (%eax)
578; X86-NEXT:    retl
579;
580; X64-LABEL: rotr1_32_mem:
581; X64:       # %bb.0:
582; X64-NEXT:    rorl (%rdi)
583; X64-NEXT:    retq
584  %A = load i32, i32 *%Aptr
585  %B = shl i32 %A, 31
586  %C = lshr i32 %A, 1
587  %D = or i32 %B, %C
588  store i32 %D, i32* %Aptr
589  ret void
590}
591
592define void @rotr1_16_mem(i16* %Aptr) nounwind {
593; X86-LABEL: rotr1_16_mem:
594; X86:       # %bb.0:
595; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
596; X86-NEXT:    rorw (%eax)
597; X86-NEXT:    retl
598;
599; X64-LABEL: rotr1_16_mem:
600; X64:       # %bb.0:
601; X64-NEXT:    rorw (%rdi)
602; X64-NEXT:    retq
603  %A = load i16, i16 *%Aptr
604  %B = shl i16 %A, 15
605  %C = lshr i16 %A, 1
606  %D = or i16 %B, %C
607  store i16 %D, i16* %Aptr
608  ret void
609}
610
611define void @rotr1_8_mem(i8* %Aptr) nounwind {
612; X86-LABEL: rotr1_8_mem:
613; X86:       # %bb.0:
614; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
615; X86-NEXT:    rorb (%eax)
616; X86-NEXT:    retl
617;
618; X64-LABEL: rotr1_8_mem:
619; X64:       # %bb.0:
620; X64-NEXT:    rorb (%rdi)
621; X64-NEXT:    retq
622  %A = load i8, i8 *%Aptr
623  %B = shl i8 %A, 7
624  %C = lshr i8 %A, 1
625  %D = or i8 %B, %C
626  store i8 %D, i8* %Aptr
627  ret void
628}
629
630define i64 @truncated_rot(i64 %x, i32 %amt) nounwind {
631; X86-LABEL: truncated_rot:
632; X86:       # %bb.0: # %entry
633; X86-NEXT:    pushl %ebx
634; X86-NEXT:    pushl %edi
635; X86-NEXT:    pushl %esi
636; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
637; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
638; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
639; X86-NEXT:    movl %esi, %eax
640; X86-NEXT:    shll %cl, %eax
641; X86-NEXT:    testb $32, %cl
642; X86-NEXT:    movl $0, %ebx
643; X86-NEXT:    jne .LBB28_2
644; X86-NEXT:  # %bb.1: # %entry
645; X86-NEXT:    movl %eax, %ebx
646; X86-NEXT:  .LBB28_2: # %entry
647; X86-NEXT:    movl $64, %edx
648; X86-NEXT:    subl %ecx, %edx
649; X86-NEXT:    movl %edi, %eax
650; X86-NEXT:    movl %edx, %ecx
651; X86-NEXT:    shrl %cl, %eax
652; X86-NEXT:    shrdl %cl, %edi, %esi
653; X86-NEXT:    testb $32, %dl
654; X86-NEXT:    jne .LBB28_4
655; X86-NEXT:  # %bb.3: # %entry
656; X86-NEXT:    movl %esi, %eax
657; X86-NEXT:  .LBB28_4: # %entry
658; X86-NEXT:    orl %ebx, %eax
659; X86-NEXT:    xorl %edx, %edx
660; X86-NEXT:    popl %esi
661; X86-NEXT:    popl %edi
662; X86-NEXT:    popl %ebx
663; X86-NEXT:    retl
664;
665; X64-LABEL: truncated_rot:
666; X64:       # %bb.0: # %entry
667; X64-NEXT:    movl %esi, %ecx
668; X64-NEXT:    rolq %cl, %rdi
669; X64-NEXT:    movl %edi, %eax
670; X64-NEXT:    retq
671entry:
672  %sh_prom = zext i32 %amt to i64
673  %shl = shl i64 %x, %sh_prom
674  %sub = sub nsw i32 64, %amt
675  %sh_prom1 = zext i32 %sub to i64
676  %shr = lshr i64 %x, %sh_prom1
677  %or = or i64 %shr, %shl
678  %and = and i64 %or, 4294967295
679  ret i64 %and
680}
681