1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,SSE2,X86-SSE2 3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,SSE41,X86-SSE41 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX1,X86-AVX1 5; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX512,X86-AVX512 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,SSE2,X64-SSE2 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,SSE41,X64-SSE41 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX1,X64-AVX1 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX512,X64-AVX512 10 11; PR21507 - https://llvm.org/bugs/show_bug.cgi?id=21507 12; Each function should be a single math op; no extra moves. 13 14 15define <4 x float> @recip(<4 x float> %x) { 16; SSE-LABEL: recip: 17; SSE: # %bb.0: 18; SSE-NEXT: rcpss %xmm0, %xmm0 19; SSE-NEXT: ret{{[l|q]}} 20; 21; AVX-LABEL: recip: 22; AVX: # %bb.0: 23; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm0 24; AVX-NEXT: ret{{[l|q]}} 25 %y = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %x) 26 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7> 27 ret <4 x float> %shuf 28} 29 30define <4 x float> @recip_square_root(<4 x float> %x) { 31; SSE-LABEL: recip_square_root: 32; SSE: # %bb.0: 33; SSE-NEXT: rsqrtss %xmm0, %xmm0 34; SSE-NEXT: ret{{[l|q]}} 35; 36; AVX-LABEL: recip_square_root: 37; AVX: # %bb.0: 38; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 39; AVX-NEXT: ret{{[l|q]}} 40 %y = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %x) 41 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7> 42 ret <4 x float> %shuf 43} 44 45define <4 x float> @square_root(<4 x float> %x) { 46; SSE-LABEL: square_root: 47; SSE: # %bb.0: 48; SSE-NEXT: sqrtss %xmm0, %xmm0 49; SSE-NEXT: ret{{[l|q]}} 50; 51; AVX-LABEL: square_root: 52; AVX: # %bb.0: 53; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 54; AVX-NEXT: ret{{[l|q]}} 55 %y = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %x) 56 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7> 57 ret <4 x float> %shuf 58} 59 60define <2 x double> @square_root_double(<2 x double> %x) { 61; SSE-LABEL: square_root_double: 62; SSE: # %bb.0: 63; SSE-NEXT: sqrtsd %xmm0, %xmm0 64; SSE-NEXT: ret{{[l|q]}} 65; 66; AVX-LABEL: square_root_double: 67; AVX: # %bb.0: 68; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 69; AVX-NEXT: ret{{[l|q]}} 70 %y = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %x) 71 %shuf = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> <i32 0, i32 3> 72 ret <2 x double> %shuf 73} 74 75declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) 76declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) 77declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) 78declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) 79 80