• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 --check-prefix=CHECK
2; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=CHECK
3
4; Assertions have been enhanced from utils/update_llc_test_checks.py to show the constant pool values.
5; Use a macosx triple to make sure the format of those constant strings is exact.
6
7; CHECK:       [[SIGNMASK1:L.+]]:
8; CHECK-NEXT:  .long 2147483648
9; CHECK-NEXT:  .long 2147483648
10; CHECK-NEXT:  .long 2147483648
11; CHECK-NEXT:  .long 2147483648
12
13; CHECK:       [[MAGMASK1:L.+]]:
14; CHECK-NEXT:  .long 2147483647
15; CHECK-NEXT:  .long 2147483647
16; CHECK-NEXT:  .long 2147483647
17; CHECK-NEXT:  .long 2147483647
18
19define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind {
20; SSE2-LABEL: v4f32:
21; SSE2:       # %bb.0:
22; SSE2-NEXT:    andps [[SIGNMASK1]](%rip), %xmm1
23; SSE2-NEXT:    andps [[MAGMASK1]](%rip), %xmm0
24; SSE2-NEXT:    orps %xmm1, %xmm0
25; SSE2-NEXT:    retq
26;
27; AVX-LABEL: v4f32:
28; AVX:       # %bb.0:
29; AVX-NEXT:    vandps [[SIGNMASK1]](%rip), %xmm1, %xmm1
30; AVX-NEXT:    vandps [[MAGMASK1]](%rip), %xmm0, %xmm0
31; AVX-NEXT:    vorps %xmm1, %xmm0, %xmm0
32; AVX-NEXT:    retq
33;
34  %tmp = tail call <4 x float> @llvm.copysign.v4f32( <4 x float> %a, <4 x float> %b )
35  ret <4 x float> %tmp
36}
37
38; SSE2:       [[SIGNMASK2:L.+]]:
39; SSE2-NEXT:  .long 2147483648
40; SSE2-NEXT:  .long 2147483648
41; SSE2-NEXT:  .long 2147483648
42; SSE2-NEXT:  .long 2147483648
43
44; SSE2:       [[MAGMASK2:L.+]]:
45; SSE2-NEXT:  .long 2147483647
46; SSE2-NEXT:  .long 2147483647
47; SSE2-NEXT:  .long 2147483647
48; SSE2-NEXT:  .long 2147483647
49
50; AVX:       [[SIGNMASK2:L.+]]:
51; AVX-NEXT:  .long 2147483648
52; AVX-NEXT:  .long 2147483648
53; AVX-NEXT:  .long 2147483648
54; AVX-NEXT:  .long 2147483648
55; AVX-NEXT:  .long 2147483648
56; AVX-NEXT:  .long 2147483648
57; AVX-NEXT:  .long 2147483648
58; AVX-NEXT:  .long 2147483648
59
60; AVX:       [[MAGMASK2:L.+]]:
61; AVX-NEXT:  .long 2147483647
62; AVX-NEXT:  .long 2147483647
63; AVX-NEXT:  .long 2147483647
64; AVX-NEXT:  .long 2147483647
65; AVX-NEXT:  .long 2147483647
66; AVX-NEXT:  .long 2147483647
67; AVX-NEXT:  .long 2147483647
68; AVX-NEXT:  .long 2147483647
69
70define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind {
71; SSE2-LABEL: v8f32:
72; SSE2:       # %bb.0:
73; SSE2-NEXT:    movaps [[SIGNMASK2]](%rip), %xmm4
74; SSE2-NEXT:    andps %xmm4, %xmm2
75; SSE2-NEXT:    movaps [[MAGMASK2]](%rip), %xmm5
76; SSE2-NEXT:    andps %xmm5, %xmm0
77; SSE2-NEXT:    orps %xmm2, %xmm0
78; SSE2-NEXT:    andps %xmm4, %xmm3
79; SSE2-NEXT:    andps %xmm5, %xmm1
80; SSE2-NEXT:    orps %xmm3, %xmm1
81; SSE2-NEXT:    retq
82;
83; AVX-LABEL: v8f32:
84; AVX:       # %bb.0:
85; AVX-NEXT:    vandps [[SIGNMASK2]](%rip), %ymm1, %ymm1
86; AVX-NEXT:    vandps [[MAGMASK2]](%rip), %ymm0, %ymm0
87; AVX-NEXT:    vorps %ymm1, %ymm0, %ymm0
88; AVX-NEXT:    retq
89;
90  %tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b )
91  ret <8 x float> %tmp
92}
93
94; CHECK:        [[SIGNMASK3:L.+]]:
95; CHECK-NEXT:   .quad -9223372036854775808
96; CHECK-NEXT:   .quad -9223372036854775808
97
98; CHECK:        [[MAGMASK3:L.+]]:
99; CHECK-NEXT:   .quad 9223372036854775807
100; CHECK-NEXT:   .quad 9223372036854775807
101
102define <2 x double> @v2f64(<2 x double> %a, <2 x double> %b) nounwind {
103; SSE2-LABEL: v2f64:
104; SSE2:       # %bb.0:
105; SSE2-NEXT:    andps [[SIGNMASK3]](%rip), %xmm1
106; SSE2-NEXT:    andps [[MAGMASK3]](%rip), %xmm0
107; SSE2-NEXT:    orps %xmm1, %xmm0
108; SSE2-NEXT:    retq
109;
110; AVX-LABEL: v2f64:
111; AVX:       # %bb.0:
112; AVX-NEXT:    vandps [[SIGNMASK3]](%rip), %xmm1, %xmm1
113; AVX-NEXT:    vandps [[MAGMASK3]](%rip), %xmm0, %xmm0
114; AVX-NEXT:    vorps %xmm1, %xmm0, %xmm0
115; AVX-NEXT:    retq
116;
117  %tmp = tail call <2 x double> @llvm.copysign.v2f64( <2 x double> %a, <2 x double> %b )
118  ret <2 x double> %tmp
119}
120
121; SSE2:        [[SIGNMASK4:L.+]]:
122; SSE2-NEXT:   .quad -9223372036854775808
123; SSE2-NEXT:   .quad -9223372036854775808
124
125; SSE2:        [[MAGMASK4:L.+]]:
126; SSE2-NEXT:   .quad 9223372036854775807
127; SSE2-NEXT:   .quad 9223372036854775807
128
129; AVX:        [[SIGNMASK4:L.+]]:
130; AVX-NEXT:   .quad -9223372036854775808
131; AVX-NEXT:   .quad -9223372036854775808
132; AVX-NEXT:   .quad -9223372036854775808
133; AVX-NEXT:   .quad -9223372036854775808
134
135; AVX:        [[MAGMASK4:L.+]]:
136; AVX-NEXT:   .quad 9223372036854775807
137; AVX-NEXT:   .quad 9223372036854775807
138; AVX-NEXT:   .quad 9223372036854775807
139; AVX-NEXT:   .quad 9223372036854775807
140
141define <4 x double> @v4f64(<4 x double> %a, <4 x double> %b) nounwind {
142; SSE2-LABEL: v4f64:
143; SSE2:       # %bb.0:
144; SSE2-NEXT:    movaps [[SIGNMASK4]](%rip), %xmm4
145; SSE2-NEXT:    andps %xmm4, %xmm2
146; SSE2-NEXT:    movaps [[MAGMASK4]](%rip), %xmm5
147; SSE2-NEXT:    andps %xmm5, %xmm0
148; SSE2-NEXT:    orps %xmm2, %xmm0
149; SSE2-NEXT:    andps %xmm4, %xmm3
150; SSE2-NEXT:    andps %xmm5, %xmm1
151; SSE2-NEXT:    orps %xmm3, %xmm1
152; SSE2-NEXT:    retq
153;
154; AVX-LABEL: v4f64:
155; AVX:       # %bb.0:
156; AVX-NEXT:    vandps [[SIGNMASK4]](%rip), %ymm1, %ymm1
157; AVX-NEXT:    vandps [[MAGMASK4]](%rip), %ymm0, %ymm0
158; AVX-NEXT:    vorps %ymm1, %ymm0, %ymm0
159; AVX-NEXT:    retq
160;
161  %tmp = tail call <4 x double> @llvm.copysign.v4f64( <4 x double> %a, <4 x double> %b )
162  ret <4 x double> %tmp
163}
164
165declare <4 x float>     @llvm.copysign.v4f32(<4 x float>  %Mag, <4 x float>  %Sgn)
166declare <8 x float>     @llvm.copysign.v8f32(<8 x float>  %Mag, <8 x float>  %Sgn)
167declare <2 x double>    @llvm.copysign.v2f64(<2 x double> %Mag, <2 x double> %Sgn)
168declare <4 x double>    @llvm.copysign.v4f64(<4 x double> %Mag, <4 x double> %Sgn)
169
170