1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 6 7define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) { 8; SSE2-LABEL: test1: 9; SSE2: # %bb.0: 10; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 11; SSE2-NEXT: movapd %xmm1, %xmm0 12; SSE2-NEXT: retq 13; 14; SSE41-LABEL: test1: 15; SSE41: # %bb.0: 16; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3] 17; SSE41-NEXT: retq 18; 19; AVX-LABEL: test1: 20; AVX: # %bb.0: 21; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3] 22; AVX-NEXT: retq 23 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x i32> %A, <4 x i32> %B 24 ret <4 x i32> %select 25} 26 27define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) { 28; SSE2-LABEL: test2: 29; SSE2: # %bb.0: 30; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 31; SSE2-NEXT: retq 32; 33; SSE41-LABEL: test2: 34; SSE41: # %bb.0: 35; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] 36; SSE41-NEXT: retq 37; 38; AVX-LABEL: test2: 39; AVX: # %bb.0: 40; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] 41; AVX-NEXT: retq 42 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x i32> %A, <4 x i32> %B 43 ret <4 x i32> %select 44} 45 46define <4 x float> @test3(<4 x float> %A, <4 x float> %B) { 47; SSE2-LABEL: test3: 48; SSE2: # %bb.0: 49; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 50; SSE2-NEXT: movapd %xmm1, %xmm0 51; SSE2-NEXT: retq 52; 53; SSE41-LABEL: test3: 54; SSE41: # %bb.0: 55; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3] 56; SSE41-NEXT: retq 57; 58; AVX-LABEL: test3: 59; AVX: # %bb.0: 60; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3] 61; AVX-NEXT: retq 62 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x float> %A, <4 x float> %B 63 ret <4 x float> %select 64} 65 66define <4 x float> @test4(<4 x float> %A, <4 x float> %B) { 67; SSE2-LABEL: test4: 68; SSE2: # %bb.0: 69; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 70; SSE2-NEXT: retq 71; 72; SSE41-LABEL: test4: 73; SSE41: # %bb.0: 74; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] 75; SSE41-NEXT: retq 76; 77; AVX-LABEL: test4: 78; AVX: # %bb.0: 79; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3] 80; AVX-NEXT: retq 81 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x float> %A, <4 x float> %B 82 ret <4 x float> %select 83} 84