1; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 2 3 4define i64 @test1(i8* %data) { 5; CHECK-LABEL: test1: 6; CHECK: movzbl 7; CHECK-NEXT: shlq 8; CHECK-NEXT: andl 9; CHECK-NEXT: retq 10entry: 11 %bf.load = load i8, i8* %data, align 4 12 %bf.clear = shl i8 %bf.load, 2 13 %0 = and i8 %bf.clear, 60 14 %mul = zext i8 %0 to i64 15 ret i64 %mul 16} 17 18define i8* @test2(i8* %data) { 19; CHECK-LABEL: test2: 20; CHECK: movzbl 21; CHECK-NEXT: andl 22; CHECK-NEXT: leaq 23; CHECK-NEXT: retq 24entry: 25 %bf.load = load i8, i8* %data, align 4 26 %bf.clear = shl i8 %bf.load, 2 27 %0 = and i8 %bf.clear, 60 28 %mul = zext i8 %0 to i64 29 %add.ptr = getelementptr inbounds i8, i8* %data, i64 %mul 30 ret i8* %add.ptr 31} 32 33; If the shift op is SHL, the logic op can only be AND. 34define i64 @test3(i8* %data) { 35; CHECK-LABEL: test3: 36; CHECK: movb 37; CHECK-NEXT: shlb 38; CHECK-NEXT: xorb 39; CHECK-NEXT: movzbl 40; CHECK-NEXT: retq 41entry: 42 %bf.load = load i8, i8* %data, align 4 43 %bf.clear = shl i8 %bf.load, 2 44 %0 = xor i8 %bf.clear, 60 45 %mul = zext i8 %0 to i64 46 ret i64 %mul 47} 48 49define i64 @test4(i8* %data) { 50; CHECK-LABEL: test4: 51; CHECK: movzbl 52; CHECK-NEXT: shrq 53; CHECK-NEXT: andl 54; CHECK-NEXT: retq 55entry: 56 %bf.load = load i8, i8* %data, align 4 57 %bf.clear = lshr i8 %bf.load, 2 58 %0 = and i8 %bf.clear, 60 59 %1 = zext i8 %0 to i64 60 ret i64 %1 61} 62 63define i64 @test5(i8* %data) { 64; CHECK-LABEL: test5: 65; CHECK: movzbl 66; CHECK-NEXT: shrq 67; CHECK-NEXT: xorq 68; CHECK-NEXT: retq 69entry: 70 %bf.load = load i8, i8* %data, align 4 71 %bf.clear = lshr i8 %bf.load, 2 72 %0 = xor i8 %bf.clear, 60 73 %1 = zext i8 %0 to i64 74 ret i64 %1 75} 76 77define i64 @test6(i8* %data) { 78; CHECK-LABEL: test6: 79; CHECK: movzbl 80; CHECK-NEXT: shrq 81; CHECK-NEXT: orq 82; CHECK-NEXT: retq 83entry: 84 %bf.load = load i8, i8* %data, align 4 85 %bf.clear = lshr i8 %bf.load, 2 86 %0 = or i8 %bf.clear, 60 87 %1 = zext i8 %0 to i64 88 ret i64 %1 89} 90 91; Load is folded with sext. 92define i64 @test8(i8* %data) { 93; CHECK-LABEL: test8: 94; CHECK: movsbl 95; CHECK-NEXT: movzwl 96; CHECK-NEXT: shrl 97; CHECK-NEXT: orl 98entry: 99 %bf.load = load i8, i8* %data, align 4 100 %ext = sext i8 %bf.load to i16 101 %bf.clear = lshr i16 %ext, 2 102 %0 = or i16 %bf.clear, 60 103 %1 = zext i16 %0 to i64 104 ret i64 %1 105} 106 107