1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3// Invalid element kind. 4zip1 z10.h, z22.h, z31.x 5// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier 6// CHECK-NEXT: zip1 z10.h, z22.h, z31.x 7// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 8 9// Element size specifiers should match. 10zip1 z10.h, z3.h, z15.b 11// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 12// CHECK-NEXT: zip1 z10.h, z3.h, z15.b 13// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 14 15// Too few operands 16zip1 z1.h, z2.h 17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction 18// CHECK-NEXT: zip1 z1.h, z2.h 19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 20 21// z32 is not a valid SVE data register 22zip1 z1.s, z2.s, z32.s 23// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 24// CHECK-NEXT: zip1 z1.s, z2.s, z32.s 25// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 26 27// p16 is not a valid SVE predicate register 28zip1 p1.s, p2.s, p16.s 29// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 30// CHECK-NEXT: zip1 p1.s, p2.s, p16.s 31// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 32 33// Combining data and predicate registers as operands 34zip1 z1.s, z2.s, p3.s 35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 36// CHECK-NEXT: zip1 z1.s, z2.s, p3.s 37// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 38 39// Combining predicate and data registers as operands 40zip1 p1.s, p2.s, z3.s 41// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 42// CHECK-NEXT: zip1 p1.s, p2.s, z3.s 43// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 44 45 46// --------------------------------------------------------------------------// 47// Negative tests for instructions that are incompatible with movprfx 48 49movprfx z31.d, p0/z, z6.d 50zip1 z31.d, z31.d, z31.d 51// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 52// CHECK-NEXT: zip1 z31.d, z31.d, z31.d 53// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 54 55movprfx z31, z6 56zip1 z31.d, z31.d, z31.d 57// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 58// CHECK-NEXT: zip1 z31.d, z31.d, z31.d 59// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 60