1@ RUN: llvm-mc -triple thumbv7a--none-eabi -arm-implicit-it=always < %s -show-encoding | FileCheck %s 2 3@ Single instruction 4 .section test1 5@ CHECK-LABEL: test1 6 addeq r0, #1 7@ CHECK: it eq 8@ CHECK: addeq 9 10@ Multiple instructions, same condition 11 .section test2 12@ CHECK-LABEL: test2 13 addeq r0, #1 14 addeq r0, #1 15 addeq r0, #1 16 addeq r0, #1 17@ CHECK: itttt eq 18@ CHECK: addeq 19@ CHECK: addeq 20@ CHECK: addeq 21@ CHECK: addeq 22 23@ Multiple instructions, equal but opposite conditions 24 .section test3 25@ CHECK-LABEL: test3 26 addeq r0, #1 27 addne r0, #1 28 addeq r0, #1 29 addne r0, #1 30@ CHECK: itete eq 31@ CHECK: addeq 32@ CHECK: addne 33@ CHECK: addeq 34@ CHECK: addne 35 36@ Multiple instructions, unrelated conditions 37 .section test4 38@ CHECK-LABEL: test4 39 addeq r0, #1 40 addlt r0, #1 41 addeq r0, #1 42 addge r0, #1 43@ CHECK: it eq 44@ CHECK: addeq 45@ CHECK: it lt 46@ CHECK: addlt 47@ CHECK: it eq 48@ CHECK: addeq 49@ CHECK: it ge 50@ CHECK: addge 51 52@ More than 4 instructions eligible for a block 53 .section test5 54@ CHECK-LABEL: test5 55 addeq r0, #1 56 addeq r0, #1 57 addeq r0, #1 58 addeq r0, #1 59 addeq r0, #1 60 addeq r0, #1 61@ CHECK: itttt eq 62@ CHECK: addeq 63@ CHECK: addeq 64@ CHECK: addeq 65@ CHECK: addeq 66@ CHECK: itt eq 67@ CHECK: addeq 68@ CHECK: addeq 69 70@ Flush on a label 71 .section test6 72@ CHECK-LABEL: test6 73 addeq r0, #1 74label: 75 addeq r0, #1 765: 77 addeq r0, #1 78@ CHECK: it eq 79@ CHECK: addeq 80@ CHECK: it eq 81@ CHECK: addeq 82@ CHECK: it eq 83@ CHECK: addeq 84 85@ Flush on a section-change directive 86 .section test7a 87@ CHECK-LABEL: test7a 88 addeq r0, #1 89 .section test7b 90 addeq r0, #1 91 .previous 92 addeq r0, #1 93 .pushsection test7c 94 addeq r0, #1 95 .popsection 96 addeq r0, #1 97@ CHECK: it eq 98@ CHECK: addeq 99@ CHECK: it eq 100@ CHECK: addeq 101@ CHECK: it eq 102@ CHECK: addeq 103@ CHECK: it eq 104@ CHECK: addeq 105@ CHECK: it eq 106@ CHECK: addeq 107 108@ Flush on an ISA change (even to the same ISA) 109 .section test8 110@ CHECK-LABEL: test8 111 addeq r0, #1 112 .thumb 113 addeq r0, #1 114 .arm 115 addeq r0, #1 116 .thumb 117 addeq r0, #1 118@ CHECK: it eq 119@ CHECK: addeq 120@ CHECK: it eq 121@ CHECK: addeq 122@ CHECK: addeq 123@ CHECK: it eq 124@ CHECK: addeq 125 126@ Flush on an arch, cpu or fpu change 127 .section test9 128@ CHECK-LABEL: test9 129 addeq r0, #1 130 .arch armv7-a 131 addeq r0, #1 132 .cpu cortex-a15 133 addeq r0, #1 134 .fpu vfpv3 135 addeq r0, #1 136@ CHECK: it eq 137@ CHECK: addeq 138@ CHECK: it eq 139@ CHECK: addeq 140@ CHECK: it eq 141@ CHECK: addeq 142@ CHECK: it eq 143@ CHECK: addeq 144 145@ Flush on an unpredicable instruction 146 .section test10 147@ CHECK-LABEL: test10 148 addeq r0, #1 149 setend le 150 addeq r0, #1 151 hvc #0 152 addeq r0, #1 153@ CHECK: it eq 154@ CHECK: addeq 155@ CHECK: setend le 156@ CHECK: it eq 157@ CHECK: addeq 158@ CHECK: hvc.w #0 159@ CHECK: it eq 160@ CHECK: addeq 161 162@ Flush when reaching an explicit IT instruction 163 .section test11 164@ CHECK-LABEL: test11 165 addeq r0, #1 166 it eq 167 addeq r0, #1 168@ CHECK: it eq 169@ CHECK: addeq 170@ CHECK: it eq 171@ CHECK: addeq 172 173@ Don't extend an explicit IT instruction 174 .section test12 175@ CHECK-LABEL: test12 176 it eq 177 addeq r0, #1 178 addeq r0, #1 179@ CHECK: it eq 180@ CHECK: addeq 181@ CHECK: it eq 182@ CHECK: addeq 183 184@ Branch-like instructions can only be used at the end of an IT block, so 185@ terminate it. 186 .section test13 187@ CHECK-LABEL: test13 188 .cpu cortex-a15 189 addeq pc, r0 190 addeq pc, sp, pc 191 ldreq pc, [r0, #4] 192 ldreq pc, [r0, #-4] 193 ldreq pc, [r0, r1] 194 ldreq pc, [pc, #-0] 195 moveq pc, r0 196 bleq #4 197 blxeq #4 198 blxeq r0 199 bxeq r0 200 bxjeq r0 201 tbbeq [r0, r1] 202 tbheq [r0, r1, lsl #1] 203 ereteq 204 rfeiaeq r0 205 rfeiaeq r0! 206 rfedbeq r0 207 rfedbeq r0! 208 smceq #0 209 ldmiaeq r0, {pc} 210 ldmiaeq r0!, {r1, pc} 211 ldmdbeq r0, {pc} 212 ldmdbeq r0!, {r1, pc} 213 popeq {pc} 214 .arch armv8-m.main 215 bxnseq r0 216 blxnseq r0 217@ CHECK: it eq 218@ CHECK: addeq pc, r0 219@ CHECK: it eq 220@ CHECK: addeq pc, sp, pc 221@ CHECK: it eq 222@ CHECK: ldreq.w pc, [r0, #4] 223@ CHECK: it eq 224@ CHECK: ldreq pc, [r0, #-4] 225@ CHECK: it eq 226@ CHECK: ldreq.w pc, [r0, r1] 227@ CHECK: it eq 228@ CHECK: ldreq.w pc, [pc, #-0] 229@ CHECK: it eq 230@ CHECK: moveq pc, r0 231@ CHECK: it eq 232@ CHECK: bleq #4 233@ CHECK: it eq 234@ CHECK: blxeq #4 235@ CHECK: it eq 236@ CHECK: blxeq r0 237@ CHECK: it eq 238@ CHECK: bxeq r0 239@ CHECK: it eq 240@ CHECK: bxjeq r0 241@ CHECK: it eq 242@ CHECK: tbbeq [r0, r1] 243@ CHECK: it eq 244@ CHECK: tbheq [r0, r1, lsl #1] 245@ CHECK: it eq 246@ CHECK: ereteq 247@ CHECK: it eq 248@ CHECK: rfeiaeq r0 249@ CHECK: it eq 250@ CHECK: rfeiaeq r0! 251@ CHECK: it eq 252@ CHECK: rfedbeq r0 253@ CHECK: it eq 254@ CHECK: rfedbeq r0! 255@ CHECK: it eq 256@ CHECK: smceq #0 257@ CHECK: it eq 258@ CHECK: ldmeq.w r0, {pc} 259@ CHECK: it eq 260@ CHECK: ldmeq.w r0!, {r1, pc} 261@ CHECK: it eq 262@ CHECK: ldmdbeq r0, {pc} 263@ CHECK: it eq 264@ CHECK: ldmdbeq r0!, {r1, pc} 265@ CHECK: it eq 266@ CHECK: popeq {pc} 267@ CHECK: it eq 268@ CHECK: bxnseq r0 269@ CHECK: it eq 270@ CHECK: blxnseq r0 271 272@ Thumb 16-bit ALU instructions set the flags iff they are not in an IT block, 273@ so instruction matching must change when generating an implicit IT block. 274 .section test14 275@ CHECK-LABEL: test14 276@ Outside an IT block, the 16-bit encoding must set flags 277 add r0, #1 278@ CHECK:add.w r0, r0, #1 @ encoding: [0x00,0xf1,0x01,0x00] 279 adds r0, #1 280@ CHECK: adds r0, #1 @ encoding: [0x01,0x30] 281@ Inside an IT block, the 16-bit encoding can not set flags 282 addeq r0, #1 283@ CHECK: itt eq 284@ CHECK: addeq r0, #1 @ encoding: [0x01,0x30] 285 addseq r0, #1 286@ CHECK: addseq.w r0, r0, #1 @ encoding: [0x10,0xf1,0x01,0x00] 287 288@ Some variants of the B instruction have their own condition code field, and 289@ are not valid in IT blocks. 290 .section test15 291@ CHECK-LABEL: test15 292@ Outside of an IT block, the 4 variants (narrow/wide, 293@ predicated/non-predicated) are selected as normal, and the predicated 294@ encodings are used instead of opening a new IT block: 295 b #0x100 296@ CHECK: b #256 @ encoding: [0x80,0xe0] 297 b #0x800 298@ CHECK: b.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc] 299 beq #0x4 300@ CHECK-NOT: it 301@ CHECK: beq #4 @ encoding: [0x02,0xd0] 302 beq #0x100 303@ CHECK-NOT: it 304@ CHECK: beq.w #256 @ encoding: [0x00,0xf0,0x80,0x80] 305 306@ We could support "beq #0x100000" to "beq #0x1fffffc" by using t2Bcc in 307@ an IT block (these currently fail as the target is out of range). However, long 308@ ranges like this are rarely assembly-time constants, so this probably isn't 309@ worth doing. 310 311@ If we already have an open IT block, we can use the non-predicated encodings, 312@ which have a greater range: 313 addeq r0, r1 314 beq #0x4 315@ CHECK: itt eq 316@ CHECK: addeq r0, r1 317@ CHECK: beq #4 @ encoding: [0x02,0xe0] 318 addeq r0, r1 319 beq #0x100 320@ CHECK: itt eq 321@ CHECK: addeq r0, r1 322@ CHECK: beq #256 @ encoding: [0x80,0xe0] 323 addeq r0, r1 324 beq #0x800 325@ CHECK: itt eq 326@ CHECK: addeq r0, r1 327@ CHECK: beq.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc] 328 329@ If we have an open but incompatible IT block, we close it and use the 330@ self-predicated encodings, without an IT block: 331 addeq r0, r1 332 bgt #0x4 333@ CHECK: it eq 334@ CHECK: addeq r0, r1 335@ CHECK: bgt #4 @ encoding: [0x02,0xdc] 336 addeq r0, r1 337 bgt #0x100 338@ CHECK: it eq 339@ CHECK: addeq r0, r1 340@ CHECK: bgt.w #256 @ encoding: [0x00,0xf3,0x80,0x80] 341 342@ Breakpoint instructions are allowed in IT blocks, but are always executed 343@ regardless of the condition flags. We could continue an IT block through 344@ them, but currently do not. 345 .section test16 346@ CHECK-LABEL: test16 347 addeq r0, r1 348 bkpt #0 349 addeq r0, r1 350@ CHECK: it eq 351@ CHECK: addeq r0, r1 352@ CHECK: bkpt #0 353@ CHECK: it eq 354@ CHECK: addeq r0, r1 355 356@ The .if directive causes entire assembly statments to be dropped before they 357@ reach the IT block generation code. This happens to be exactly what we want, 358@ and allows IT blocks to extend into and out of .if blocks. Only one arm of the 359@ .if will be seen by the IT state tracking code, so the subeq shouldn't have 360@ any effect here. 361 .section test17 362@ CHECK-LABEL: test17 363 addeq r0, r1 364 .if 1 365 addeq r0, r1 366 .else 367 subeq r0, r1 368 .endif 369 addeq r0, r1 370@ CHECK: ittt eq 371@ CHECK: addeq 372@ CHECK: addeq 373@ CHECK: addeq 374 375@ TODO: There are some other directives which we could continue through, such 376@ as .set and .global, but we currently conservatively flush the IT block before 377@ every directive (except for .if and friends, which are handled separately). 378 .section test18 379@ CHECK-LABEL: test18 380 addeq r0, r1 381 .set s, 1 382 addeq r0, r1 383@ CHECK: it eq 384@ CHECK: addeq 385@ CHECK: it eq 386@ CHECK: addeq 387 388@ The .rept directive can be used to create long IT blocks. 389 .section test19 390@ CHECK-LABEL: test19 391 .rept 3 392 addeq r0, r1 393 subne r0, r1 394 .endr 395@ CHECK: itete eq 396@ CHECK: addeq r0, r1 397@ CHECK: subne r0, r0, r1 398@ CHECK: addeq r0, r1 399@ CHECK: subne r0, r0, r1 400@ CHECK: ite eq 401@ CHECK: addeq r0, r1 402@ CHECK: subne r0, r0, r1 403 404@ Flush at end of file 405 .section test99 406@ CHECK-LABEL: test99 407 addeq r0, #1 408@ CHECK: it eq 409@ CHECK: addeq 410