1// RUN: llvm-mc -triple=powerpc64le-pc-linux -filetype=obj %s -o - | \ 2// RUN: llvm-readobj -r | FileCheck %s 3 4// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \ 5// RUN: llvm-readobj -r | FileCheck %s 6 7// Verify we can handle all the tprel symbol modifiers for local exec tls. 8// Tests 16 bit offsets on both DS-form and D-form instructions, 32 bit 9// adjusted and non-adjusted offsets and 64 bit adjusted and non-adjusted 10// offsets. 11 .text 12 .abiversion 2 13 14 .globl short_offset_ds 15 .p2align 4 16 .type short_offset_ds,@function 17short_offset_ds: 18 lwa 3, i@tprel(13) 19 blr 20 21 .globl short_offset 22 .p2align 4 23 .type short_offset,@function 24short_offset: 25 addi 3, 13, i@tprel 26 blr 27 28 .globl medium_offset 29 .p2align 4 30 .type medium_offset,@function 31medium_offset: 32 addis 3, 13, i@tprel@ha 33 lwa 3, i@tprel@l(3) 34 blr 35 36 .globl medium_not_adjusted 37 .p2align 4 38 .type medium_not_adjusted,@function 39medium_not_adjusted: 40 lis 3, i@tprel@h 41 ori 3, 3, i@tprel@l 42 lwax 3, 3, 13 43 blr 44 45 .globl large_offset 46 .p2align 4 47 .type large_offset,@function 48large_offset: 49 lis 3, i@tprel@highesta 50 ori 3, 3, i@tprel@highera 51 sldi 3, 3, 32 52 oris 3, 3, i@tprel@higha 53 addi 3, 3, i@tprel@l 54 lwax 3, 3, 13 55 blr 56 57 .globl not_adjusted 58 .p2align 4 59 .type not_adjusted,@function 60not_adjusted: 61 lis 3, i@tprel@highest 62 ori 3, 3, i@tprel@higher 63 sldi 3, 3, 32 64 oris 3, 3, i@tprel@high 65 ori 3, 3, i@tprel@l 66 lwax 3, 3, 13 67 blr 68 69 .type i,@object 70 .section .tdata,"awT",@progbits 71 .p2align 2 72i: 73 .long 55 74 .size i, 4 75 76 .type j,@object 77 .data 78 .p2align 3 79j: 80 .quad i@tprel 81 .size j, 8 82 83 84# CHECK: Relocations [ 85# CHECK: Section {{.*}} .rela.text { 86# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_DS i 87# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16 i 88# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HA i 89# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO_DS i 90# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HI i 91# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i 92# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHESTA i 93# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHERA i 94# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHA i 95# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i 96# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHEST i 97# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGHER i 98# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_HIGH i 99# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL16_LO i 100# CHECK: } 101# CHECK: Section (6) .rela.data { 102# CHECK: 0x{{[0-9A-F]+}} R_PPC64_TPREL64 i 103# CHECK: } 104# CHECK: ] 105