1# For zEC12 only. 2# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=zEC12 < %s 2> %t 3# RUN: FileCheck < %t %s 4# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=arch10 < %s 2> %t 5# RUN: FileCheck < %t %s 6 7#CHECK: error: invalid operand 8#CHECK: bpp -1, 0, 0 9#CHECK: error: invalid operand 10#CHECK: bpp 16, 0, 0 11#CHECK: error: offset out of range 12#CHECK: bpp 0, -0x10002, 0 13#CHECK: error: offset out of range 14#CHECK: bpp 0, -1, 0 15#CHECK: error: offset out of range 16#CHECK: bpp 0, 1, 0 17#CHECK: error: offset out of range 18#CHECK: bpp 0, 0x10000, 0 19#CHECK: error: invalid operand 20#CHECK: bpp 0, 0, -1 21#CHECK: error: invalid operand 22#CHECK: bpp 0, 0, 4096 23 24 bpp -1, 0, 0 25 bpp 16, 0, 0 26 bpp 0, -0x10002, 0 27 bpp 0, -1, 0 28 bpp 0, 1, 0 29 bpp 0, 0x10000, 0 30 bpp 0, 0, -1 31 bpp 0, 0, 4096 32 33#CHECK: error: invalid operand 34#CHECK: bprp -1, 0, 0 35#CHECK: error: invalid operand 36#CHECK: bprp 16, 0, 0 37#CHECK: error: offset out of range 38#CHECK: bprp 0, -0x1002, 0 39#CHECK: error: offset out of range 40#CHECK: bprp 0, -1, 0 41#CHECK: error: offset out of range 42#CHECK: bprp 0, 1, 0 43#CHECK: error: offset out of range 44#CHECK: bprp 0, 0x1000, 0 45#CHECK: error: offset out of range 46#CHECK: bprp 0, 0, -0x1000002 47#CHECK: error: offset out of range 48#CHECK: bprp 0, 0, -1 49#CHECK: error: offset out of range 50#CHECK: bprp 0, 0, 1 51#CHECK: error: offset out of range 52#CHECK: bprp 0, 0, 0x1000000 53 54 bprp -1, 0, 0 55 bprp 16, 0, 0 56 bprp 0, -0x1002, 0 57 bprp 0, -1, 0 58 bprp 0, 1, 0 59 bprp 0, 0x1000, 0 60 bprp 0, 0, -0x1000002 61 bprp 0, 0, -1 62 bprp 0, 0, 1 63 bprp 0, 0, 0x1000000 64 65#CHECK: error: instruction requires: dfp-packed-conversion 66#CHECK: cdpt %f0, 0(1), 0 67 68 cdpt %f0, 0(1), 0 69 70#CHECK: error: invalid operand 71#CHECK: cdzt %f0, 0(1), -1 72#CHECK: error: invalid operand 73#CHECK: cdzt %f0, 0(1), 16 74#CHECK: error: missing length in address 75#CHECK: cdzt %f0, 0, 0 76#CHECK: error: missing length in address 77#CHECK: cdzt %f0, 0(%r1), 0 78#CHECK: error: invalid operand 79#CHECK: cdzt %f0, 0(0,%r1), 0 80#CHECK: error: invalid operand 81#CHECK: cdzt %f0, 0(257,%r1), 0 82#CHECK: error: invalid operand 83#CHECK: cdzt %f0, -1(1,%r1), 0 84#CHECK: error: invalid operand 85#CHECK: cdzt %f0, 4096(1,%r1), 0 86#CHECK: error: %r0 used in an address 87#CHECK: cdzt %f0, 0(1,%r0), 0 88#CHECK: error: invalid use of indexed addressing 89#CHECK: cdzt %f0, 0(%r1,%r2), 0 90#CHECK: error: unknown token in expression 91#CHECK: cdzt %f0, 0(-), 0 92 93 cdzt %f0, 0(1), -1 94 cdzt %f0, 0(1), 16 95 cdzt %f0, 0, 0 96 cdzt %f0, 0(%r1), 0 97 cdzt %f0, 0(0,%r1), 0 98 cdzt %f0, 0(257,%r1), 0 99 cdzt %f0, -1(1,%r1), 0 100 cdzt %f0, 4096(1,%r1), 0 101 cdzt %f0, 0(1,%r0), 0 102 cdzt %f0, 0(%r1,%r2), 0 103 cdzt %f0, 0(-), 0 104 105#CHECK: error: invalid operand 106#CHECK: clgt %r0, -1, 0 107#CHECK: error: invalid operand 108#CHECK: clgt %r0, 16, 0 109#CHECK: error: invalid operand 110#CHECK: clgt %r0, 12, -524289 111#CHECK: error: invalid operand 112#CHECK: clgt %r0, 12, 524288 113#CHECK: error: invalid use of indexed addressing 114#CHECK: clgt %r0, 12, 0(%r1,%r2) 115 116 clgt %r0, -1, 0 117 clgt %r0, 16, 0 118 clgt %r0, 12, -524289 119 clgt %r0, 12, 524288 120 clgt %r0, 12, 0(%r1,%r2) 121 122#CHECK: error: invalid instruction 123#CHECK: clgtno %r0, 0 124#CHECK: error: invalid instruction 125#CHECK: clgto %r0, 0 126 127 clgtno %r0, 0 128 clgto %r0, 0 129 130#CHECK: error: invalid operand 131#CHECK: clt %r0, -1, 0 132#CHECK: error: invalid operand 133#CHECK: clt %r0, 16, 0 134#CHECK: error: invalid operand 135#CHECK: clt %r0, 12, -524289 136#CHECK: error: invalid operand 137#CHECK: clt %r0, 12, 524288 138#CHECK: error: invalid use of indexed addressing 139#CHECK: clt %r0, 12, 0(%r1,%r2) 140 141 clt %r0, -1, 0 142 clt %r0, 16, 0 143 clt %r0, 12, -524289 144 clt %r0, 12, 524288 145 clt %r0, 12, 0(%r1,%r2) 146 147#CHECK: error: invalid instruction 148#CHECK: cltno %r0, 0 149#CHECK: error: invalid instruction 150#CHECK: clto %r0, 0 151 152 cltno %r0, 0 153 clto %r0, 0 154 155#CHECK: error: instruction requires: dfp-packed-conversion 156#CHECK: cpdt %f0, 0(1), 0 157 158 cpdt %f0, 0(1), 0 159 160#CHECK: error: instruction requires: dfp-packed-conversion 161#CHECK: cpxt %f0, 0(1), 0 162 163 cpxt %f0, 0(1), 0 164 165#CHECK: error: invalid register pair 166#CHECK: crdte %r1, %r0, %r0, 0 167#CHECK: error: invalid register pair 168#CHECK: crdte %r0, %r0, %r1, 0 169#CHECK: error: invalid operand 170#CHECK: crdte %r0, %r0, %r0, -1 171#CHECK: error: invalid operand 172#CHECK: crdte %r0, %r0, %r0, 16 173 174 crdte %r1, %r0, %r0, 0 175 crdte %r0, %r0, %r1, 0 176 crdte %r0, %r0, %r0, -1 177 crdte %r0, %r0, %r0, 16 178 179#CHECK: error: instruction requires: dfp-packed-conversion 180#CHECK: cxpt %f0, 0(1), 0 181 182 cxpt %f0, 0(1), 0 183 184#CHECK: error: invalid operand 185#CHECK: cxzt %f0, 0(1), -1 186#CHECK: error: invalid operand 187#CHECK: cxzt %f0, 0(1), 16 188#CHECK: error: missing length in address 189#CHECK: cxzt %f0, 0, 0 190#CHECK: error: missing length in address 191#CHECK: cxzt %f0, 0(%r1), 0 192#CHECK: error: invalid operand 193#CHECK: cxzt %f0, 0(0,%r1), 0 194#CHECK: error: invalid operand 195#CHECK: cxzt %f0, 0(257,%r1), 0 196#CHECK: error: invalid operand 197#CHECK: cxzt %f0, -1(1,%r1), 0 198#CHECK: error: invalid operand 199#CHECK: cxzt %f0, 4096(1,%r1), 0 200#CHECK: error: %r0 used in an address 201#CHECK: cxzt %f0, 0(1,%r0), 0 202#CHECK: error: invalid use of indexed addressing 203#CHECK: cxzt %f0, 0(%r1,%r2), 0 204#CHECK: error: unknown token in expression 205#CHECK: cxzt %f0, 0(-), 0 206#CHECK: error: invalid register pair 207#CHECK: cxzt %f15, 0(1), 0 208 209 cxzt %f0, 0(1), -1 210 cxzt %f0, 0(1), 16 211 cxzt %f0, 0, 0 212 cxzt %f0, 0(%r1), 0 213 cxzt %f0, 0(0,%r1), 0 214 cxzt %f0, 0(257,%r1), 0 215 cxzt %f0, -1(1,%r1), 0 216 cxzt %f0, 4096(1,%r1), 0 217 cxzt %f0, 0(1,%r0), 0 218 cxzt %f0, 0(%r1,%r2), 0 219 cxzt %f0, 0(-), 0 220 cxzt %f15, 0(1), 0 221 222#CHECK: error: invalid operand 223#CHECK: czdt %f0, 0(1), -1 224#CHECK: error: invalid operand 225#CHECK: czdt %f0, 0(1), 16 226#CHECK: error: missing length in address 227#CHECK: czdt %f0, 0, 0 228#CHECK: error: missing length in address 229#CHECK: czdt %f0, 0(%r1), 0 230#CHECK: error: invalid operand 231#CHECK: czdt %f0, 0(0,%r1), 0 232#CHECK: error: invalid operand 233#CHECK: czdt %f0, 0(257,%r1), 0 234#CHECK: error: invalid operand 235#CHECK: czdt %f0, -1(1,%r1), 0 236#CHECK: error: invalid operand 237#CHECK: czdt %f0, 4096(1,%r1), 0 238#CHECK: error: %r0 used in an address 239#CHECK: czdt %f0, 0(1,%r0), 0 240#CHECK: error: invalid use of indexed addressing 241#CHECK: czdt %f0, 0(%r1,%r2), 0 242#CHECK: error: unknown token in expression 243#CHECK: czdt %f0, 0(-), 0 244 245 czdt %f0, 0(1), -1 246 czdt %f0, 0(1), 16 247 czdt %f0, 0, 0 248 czdt %f0, 0(%r1), 0 249 czdt %f0, 0(0,%r1), 0 250 czdt %f0, 0(257,%r1), 0 251 czdt %f0, -1(1,%r1), 0 252 czdt %f0, 4096(1,%r1), 0 253 czdt %f0, 0(1,%r0), 0 254 czdt %f0, 0(%r1,%r2), 0 255 czdt %f0, 0(-), 0 256 257#CHECK: error: invalid operand 258#CHECK: czxt %f0, 0(1), -1 259#CHECK: error: invalid operand 260#CHECK: czxt %f0, 0(1), 16 261#CHECK: error: missing length in address 262#CHECK: czxt %f0, 0, 0 263#CHECK: error: missing length in address 264#CHECK: czxt %f0, 0(%r1), 0 265#CHECK: error: invalid operand 266#CHECK: czxt %f0, 0(0,%r1), 0 267#CHECK: error: invalid operand 268#CHECK: czxt %f0, 0(257,%r1), 0 269#CHECK: error: invalid operand 270#CHECK: czxt %f0, -1(1,%r1), 0 271#CHECK: error: invalid operand 272#CHECK: czxt %f0, 4096(1,%r1), 0 273#CHECK: error: %r0 used in an address 274#CHECK: czxt %f0, 0(1,%r0), 0 275#CHECK: error: invalid use of indexed addressing 276#CHECK: czxt %f0, 0(%r1,%r2), 0 277#CHECK: error: unknown token in expression 278#CHECK: czxt %f0, 0(-), 0 279#CHECK: error: invalid register pair 280#CHECK: czxt %f15, 0(1), 0 281 282 czxt %f0, 0(1), -1 283 czxt %f0, 0(1), 16 284 czxt %f0, 0, 0 285 czxt %f0, 0(%r1), 0 286 czxt %f0, 0(0,%r1), 0 287 czxt %f0, 0(257,%r1), 0 288 czxt %f0, -1(1,%r1), 0 289 czxt %f0, 4096(1,%r1), 0 290 czxt %f0, 0(1,%r0), 0 291 czxt %f0, 0(%r1,%r2), 0 292 czxt %f0, 0(-), 0 293 czxt %f15, 0(1), 0 294 295#CHECK: error: invalid operand 296#CHECK: lat %r0, -524289 297#CHECK: error: invalid operand 298#CHECK: lat %r0, 524288 299 300 lat %r0, -524289 301 lat %r0, 524288 302 303#CHECK: error: instruction requires: vector 304#CHECK: lcbb %r0, 0, 0 305 306 lcbb %r0, 0, 0 307 308#CHECK: error: invalid operand 309#CHECK: lfhat %r0, -524289 310#CHECK: error: invalid operand 311#CHECK: lfhat %r0, 524288 312 313 lfhat %r0, -524289 314 lfhat %r0, 524288 315 316#CHECK: error: invalid operand 317#CHECK: lgat %r0, -524289 318#CHECK: error: invalid operand 319#CHECK: lgat %r0, 524288 320 321 lgat %r0, -524289 322 lgat %r0, 524288 323 324#CHECK: error: invalid operand 325#CHECK: llgfat %r0, -524289 326#CHECK: error: invalid operand 327#CHECK: llgfat %r0, 524288 328 329 llgfat %r0, -524289 330 llgfat %r0, 524288 331 332#CHECK: error: invalid operand 333#CHECK: llgtat %r0, -524289 334#CHECK: error: invalid operand 335#CHECK: llgtat %r0, 524288 336 337 llgtat %r0, -524289 338 llgtat %r0, 524288 339 340#CHECK: error: instruction requires: load-store-on-cond-2 341#CHECK: locghio %r11, 42 342 343 locghio %r11, 42 344 345#CHECK: error: instruction requires: load-store-on-cond-2 346#CHECK: lochio %r11, 42 347 348 lochio %r11, 42 349 350#CHECK: error: invalid operand 351#CHECK: niai -1, 0 352#CHECK: error: invalid operand 353#CHECK: niai 16, 0 354#CHECK: error: invalid operand 355#CHECK: niai 0, -1 356#CHECK: error: invalid operand 357#CHECK: niai 0, 16 358 359 niai -1, 0 360 niai 16, 0 361 niai 0, -1 362 niai 0, 16 363 364#CHECK: error: invalid operand 365#CHECK: ntstg %r0, -524289 366#CHECK: error: invalid operand 367#CHECK: ntstg %r0, 524288 368 369 ntstg %r0, -524289 370 ntstg %r0, 524288 371 372#CHECK: error: invalid operand 373#CHECK: ppa %r0, %r0, -1 374#CHECK: error: invalid operand 375#CHECK: ppa %r0, %r0, 16 376 377 ppa %r0, %r0, -1 378 ppa %r0, %r0, 16 379 380#CHECK: error: instruction requires: message-security-assist-extension5 381#CHECK: ppno %r2, %r4 382 383 ppno %r2, %r4 384 385#CHECK: error: invalid operand 386#CHECK: risbgn %r0,%r0,0,0,-1 387#CHECK: error: invalid operand 388#CHECK: risbgn %r0,%r0,0,0,64 389#CHECK: error: invalid operand 390#CHECK: risbgn %r0,%r0,0,-1,0 391#CHECK: error: invalid operand 392#CHECK: risbgn %r0,%r0,0,256,0 393#CHECK: error: invalid operand 394#CHECK: risbgn %r0,%r0,-1,0,0 395#CHECK: error: invalid operand 396#CHECK: risbgn %r0,%r0,256,0,0 397 398 risbgn %r0,%r0,0,0,-1 399 risbgn %r0,%r0,0,0,64 400 risbgn %r0,%r0,0,-1,0 401 risbgn %r0,%r0,0,256,0 402 risbgn %r0,%r0,-1,0,0 403 risbgn %r0,%r0,256,0,0 404 405#CHECK: error: invalid operand 406#CHECK: tabort -1 407#CHECK: error: invalid operand 408#CHECK: tabort 4096 409#CHECK: error: invalid use of indexed addressing 410#CHECK: tabort 0(%r1,%r2) 411 412 tabort -1 413 tabort 4096 414 tabort 0(%r1,%r2) 415 416#CHECK: error: invalid operand 417#CHECK: tbegin -1, 0 418#CHECK: error: invalid operand 419#CHECK: tbegin 4096, 0 420#CHECK: error: invalid use of indexed addressing 421#CHECK: tbegin 0(%r1,%r2), 0 422#CHECK: error: invalid operand 423#CHECK: tbegin 0, -1 424#CHECK: error: invalid operand 425#CHECK: tbegin 0, 65536 426 427 tbegin -1, 0 428 tbegin 4096, 0 429 tbegin 0(%r1,%r2), 0 430 tbegin 0, -1 431 tbegin 0, 65536 432 433#CHECK: error: invalid operand 434#CHECK: tbeginc -1, 0 435#CHECK: error: invalid operand 436#CHECK: tbeginc 4096, 0 437#CHECK: error: invalid use of indexed addressing 438#CHECK: tbeginc 0(%r1,%r2), 0 439#CHECK: error: invalid operand 440#CHECK: tbeginc 0, -1 441#CHECK: error: invalid operand 442#CHECK: tbeginc 0, 65536 443 444 tbeginc -1, 0 445 tbeginc 4096, 0 446 tbeginc 0(%r1,%r2), 0 447 tbeginc 0, -1 448 tbeginc 0, 65536 449 450#CHECK: error: instruction requires: vector 451#CHECK: vab %v0, %v0, %v0 452#CHECK: error: instruction requires: vector 453#CHECK: vaf %v0, %v0, %v0 454#CHECK: error: instruction requires: vector 455#CHECK: vag %v0, %v0, %v0 456#CHECK: error: instruction requires: vector 457#CHECK: vah %v0, %v0, %v0 458#CHECK: error: instruction requires: vector 459#CHECK: vaq %v0, %v0, %v0 460 461 vab %v0, %v0, %v0 462 vaf %v0, %v0, %v0 463 vag %v0, %v0, %v0 464 vah %v0, %v0, %v0 465 vaq %v0, %v0, %v0 466 467#CHECK: error: instruction requires: vector 468#CHECK: vaccb %v0, %v0, %v0 469#CHECK: error: instruction requires: vector 470#CHECK: vaccf %v0, %v0, %v0 471#CHECK: error: instruction requires: vector 472#CHECK: vaccg %v0, %v0, %v0 473#CHECK: error: instruction requires: vector 474#CHECK: vacch %v0, %v0, %v0 475#CHECK: error: instruction requires: vector 476#CHECK: vaccq %v0, %v0, %v0 477 478 vaccb %v0, %v0, %v0 479 vaccf %v0, %v0, %v0 480 vaccg %v0, %v0, %v0 481 vacch %v0, %v0, %v0 482 vaccq %v0, %v0, %v0 483 484#CHECK: error: instruction requires: vector 485#CHECK: vacccq %v0, %v0, %v0, %v0 486 487 vacccq %v0, %v0, %v0, %v0 488 489#CHECK: error: instruction requires: vector 490#CHECK: vacq %v0, %v0, %v0, %v0 491 492 vacq %v0, %v0, %v0, %v0 493 494#CHECK: error: instruction requires: vector 495#CHECK: vavgb %v0, %v0, %v0 496#CHECK: error: instruction requires: vector 497#CHECK: vavgf %v0, %v0, %v0 498#CHECK: error: instruction requires: vector 499#CHECK: vavgg %v0, %v0, %v0 500#CHECK: error: instruction requires: vector 501#CHECK: vavgh %v0, %v0, %v0 502 503 vavgb %v0, %v0, %v0 504 vavgf %v0, %v0, %v0 505 vavgg %v0, %v0, %v0 506 vavgh %v0, %v0, %v0 507 508#CHECK: error: instruction requires: vector 509#CHECK: vavglb %v0, %v0, %v0 510#CHECK: error: instruction requires: vector 511#CHECK: vavglf %v0, %v0, %v0 512#CHECK: error: instruction requires: vector 513#CHECK: vavglg %v0, %v0, %v0 514#CHECK: error: instruction requires: vector 515#CHECK: vavglh %v0, %v0, %v0 516 517 vavglb %v0, %v0, %v0 518 vavglf %v0, %v0, %v0 519 vavglg %v0, %v0, %v0 520 vavglh %v0, %v0, %v0 521 522#CHECK: error: instruction requires: vector 523#CHECK: vcdgb %v0, %v0, 0, 0 524 525 vcdgb %v0, %v0, 0, 0 526 527#CHECK: error: instruction requires: vector 528#CHECK: vcdlgb %v0, %v0, 0, 0 529 530 vcdlgb %v0, %v0, 0, 0 531 532#CHECK: error: instruction requires: vector 533#CHECK: vceqb %v0, %v0, %v0 534#CHECK: error: instruction requires: vector 535#CHECK: vceqbs %v0, %v0, %v0 536#CHECK: error: instruction requires: vector 537#CHECK: vceqf %v0, %v0, %v0 538#CHECK: error: instruction requires: vector 539#CHECK: vceqfs %v0, %v0, %v0 540#CHECK: error: instruction requires: vector 541#CHECK: vceqg %v0, %v0, %v0 542#CHECK: error: instruction requires: vector 543#CHECK: vceqgs %v0, %v0, %v0 544#CHECK: error: instruction requires: vector 545#CHECK: vceqh %v0, %v0, %v0 546#CHECK: error: instruction requires: vector 547#CHECK: vceqhs %v0, %v0, %v0 548 549 vceqb %v0, %v0, %v0 550 vceqbs %v0, %v0, %v0 551 vceqf %v0, %v0, %v0 552 vceqfs %v0, %v0, %v0 553 vceqg %v0, %v0, %v0 554 vceqgs %v0, %v0, %v0 555 vceqh %v0, %v0, %v0 556 vceqhs %v0, %v0, %v0 557 558#CHECK: error: instruction requires: vector 559#CHECK: vcgdb %v0, %v0, 0, 0 560 561 vcgdb %v0, %v0, 0, 0 562 563#CHECK: error: instruction requires: vector 564#CHECK: vchb %v0, %v0, %v0 565#CHECK: error: instruction requires: vector 566#CHECK: vchbs %v0, %v0, %v0 567#CHECK: error: instruction requires: vector 568#CHECK: vchf %v0, %v0, %v0 569#CHECK: error: instruction requires: vector 570#CHECK: vchfs %v0, %v0, %v0 571#CHECK: error: instruction requires: vector 572#CHECK: vchg %v0, %v0, %v0 573#CHECK: error: instruction requires: vector 574#CHECK: vchgs %v0, %v0, %v0 575#CHECK: error: instruction requires: vector 576#CHECK: vchh %v0, %v0, %v0 577#CHECK: error: instruction requires: vector 578#CHECK: vchhs %v0, %v0, %v0 579 580 vchb %v0, %v0, %v0 581 vchbs %v0, %v0, %v0 582 vchf %v0, %v0, %v0 583 vchfs %v0, %v0, %v0 584 vchg %v0, %v0, %v0 585 vchgs %v0, %v0, %v0 586 vchh %v0, %v0, %v0 587 vchhs %v0, %v0, %v0 588 589#CHECK: error: instruction requires: vector 590#CHECK: vchlb %v0, %v0, %v0 591#CHECK: error: instruction requires: vector 592#CHECK: vchlbs %v0, %v0, %v0 593#CHECK: error: instruction requires: vector 594#CHECK: vchlf %v0, %v0, %v0 595#CHECK: error: instruction requires: vector 596#CHECK: vchlfs %v0, %v0, %v0 597#CHECK: error: instruction requires: vector 598#CHECK: vchlg %v0, %v0, %v0 599#CHECK: error: instruction requires: vector 600#CHECK: vchlgs %v0, %v0, %v0 601#CHECK: error: instruction requires: vector 602#CHECK: vchlh %v0, %v0, %v0 603#CHECK: error: instruction requires: vector 604#CHECK: vchlhs %v0, %v0, %v0 605 606 vchlb %v0, %v0, %v0 607 vchlbs %v0, %v0, %v0 608 vchlf %v0, %v0, %v0 609 vchlfs %v0, %v0, %v0 610 vchlg %v0, %v0, %v0 611 vchlgs %v0, %v0, %v0 612 vchlh %v0, %v0, %v0 613 vchlhs %v0, %v0, %v0 614 615#CHECK: error: instruction requires: vector 616#CHECK: vcksm %v0, %v0, %v0 617 618 vcksm %v0, %v0, %v0 619 620#CHECK: error: instruction requires: vector 621#CHECK: vclgdb %v0, %v0, 0, 0 622 623 vclgdb %v0, %v0, 0, 0 624 625#CHECK: error: instruction requires: vector 626#CHECK: vclzb %v0, %v0 627#CHECK: error: instruction requires: vector 628#CHECK: vclzf %v0, %v0 629#CHECK: error: instruction requires: vector 630#CHECK: vclzg %v0, %v0 631#CHECK: error: instruction requires: vector 632#CHECK: vclzh %v0, %v0 633 634 vclzb %v0, %v0 635 vclzf %v0, %v0 636 vclzg %v0, %v0 637 vclzh %v0, %v0 638 639#CHECK: error: instruction requires: vector 640#CHECK: vctzb %v0, %v0 641#CHECK: error: instruction requires: vector 642#CHECK: vctzf %v0, %v0 643#CHECK: error: instruction requires: vector 644#CHECK: vctzg %v0, %v0 645#CHECK: error: instruction requires: vector 646#CHECK: vctzh %v0, %v0 647 648 vctzb %v0, %v0 649 vctzf %v0, %v0 650 vctzg %v0, %v0 651 vctzh %v0, %v0 652 653#CHECK: error: instruction requires: vector 654#CHECK: vecb %v0, %v0 655#CHECK: error: instruction requires: vector 656#CHECK: vecf %v0, %v0 657#CHECK: error: instruction requires: vector 658#CHECK: vecg %v0, %v0 659#CHECK: error: instruction requires: vector 660#CHECK: vech %v0, %v0 661 662 vecb %v0, %v0 663 vecf %v0, %v0 664 vecg %v0, %v0 665 vech %v0, %v0 666 667#CHECK: error: instruction requires: vector 668#CHECK: veclb %v0, %v0 669#CHECK: error: instruction requires: vector 670#CHECK: veclf %v0, %v0 671#CHECK: error: instruction requires: vector 672#CHECK: veclg %v0, %v0 673#CHECK: error: instruction requires: vector 674#CHECK: veclh %v0, %v0 675 676 veclb %v0, %v0 677 veclf %v0, %v0 678 veclg %v0, %v0 679 veclh %v0, %v0 680 681#CHECK: error: instruction requires: vector 682#CHECK: verimb %v0, %v0, %v0, 0 683#CHECK: error: instruction requires: vector 684#CHECK: verimf %v0, %v0, %v0, 0 685#CHECK: error: instruction requires: vector 686#CHECK: verimg %v0, %v0, %v0, 0 687#CHECK: error: instruction requires: vector 688#CHECK: verimh %v0, %v0, %v0, 0 689 690 verimb %v0, %v0, %v0, 0 691 verimf %v0, %v0, %v0, 0 692 verimg %v0, %v0, %v0, 0 693 verimh %v0, %v0, %v0, 0 694 695#CHECK: error: instruction requires: vector 696#CHECK: verllb %v0, %v0, 0 697#CHECK: error: instruction requires: vector 698#CHECK: verllf %v0, %v0, 0 699#CHECK: error: instruction requires: vector 700#CHECK: verllg %v0, %v0, 0 701#CHECK: error: instruction requires: vector 702#CHECK: verllh %v0, %v0, 0 703 704 verllb %v0, %v0, 0 705 verllf %v0, %v0, 0 706 verllg %v0, %v0, 0 707 verllh %v0, %v0, 0 708 709#CHECK: error: instruction requires: vector 710#CHECK: verllvb %v0, %v0, %v0 711#CHECK: error: instruction requires: vector 712#CHECK: verllvf %v0, %v0, %v0 713#CHECK: error: instruction requires: vector 714#CHECK: verllvg %v0, %v0, %v0 715#CHECK: error: instruction requires: vector 716#CHECK: verllvh %v0, %v0, %v0 717 718 verllvb %v0, %v0, %v0 719 verllvf %v0, %v0, %v0 720 verllvg %v0, %v0, %v0 721 verllvh %v0, %v0, %v0 722 723#CHECK: error: instruction requires: vector 724#CHECK: veslb %v0, %v0, 0 725#CHECK: error: instruction requires: vector 726#CHECK: veslf %v0, %v0, 0 727#CHECK: error: instruction requires: vector 728#CHECK: veslg %v0, %v0, 0 729#CHECK: error: instruction requires: vector 730#CHECK: veslh %v0, %v0, 0 731 732 veslb %v0, %v0, 0 733 veslf %v0, %v0, 0 734 veslg %v0, %v0, 0 735 veslh %v0, %v0, 0 736 737#CHECK: error: instruction requires: vector 738#CHECK: veslvb %v0, %v0, %v0 739#CHECK: error: instruction requires: vector 740#CHECK: veslvf %v0, %v0, %v0 741#CHECK: error: instruction requires: vector 742#CHECK: veslvg %v0, %v0, %v0 743#CHECK: error: instruction requires: vector 744#CHECK: veslvh %v0, %v0, %v0 745 746 veslvb %v0, %v0, %v0 747 veslvf %v0, %v0, %v0 748 veslvg %v0, %v0, %v0 749 veslvh %v0, %v0, %v0 750 751#CHECK: error: instruction requires: vector 752#CHECK: vesrab %v0, %v0, 0 753#CHECK: error: instruction requires: vector 754#CHECK: vesraf %v0, %v0, 0 755#CHECK: error: instruction requires: vector 756#CHECK: vesrag %v0, %v0, 0 757#CHECK: error: instruction requires: vector 758#CHECK: vesrah %v0, %v0, 0 759 760 vesrab %v0, %v0, 0 761 vesraf %v0, %v0, 0 762 vesrag %v0, %v0, 0 763 vesrah %v0, %v0, 0 764 765#CHECK: error: instruction requires: vector 766#CHECK: vesravb %v0, %v0, %v0 767#CHECK: error: instruction requires: vector 768#CHECK: vesravf %v0, %v0, %v0 769#CHECK: error: instruction requires: vector 770#CHECK: vesravg %v0, %v0, %v0 771#CHECK: error: instruction requires: vector 772#CHECK: vesravh %v0, %v0, %v0 773 774 vesravb %v0, %v0, %v0 775 vesravf %v0, %v0, %v0 776 vesravg %v0, %v0, %v0 777 vesravh %v0, %v0, %v0 778 779#CHECK: error: instruction requires: vector 780#CHECK: vesrlb %v0, %v0, 0 781#CHECK: error: instruction requires: vector 782#CHECK: vesrlf %v0, %v0, 0 783#CHECK: error: instruction requires: vector 784#CHECK: vesrlg %v0, %v0, 0 785#CHECK: error: instruction requires: vector 786#CHECK: vesrlh %v0, %v0, 0 787 788 vesrlb %v0, %v0, 0 789 vesrlf %v0, %v0, 0 790 vesrlg %v0, %v0, 0 791 vesrlh %v0, %v0, 0 792 793#CHECK: error: instruction requires: vector 794#CHECK: vesrlvb %v0, %v0, %v0 795#CHECK: error: instruction requires: vector 796#CHECK: vesrlvf %v0, %v0, %v0 797#CHECK: error: instruction requires: vector 798#CHECK: vesrlvg %v0, %v0, %v0 799#CHECK: error: instruction requires: vector 800#CHECK: vesrlvh %v0, %v0, %v0 801 802 vesrlvb %v0, %v0, %v0 803 vesrlvf %v0, %v0, %v0 804 vesrlvg %v0, %v0, %v0 805 vesrlvh %v0, %v0, %v0 806 807#CHECK: error: instruction requires: vector 808#CHECK: vfadb %v0, %v0, %v0 809 810 vfadb %v0, %v0, %v0 811 812#CHECK: error: instruction requires: vector 813#CHECK: vfaeb %v0, %v0, %v0 814#CHECK: error: instruction requires: vector 815#CHECK: vfaebs %v0, %v0, %v0 816#CHECK: error: instruction requires: vector 817#CHECK: vfaef %v0, %v0, %v0 818#CHECK: error: instruction requires: vector 819#CHECK: vfaefs %v0, %v0, %v0 820#CHECK: error: instruction requires: vector 821#CHECK: vfaeh %v0, %v0, %v0 822#CHECK: error: instruction requires: vector 823#CHECK: vfaehs %v0, %v0, %v0 824#CHECK: error: instruction requires: vector 825#CHECK: vfaezb %v0, %v0, %v0 826#CHECK: error: instruction requires: vector 827#CHECK: vfaezbs %v0, %v0, %v0 828#CHECK: error: instruction requires: vector 829#CHECK: vfaezf %v0, %v0, %v0 830#CHECK: error: instruction requires: vector 831#CHECK: vfaezfs %v0, %v0, %v0 832#CHECK: error: instruction requires: vector 833#CHECK: vfaezh %v0, %v0, %v0 834#CHECK: error: instruction requires: vector 835#CHECK: vfaezhs %v0, %v0, %v0 836 837 vfaeb %v0, %v0, %v0 838 vfaebs %v0, %v0, %v0 839 vfaef %v0, %v0, %v0 840 vfaefs %v0, %v0, %v0 841 vfaeh %v0, %v0, %v0 842 vfaehs %v0, %v0, %v0 843 vfaezb %v0, %v0, %v0 844 vfaezbs %v0, %v0, %v0 845 vfaezf %v0, %v0, %v0 846 vfaezfs %v0, %v0, %v0 847 vfaezh %v0, %v0, %v0 848 vfaezhs %v0, %v0, %v0 849 850#CHECK: error: instruction requires: vector 851#CHECK: vfcedb %v0, %v0, %v0 852#CHECK: vfcedbs %v0, %v0, %v0 853 854 vfcedb %v0, %v0, %v0 855 vfcedbs %v0, %v0, %v0 856 857#CHECK: error: instruction requires: vector 858#CHECK: vfchdb %v0, %v0, %v0 859#CHECK: vfchdbs %v0, %v0, %v0 860 861 vfchdb %v0, %v0, %v0 862 vfchdbs %v0, %v0, %v0 863 864#CHECK: error: instruction requires: vector 865#CHECK: vfddb %v0, %v0, %v0 866 867 vfddb %v0, %v0, %v0 868 869#CHECK: error: instruction requires: vector 870#CHECK: vfeeb %v0, %v0, %v0 871#CHECK: error: instruction requires: vector 872#CHECK: vfeebs %v0, %v0, %v0 873#CHECK: error: instruction requires: vector 874#CHECK: vfeef %v0, %v0, %v0 875#CHECK: error: instruction requires: vector 876#CHECK: vfeefs %v0, %v0, %v0 877#CHECK: error: instruction requires: vector 878#CHECK: vfeeh %v0, %v0, %v0 879#CHECK: error: instruction requires: vector 880#CHECK: vfeehs %v0, %v0, %v0 881#CHECK: error: instruction requires: vector 882#CHECK: vfeezb %v0, %v0, %v0 883#CHECK: error: instruction requires: vector 884#CHECK: vfeezbs %v0, %v0, %v0 885#CHECK: error: instruction requires: vector 886#CHECK: vfeezf %v0, %v0, %v0 887#CHECK: error: instruction requires: vector 888#CHECK: vfeezfs %v0, %v0, %v0 889#CHECK: error: instruction requires: vector 890#CHECK: vfeezh %v0, %v0, %v0 891#CHECK: error: instruction requires: vector 892#CHECK: vfeezhs %v0, %v0, %v0 893 894 vfeeb %v0, %v0, %v0 895 vfeebs %v0, %v0, %v0 896 vfeef %v0, %v0, %v0 897 vfeefs %v0, %v0, %v0 898 vfeeh %v0, %v0, %v0 899 vfeehs %v0, %v0, %v0 900 vfeezb %v0, %v0, %v0 901 vfeezbs %v0, %v0, %v0 902 vfeezf %v0, %v0, %v0 903 vfeezfs %v0, %v0, %v0 904 vfeezh %v0, %v0, %v0 905 vfeezhs %v0, %v0, %v0 906 907#CHECK: error: instruction requires: vector 908#CHECK: vfeneb %v0, %v0, %v0 909#CHECK: error: instruction requires: vector 910#CHECK: vfenebs %v0, %v0, %v0 911#CHECK: error: instruction requires: vector 912#CHECK: vfenef %v0, %v0, %v0 913#CHECK: error: instruction requires: vector 914#CHECK: vfenefs %v0, %v0, %v0 915#CHECK: error: instruction requires: vector 916#CHECK: vfeneh %v0, %v0, %v0 917#CHECK: error: instruction requires: vector 918#CHECK: vfenehs %v0, %v0, %v0 919#CHECK: error: instruction requires: vector 920#CHECK: vfenezb %v0, %v0, %v0 921#CHECK: error: instruction requires: vector 922#CHECK: vfenezbs %v0, %v0, %v0 923#CHECK: error: instruction requires: vector 924#CHECK: vfenezf %v0, %v0, %v0 925#CHECK: error: instruction requires: vector 926#CHECK: vfenezfs %v0, %v0, %v0 927#CHECK: error: instruction requires: vector 928#CHECK: vfenezh %v0, %v0, %v0 929#CHECK: error: instruction requires: vector 930#CHECK: vfenezhs %v0, %v0, %v0 931 932 vfeneb %v0, %v0, %v0 933 vfenebs %v0, %v0, %v0 934 vfenef %v0, %v0, %v0 935 vfenefs %v0, %v0, %v0 936 vfeneh %v0, %v0, %v0 937 vfenehs %v0, %v0, %v0 938 vfenezb %v0, %v0, %v0 939 vfenezbs %v0, %v0, %v0 940 vfenezf %v0, %v0, %v0 941 vfenezfs %v0, %v0, %v0 942 vfenezh %v0, %v0, %v0 943 vfenezhs %v0, %v0, %v0 944 945#CHECK: error: instruction requires: vector 946#CHECK: vfidb %v0, %v0, 0, 0 947 948 vfidb %v0, %v0, 0, 0 949 950#CHECK: error: instruction requires: vector 951#CHECK: vflcdb %v0, %v0 952 953 vflcdb %v0, %v0 954 955#CHECK: error: instruction requires: vector 956#CHECK: vflndb %v0, %v0 957 958 vflndb %v0, %v0 959 960#CHECK: error: instruction requires: vector 961#CHECK: vflpdb %v0, %v0 962 963 vflpdb %v0, %v0 964 965#CHECK: error: instruction requires: vector 966#CHECK: vfmadb %v0, %v0, %v0, %v0 967 968 vfmadb %v0, %v0, %v0, %v0 969 970#CHECK: error: instruction requires: vector 971#CHECK: vfmdb %v0, %v0, %v0 972 973 vfmdb %v0, %v0, %v0 974 975#CHECK: error: instruction requires: vector 976#CHECK: vfmsdb %v0, %v0, %v0, %v0 977 978 vfmsdb %v0, %v0, %v0, %v0 979 980#CHECK: error: instruction requires: vector 981#CHECK: vfsdb %v0, %v0, %v0 982 983 vfsdb %v0, %v0, %v0 984 985#CHECK: error: instruction requires: vector 986#CHECK: vfsqdb %v0, %v0 987 988 vfsqdb %v0, %v0 989 990#CHECK: error: instruction requires: vector 991#CHECK: vftcidb %v0, %v0, 0 992 993 vftcidb %v0, %v0, 0 994 995#CHECK: error: instruction requires: vector 996#CHECK: vgbm %v0, 0 997 998 vgbm %v0, 0 999 1000#CHECK: error: instruction requires: vector 1001#CHECK: vgef %v0, 0(%v0, %r1), 0 1002#CHECK: error: instruction requires: vector 1003#CHECK: vgeg %v0, 0(%v0, %r1), 0 1004 1005 vgef %v0, 0(%v0, %r1), 0 1006 vgeg %v0, 0(%v0, %r1), 0 1007 1008#CHECK: error: instruction requires: vector 1009#CHECK: vgfmab %v0, %v0, %v0, %v0 1010#CHECK: error: instruction requires: vector 1011#CHECK: vgfmaf %v0, %v0, %v0, %v0 1012#CHECK: error: instruction requires: vector 1013#CHECK: vgfmag %v0, %v0, %v0, %v0 1014#CHECK: error: instruction requires: vector 1015#CHECK: vgfmah %v0, %v0, %v0, %v0 1016 1017 vgfmab %v0, %v0, %v0, %v0 1018 vgfmaf %v0, %v0, %v0, %v0 1019 vgfmag %v0, %v0, %v0, %v0 1020 vgfmah %v0, %v0, %v0, %v0 1021 1022#CHECK: error: instruction requires: vector 1023#CHECK: vgfmb %v0, %v0, %v0 1024#CHECK: error: instruction requires: vector 1025#CHECK: vgfmf %v0, %v0, %v0 1026#CHECK: error: instruction requires: vector 1027#CHECK: vgfmg %v0, %v0, %v0 1028#CHECK: error: instruction requires: vector 1029#CHECK: vgfmh %v0, %v0, %v0 1030 1031 vgfmb %v0, %v0, %v0 1032 vgfmf %v0, %v0, %v0 1033 vgfmg %v0, %v0, %v0 1034 vgfmh %v0, %v0, %v0 1035 1036#CHECK: error: instruction requires: vector 1037#CHECK: vgmb %v0, 0, 0 1038#CHECK: error: instruction requires: vector 1039#CHECK: vgmf %v0, 0, 0 1040#CHECK: error: instruction requires: vector 1041#CHECK: vgmg %v0, 0, 0 1042#CHECK: error: instruction requires: vector 1043#CHECK: vgmh %v0, 0, 0 1044 1045 vgmb %v0, 0, 0 1046 vgmf %v0, 0, 0 1047 vgmg %v0, 0, 0 1048 vgmh %v0, 0, 0 1049 1050#CHECK: error: instruction requires: vector 1051#CHECK: vistrb %v0, %v0 1052#CHECK: error: instruction requires: vector 1053#CHECK: vistrbs %v0, %v0 1054#CHECK: error: instruction requires: vector 1055#CHECK: vistrf %v0, %v0 1056#CHECK: error: instruction requires: vector 1057#CHECK: vistrfs %v0, %v0 1058#CHECK: error: instruction requires: vector 1059#CHECK: vistrh %v0, %v0 1060#CHECK: error: instruction requires: vector 1061#CHECK: vistrhs %v0, %v0 1062 1063 vistrb %v0, %v0 1064 vistrbs %v0, %v0 1065 vistrf %v0, %v0 1066 vistrfs %v0, %v0 1067 vistrh %v0, %v0 1068 vistrhs %v0, %v0 1069 1070#CHECK: error: instruction requires: vector 1071#CHECK: vl %v0, 0 1072 1073 vl %v0, 0 1074 1075#CHECK: error: instruction requires: vector 1076#CHECK: vlbb %v0, 0, 0 1077 1078 vlbb %v0, 0, 0 1079 1080#CHECK: error: instruction requires: vector 1081#CHECK: vlcb %v0, %v0 1082#CHECK: error: instruction requires: vector 1083#CHECK: vlcf %v0, %v0 1084#CHECK: error: instruction requires: vector 1085#CHECK: vlcg %v0, %v0 1086#CHECK: error: instruction requires: vector 1087#CHECK: vlch %v0, %v0 1088 1089 vlcb %v0, %v0 1090 vlcf %v0, %v0 1091 vlcg %v0, %v0 1092 vlch %v0, %v0 1093 1094#CHECK: error: instruction requires: vector 1095#CHECK: vldeb %v0, %v0 1096 1097 vldeb %v0, %v0 1098 1099#CHECK: error: instruction requires: vector 1100#CHECK: vleb %v0, 0, 0 1101#CHECK: error: instruction requires: vector 1102#CHECK: vlef %v0, 0, 0 1103#CHECK: error: instruction requires: vector 1104#CHECK: vleg %v0, 0, 0 1105#CHECK: error: instruction requires: vector 1106#CHECK: vleh %v0, 0, 0 1107 1108 vleb %v0, 0, 0 1109 vlef %v0, 0, 0 1110 vleg %v0, 0, 0 1111 vleh %v0, 0, 0 1112 1113#CHECK: error: instruction requires: vector 1114#CHECK: vledb %v0, %v0, 0, 0 1115 1116 vledb %v0, %v0, 0, 0 1117 1118#CHECK: error: instruction requires: vector 1119#CHECK: vleib %v0, 0, 0 1120#CHECK: error: instruction requires: vector 1121#CHECK: vleif %v0, 0, 0 1122#CHECK: error: instruction requires: vector 1123#CHECK: vleig %v0, 0, 0 1124#CHECK: error: instruction requires: vector 1125#CHECK: vleih %v0, 0, 0 1126 1127 vleib %v0, 0, 0 1128 vleif %v0, 0, 0 1129 vleig %v0, 0, 0 1130 vleih %v0, 0, 0 1131 1132#CHECK: error: instruction requires: vector 1133#CHECK: vlgvb %r0, %v0, 0 1134#CHECK: error: instruction requires: vector 1135#CHECK: vlgvf %r0, %v0, 0 1136#CHECK: error: instruction requires: vector 1137#CHECK: vlgvg %r0, %v0, 0 1138#CHECK: error: instruction requires: vector 1139#CHECK: vlgvh %r0, %v0, 0 1140 1141 vlgvb %r0, %v0, 0 1142 vlgvf %r0, %v0, 0 1143 vlgvg %r0, %v0, 0 1144 vlgvh %r0, %v0, 0 1145 1146#CHECK: error: instruction requires: vector 1147#CHECK: vll %v0, %r0, 0 1148 1149 vll %v0, %r0, 0 1150 1151#CHECK: error: instruction requires: vector 1152#CHECK: vllezb %v0, 0 1153#CHECK: error: instruction requires: vector 1154#CHECK: vllezf %v0, 0 1155#CHECK: error: instruction requires: vector 1156#CHECK: vllezg %v0, 0 1157#CHECK: error: instruction requires: vector 1158#CHECK: vllezh %v0, 0 1159 1160 vllezb %v0, 0 1161 vllezf %v0, 0 1162 vllezg %v0, 0 1163 vllezh %v0, 0 1164 1165#CHECK: error: instruction requires: vector 1166#CHECK: vlm %v0, %v0, 0 1167 1168 vlm %v0, %v0, 0 1169 1170#CHECK: error: instruction requires: vector 1171#CHECK: vlpb %v0, %v0 1172#CHECK: error: instruction requires: vector 1173#CHECK: vlpf %v0, %v0 1174#CHECK: error: instruction requires: vector 1175#CHECK: vlpg %v0, %v0 1176#CHECK: error: instruction requires: vector 1177#CHECK: vlph %v0, %v0 1178 1179 vlpb %v0, %v0 1180 vlpf %v0, %v0 1181 vlpg %v0, %v0 1182 vlph %v0, %v0 1183 1184#CHECK: error: instruction requires: vector 1185#CHECK: vlr %v0, %v0 1186 1187 vlr %v0, %v0 1188 1189#CHECK: error: instruction requires: vector 1190#CHECK: vlrepb %v0, 0 1191#CHECK: error: instruction requires: vector 1192#CHECK: vlrepf %v0, 0 1193#CHECK: error: instruction requires: vector 1194#CHECK: vlrepg %v0, 0 1195#CHECK: error: instruction requires: vector 1196#CHECK: vlreph %v0, 0 1197 1198 vlrepb %v0, 0 1199 vlrepf %v0, 0 1200 vlrepg %v0, 0 1201 vlreph %v0, 0 1202 1203#CHECK: error: instruction requires: vector 1204#CHECK: vlvgb %v0, %r0, 0 1205#CHECK: error: instruction requires: vector 1206#CHECK: vlvgf %v0, %r0, 0 1207#CHECK: error: instruction requires: vector 1208#CHECK: vlvgg %v0, %r0, 0 1209#CHECK: error: instruction requires: vector 1210#CHECK: vlvgh %v0, %r0, 0 1211 1212 vlvgb %v0, %r0, 0 1213 vlvgf %v0, %r0, 0 1214 vlvgg %v0, %r0, 0 1215 vlvgh %v0, %r0, 0 1216 1217#CHECK: error: instruction requires: vector 1218#CHECK: vlvgp %v0, %r0, %r0 1219 1220 vlvgp %v0, %r0, %r0 1221 1222#CHECK: error: instruction requires: vector 1223#CHECK: vmaeb %v0, %v0, %v0, %v0 1224#CHECK: error: instruction requires: vector 1225#CHECK: vmaef %v0, %v0, %v0, %v0 1226#CHECK: error: instruction requires: vector 1227#CHECK: vmaeh %v0, %v0, %v0, %v0 1228 1229 vmaeb %v0, %v0, %v0, %v0 1230 vmaef %v0, %v0, %v0, %v0 1231 vmaeh %v0, %v0, %v0, %v0 1232 1233#CHECK: error: instruction requires: vector 1234#CHECK: vmahb %v0, %v0, %v0, %v0 1235#CHECK: error: instruction requires: vector 1236#CHECK: vmahf %v0, %v0, %v0, %v0 1237#CHECK: error: instruction requires: vector 1238#CHECK: vmahh %v0, %v0, %v0, %v0 1239 1240 vmahb %v0, %v0, %v0, %v0 1241 vmahf %v0, %v0, %v0, %v0 1242 vmahh %v0, %v0, %v0, %v0 1243 1244#CHECK: error: instruction requires: vector 1245#CHECK: vmalb %v0, %v0, %v0, %v0 1246#CHECK: error: instruction requires: vector 1247#CHECK: vmalf %v0, %v0, %v0, %v0 1248#CHECK: error: instruction requires: vector 1249#CHECK: vmalhw %v0, %v0, %v0, %v0 1250 1251 vmalb %v0, %v0, %v0, %v0 1252 vmalf %v0, %v0, %v0, %v0 1253 vmalhw %v0, %v0, %v0, %v0 1254 1255#CHECK: error: instruction requires: vector 1256#CHECK: vmaleb %v0, %v0, %v0, %v0 1257#CHECK: error: instruction requires: vector 1258#CHECK: vmalef %v0, %v0, %v0, %v0 1259#CHECK: error: instruction requires: vector 1260#CHECK: vmaleh %v0, %v0, %v0, %v0 1261 1262 vmaleb %v0, %v0, %v0, %v0 1263 vmalef %v0, %v0, %v0, %v0 1264 vmaleh %v0, %v0, %v0, %v0 1265 1266#CHECK: error: instruction requires: vector 1267#CHECK: vmalhb %v0, %v0, %v0, %v0 1268#CHECK: error: instruction requires: vector 1269#CHECK: vmalhf %v0, %v0, %v0, %v0 1270#CHECK: error: instruction requires: vector 1271#CHECK: vmalhh %v0, %v0, %v0, %v0 1272 1273 vmalhb %v0, %v0, %v0, %v0 1274 vmalhf %v0, %v0, %v0, %v0 1275 vmalhh %v0, %v0, %v0, %v0 1276 1277#CHECK: error: instruction requires: vector 1278#CHECK: vmalob %v0, %v0, %v0, %v0 1279#CHECK: error: instruction requires: vector 1280#CHECK: vmalof %v0, %v0, %v0, %v0 1281#CHECK: error: instruction requires: vector 1282#CHECK: vmaloh %v0, %v0, %v0, %v0 1283 1284 vmalob %v0, %v0, %v0, %v0 1285 vmalof %v0, %v0, %v0, %v0 1286 vmaloh %v0, %v0, %v0, %v0 1287 1288#CHECK: error: instruction requires: vector 1289#CHECK: vmaob %v0, %v0, %v0, %v0 1290#CHECK: error: instruction requires: vector 1291#CHECK: vmaof %v0, %v0, %v0, %v0 1292#CHECK: error: instruction requires: vector 1293#CHECK: vmaoh %v0, %v0, %v0, %v0 1294 1295 vmaob %v0, %v0, %v0, %v0 1296 vmaof %v0, %v0, %v0, %v0 1297 vmaoh %v0, %v0, %v0, %v0 1298 1299#CHECK: error: instruction requires: vector 1300#CHECK: vmeb %v0, %v0, %v0 1301#CHECK: error: instruction requires: vector 1302#CHECK: vmef %v0, %v0, %v0 1303#CHECK: error: instruction requires: vector 1304#CHECK: vmeh %v0, %v0, %v0 1305 1306 vmeb %v0, %v0, %v0 1307 vmef %v0, %v0, %v0 1308 vmeh %v0, %v0, %v0 1309 1310#CHECK: error: instruction requires: vector 1311#CHECK: vmhb %v0, %v0, %v0 1312#CHECK: error: instruction requires: vector 1313#CHECK: vmhf %v0, %v0, %v0 1314#CHECK: error: instruction requires: vector 1315#CHECK: vmhh %v0, %v0, %v0 1316 1317 vmhb %v0, %v0, %v0 1318 vmhf %v0, %v0, %v0 1319 vmhh %v0, %v0, %v0 1320 1321#CHECK: error: instruction requires: vector 1322#CHECK: vmlb %v0, %v0, %v0 1323#CHECK: error: instruction requires: vector 1324#CHECK: vmlf %v0, %v0, %v0 1325#CHECK: error: instruction requires: vector 1326#CHECK: vmlhw %v0, %v0, %v0 1327 1328 vmlb %v0, %v0, %v0 1329 vmlf %v0, %v0, %v0 1330 vmlhw %v0, %v0, %v0 1331 1332#CHECK: error: instruction requires: vector 1333#CHECK: vmleb %v0, %v0, %v0 1334#CHECK: error: instruction requires: vector 1335#CHECK: vmlef %v0, %v0, %v0 1336#CHECK: error: instruction requires: vector 1337#CHECK: vmleh %v0, %v0, %v0 1338 1339 vmleb %v0, %v0, %v0 1340 vmlef %v0, %v0, %v0 1341 vmleh %v0, %v0, %v0 1342 1343#CHECK: error: instruction requires: vector 1344#CHECK: vmlhb %v0, %v0, %v0 1345#CHECK: error: instruction requires: vector 1346#CHECK: vmlhf %v0, %v0, %v0 1347#CHECK: error: instruction requires: vector 1348#CHECK: vmlhh %v0, %v0, %v0 1349 1350 vmlhb %v0, %v0, %v0 1351 vmlhf %v0, %v0, %v0 1352 vmlhh %v0, %v0, %v0 1353 1354#CHECK: error: instruction requires: vector 1355#CHECK: vmlob %v0, %v0, %v0 1356#CHECK: error: instruction requires: vector 1357#CHECK: vmlof %v0, %v0, %v0 1358#CHECK: error: instruction requires: vector 1359#CHECK: vmloh %v0, %v0, %v0 1360 1361 vmlob %v0, %v0, %v0 1362 vmlof %v0, %v0, %v0 1363 vmloh %v0, %v0, %v0 1364 1365#CHECK: error: instruction requires: vector 1366#CHECK: vmnb %v0, %v0, %v0 1367#CHECK: error: instruction requires: vector 1368#CHECK: vmnf %v0, %v0, %v0 1369#CHECK: error: instruction requires: vector 1370#CHECK: vmng %v0, %v0, %v0 1371#CHECK: error: instruction requires: vector 1372#CHECK: vmnh %v0, %v0, %v0 1373 1374 vmnb %v0, %v0, %v0 1375 vmnf %v0, %v0, %v0 1376 vmng %v0, %v0, %v0 1377 vmnh %v0, %v0, %v0 1378 1379#CHECK: error: instruction requires: vector 1380#CHECK: vmnlb %v0, %v0, %v0 1381#CHECK: error: instruction requires: vector 1382#CHECK: vmnlf %v0, %v0, %v0 1383#CHECK: error: instruction requires: vector 1384#CHECK: vmnlg %v0, %v0, %v0 1385#CHECK: error: instruction requires: vector 1386#CHECK: vmnlh %v0, %v0, %v0 1387 1388 vmnlb %v0, %v0, %v0 1389 vmnlf %v0, %v0, %v0 1390 vmnlg %v0, %v0, %v0 1391 vmnlh %v0, %v0, %v0 1392 1393#CHECK: error: instruction requires: vector 1394#CHECK: vmob %v0, %v0, %v0 1395#CHECK: error: instruction requires: vector 1396#CHECK: vmof %v0, %v0, %v0 1397#CHECK: error: instruction requires: vector 1398#CHECK: vmoh %v0, %v0, %v0 1399 1400 vmob %v0, %v0, %v0 1401 vmof %v0, %v0, %v0 1402 vmoh %v0, %v0, %v0 1403 1404#CHECK: error: instruction requires: vector 1405#CHECK: vmrhb %v0, %v0, %v0 1406#CHECK: error: instruction requires: vector 1407#CHECK: vmrhf %v0, %v0, %v0 1408#CHECK: error: instruction requires: vector 1409#CHECK: vmrhg %v0, %v0, %v0 1410#CHECK: error: instruction requires: vector 1411#CHECK: vmrhh %v0, %v0, %v0 1412 1413 vmrhb %v0, %v0, %v0 1414 vmrhf %v0, %v0, %v0 1415 vmrhg %v0, %v0, %v0 1416 vmrhh %v0, %v0, %v0 1417 1418#CHECK: error: instruction requires: vector 1419#CHECK: vmrlb %v0, %v0, %v0 1420#CHECK: error: instruction requires: vector 1421#CHECK: vmrlf %v0, %v0, %v0 1422#CHECK: error: instruction requires: vector 1423#CHECK: vmrlg %v0, %v0, %v0 1424#CHECK: error: instruction requires: vector 1425#CHECK: vmrlh %v0, %v0, %v0 1426 1427 vmrlb %v0, %v0, %v0 1428 vmrlf %v0, %v0, %v0 1429 vmrlg %v0, %v0, %v0 1430 vmrlh %v0, %v0, %v0 1431 1432#CHECK: error: instruction requires: vector 1433#CHECK: vmxb %v0, %v0, %v0 1434#CHECK: error: instruction requires: vector 1435#CHECK: vmxf %v0, %v0, %v0 1436#CHECK: error: instruction requires: vector 1437#CHECK: vmxg %v0, %v0, %v0 1438#CHECK: error: instruction requires: vector 1439#CHECK: vmxh %v0, %v0, %v0 1440 1441 vmxb %v0, %v0, %v0 1442 vmxf %v0, %v0, %v0 1443 vmxg %v0, %v0, %v0 1444 vmxh %v0, %v0, %v0 1445 1446#CHECK: error: instruction requires: vector 1447#CHECK: vmxlb %v0, %v0, %v0 1448#CHECK: error: instruction requires: vector 1449#CHECK: vmxlf %v0, %v0, %v0 1450#CHECK: error: instruction requires: vector 1451#CHECK: vmxlg %v0, %v0, %v0 1452#CHECK: error: instruction requires: vector 1453#CHECK: vmxlh %v0, %v0, %v0 1454 1455 vmxlb %v0, %v0, %v0 1456 vmxlf %v0, %v0, %v0 1457 vmxlg %v0, %v0, %v0 1458 vmxlh %v0, %v0, %v0 1459 1460#CHECK: error: instruction requires: vector 1461#CHECK: vn %v0, %v0, %v0 1462 1463 vn %v0, %v0, %v0 1464 1465#CHECK: error: instruction requires: vector 1466#CHECK: vnc %v0, %v0, %v0 1467 1468 vnc %v0, %v0, %v0 1469 1470#CHECK: error: instruction requires: vector 1471#CHECK: vno %v0, %v0, %v0 1472 1473 vno %v0, %v0, %v0 1474 1475#CHECK: error: instruction requires: vector 1476#CHECK: vo %v0, %v0, %v0 1477 1478 vo %v0, %v0, %v0 1479 1480#CHECK: error: instruction requires: vector 1481#CHECK: vone %v0 1482 1483 vone %v0 1484 1485#CHECK: error: instruction requires: vector 1486#CHECK: vpdi %v0, %v0, %v0, 0 1487 1488 vpdi %v0, %v0, %v0, 0 1489 1490#CHECK: error: instruction requires: vector 1491#CHECK: vperm %v0, %v0, %v0, %v0 1492 1493 vperm %v0, %v0, %v0, %v0 1494 1495#CHECK: error: instruction requires: vector 1496#CHECK: vpkf %v0, %v0, %v0 1497#CHECK: error: instruction requires: vector 1498#CHECK: vpkg %v0, %v0, %v0 1499#CHECK: error: instruction requires: vector 1500#CHECK: vpkh %v0, %v0, %v0 1501 1502 vpkf %v0, %v0, %v0 1503 vpkg %v0, %v0, %v0 1504 vpkh %v0, %v0, %v0 1505 1506#CHECK: error: instruction requires: vector 1507#CHECK: vpklsf %v0, %v0, %v0 1508#CHECK: error: instruction requires: vector 1509#CHECK: vpklsfs %v0, %v0, %v0 1510#CHECK: error: instruction requires: vector 1511#CHECK: vpklsg %v0, %v0, %v0 1512#CHECK: error: instruction requires: vector 1513#CHECK: vpklsgs %v0, %v0, %v0 1514#CHECK: error: instruction requires: vector 1515#CHECK: vpklsh %v0, %v0, %v0 1516#CHECK: error: instruction requires: vector 1517#CHECK: vpklshs %v0, %v0, %v0 1518 1519 vpklsf %v0, %v0, %v0 1520 vpklsfs %v0, %v0, %v0 1521 vpklsg %v0, %v0, %v0 1522 vpklsgs %v0, %v0, %v0 1523 vpklsh %v0, %v0, %v0 1524 vpklshs %v0, %v0, %v0 1525 1526#CHECK: error: instruction requires: vector 1527#CHECK: vpksf %v0, %v0, %v0 1528#CHECK: error: instruction requires: vector 1529#CHECK: vpksfs %v0, %v0, %v0 1530#CHECK: error: instruction requires: vector 1531#CHECK: vpksg %v0, %v0, %v0 1532#CHECK: error: instruction requires: vector 1533#CHECK: vpksgs %v0, %v0, %v0 1534#CHECK: error: instruction requires: vector 1535#CHECK: vpksh %v0, %v0, %v0 1536#CHECK: error: instruction requires: vector 1537#CHECK: vpkshs %v0, %v0, %v0 1538 1539 vpksf %v0, %v0, %v0 1540 vpksfs %v0, %v0, %v0 1541 vpksg %v0, %v0, %v0 1542 vpksgs %v0, %v0, %v0 1543 vpksh %v0, %v0, %v0 1544 vpkshs %v0, %v0, %v0 1545 1546#CHECK: error: instruction requires: vector 1547#CHECK: vpopct %v0, %v0, 0 1548 1549 vpopct %v0, %v0, 0 1550 1551#CHECK: error: instruction requires: vector 1552#CHECK: vrepb %v0, %v0, 0 1553#CHECK: error: instruction requires: vector 1554#CHECK: vrepf %v0, %v0, 0 1555#CHECK: error: instruction requires: vector 1556#CHECK: vrepg %v0, %v0, 0 1557#CHECK: error: instruction requires: vector 1558#CHECK: vreph %v0, %v0, 0 1559 1560 vrepb %v0, %v0, 0 1561 vrepf %v0, %v0, 0 1562 vrepg %v0, %v0, 0 1563 vreph %v0, %v0, 0 1564 1565#CHECK: error: instruction requires: vector 1566#CHECK: vrepib %v0, 0 1567#CHECK: error: instruction requires: vector 1568#CHECK: vrepif %v0, 0 1569#CHECK: error: instruction requires: vector 1570#CHECK: vrepig %v0, 0 1571#CHECK: error: instruction requires: vector 1572#CHECK: vrepih %v0, 0 1573 1574 vrepib %v0, 0 1575 vrepif %v0, 0 1576 vrepig %v0, 0 1577 vrepih %v0, 0 1578 1579#CHECK: error: instruction requires: vector 1580#CHECK: vsb %v0, %v0, %v0 1581#CHECK: error: instruction requires: vector 1582#CHECK: vsf %v0, %v0, %v0 1583#CHECK: error: instruction requires: vector 1584#CHECK: vsg %v0, %v0, %v0 1585#CHECK: error: instruction requires: vector 1586#CHECK: vsh %v0, %v0, %v0 1587#CHECK: error: instruction requires: vector 1588#CHECK: vsq %v0, %v0, %v0 1589 1590 vsb %v0, %v0, %v0 1591 vsf %v0, %v0, %v0 1592 vsg %v0, %v0, %v0 1593 vsh %v0, %v0, %v0 1594 vsq %v0, %v0, %v0 1595 1596#CHECK: error: instruction requires: vector 1597#CHECK: vsbcbiq %v0, %v0, %v0, %v0 1598 1599 vsbcbiq %v0, %v0, %v0, %v0 1600 1601#CHECK: error: instruction requires: vector 1602#CHECK: vsbiq %v0, %v0, %v0, %v0 1603 1604 vsbiq %v0, %v0, %v0, %v0 1605 1606#CHECK: error: instruction requires: vector 1607#CHECK: vscbib %v0, %v0, %v0 1608#CHECK: error: instruction requires: vector 1609#CHECK: vscbif %v0, %v0, %v0 1610#CHECK: error: instruction requires: vector 1611#CHECK: vscbig %v0, %v0, %v0 1612#CHECK: error: instruction requires: vector 1613#CHECK: vscbih %v0, %v0, %v0 1614#CHECK: error: instruction requires: vector 1615#CHECK: vscbiq %v0, %v0, %v0 1616 1617 vscbib %v0, %v0, %v0 1618 vscbif %v0, %v0, %v0 1619 vscbig %v0, %v0, %v0 1620 vscbih %v0, %v0, %v0 1621 vscbiq %v0, %v0, %v0 1622 1623#CHECK: error: instruction requires: vector 1624#CHECK: vscef %v0, 0(%v0, %r1), 0 1625#CHECK: error: instruction requires: vector 1626#CHECK: vsceg %v0, 0(%v0, %r1), 0 1627 1628 vscef %v0, 0(%v0, %r1), 0 1629 vsceg %v0, 0(%v0, %r1), 0 1630 1631#CHECK: error: instruction requires: vector 1632#CHECK: vsegb %v0, %v0 1633#CHECK: error: instruction requires: vector 1634#CHECK: vsegf %v0, %v0 1635#CHECK: error: instruction requires: vector 1636#CHECK: vsegh %v0, %v0 1637 1638 vsegb %v0, %v0 1639 vsegf %v0, %v0 1640 vsegh %v0, %v0 1641 1642#CHECK: error: instruction requires: vector 1643#CHECK: vsel %v0, %v0, %v0, %v0 1644 1645 vsel %v0, %v0, %v0, %v0 1646 1647#CHECK: error: instruction requires: vector 1648#CHECK: vsl %v0, %v0, %v0 1649 1650 vsl %v0, %v0, %v0 1651 1652#CHECK: error: instruction requires: vector 1653#CHECK: vslb %v0, %v0, %v0 1654 1655 vslb %v0, %v0, %v0 1656 1657#CHECK: error: instruction requires: vector 1658#CHECK: vsldb %v0, %v0, %v0, 0 1659 1660 vsldb %v0, %v0, %v0, 0 1661 1662#CHECK: error: instruction requires: vector 1663#CHECK: vsra %v0, %v0, %v0 1664 1665 vsra %v0, %v0, %v0 1666 1667#CHECK: error: instruction requires: vector 1668#CHECK: vsrab %v0, %v0, %v0 1669 1670 vsrab %v0, %v0, %v0 1671 1672#CHECK: error: instruction requires: vector 1673#CHECK: vsrl %v0, %v0, %v0 1674 1675 vsrl %v0, %v0, %v0 1676 1677#CHECK: error: instruction requires: vector 1678#CHECK: vsrlb %v0, %v0, %v0 1679 1680 vsrlb %v0, %v0, %v0 1681 1682#CHECK: error: instruction requires: vector 1683#CHECK: vst %v0, 0 1684 1685 vst %v0, 0 1686 1687#CHECK: error: instruction requires: vector 1688#CHECK: vstl %v0, %r0, 0 1689 1690 vstl %v0, %r0, 0 1691 1692#CHECK: error: instruction requires: vector 1693#CHECK: vstm %v0, %v0, 0 1694 1695 vstm %v0, %v0, 0 1696 1697#CHECK: error: instruction requires: vector 1698#CHECK: vstrcb %v0, %v0, %v0, %v0 1699#CHECK: error: instruction requires: vector 1700#CHECK: vstrcbs %v0, %v0, %v0, %v0 1701#CHECK: error: instruction requires: vector 1702#CHECK: vstrcf %v0, %v0, %v0, %v0 1703#CHECK: error: instruction requires: vector 1704#CHECK: vstrcfs %v0, %v0, %v0, %v0 1705#CHECK: error: instruction requires: vector 1706#CHECK: vstrch %v0, %v0, %v0, %v0 1707#CHECK: error: instruction requires: vector 1708#CHECK: vstrchs %v0, %v0, %v0, %v0 1709#CHECK: error: instruction requires: vector 1710#CHECK: vstrczb %v0, %v0, %v0, %v0 1711#CHECK: error: instruction requires: vector 1712#CHECK: vstrczbs %v0, %v0, %v0, %v0 1713#CHECK: error: instruction requires: vector 1714#CHECK: vstrczf %v0, %v0, %v0, %v0 1715#CHECK: error: instruction requires: vector 1716#CHECK: vstrczfs %v0, %v0, %v0, %v0 1717#CHECK: error: instruction requires: vector 1718#CHECK: vstrczh %v0, %v0, %v0, %v0 1719#CHECK: error: instruction requires: vector 1720#CHECK: vstrczhs %v0, %v0, %v0, %v0 1721 1722 vstrcb %v0, %v0, %v0, %v0 1723 vstrcbs %v0, %v0, %v0, %v0 1724 vstrcf %v0, %v0, %v0, %v0 1725 vstrcfs %v0, %v0, %v0, %v0 1726 vstrch %v0, %v0, %v0, %v0 1727 vstrchs %v0, %v0, %v0, %v0 1728 vstrczb %v0, %v0, %v0, %v0 1729 vstrczbs %v0, %v0, %v0, %v0 1730 vstrczf %v0, %v0, %v0, %v0 1731 vstrczfs %v0, %v0, %v0, %v0 1732 vstrczh %v0, %v0, %v0, %v0 1733 vstrczhs %v0, %v0, %v0, %v0 1734 1735#CHECK: error: instruction requires: vector 1736#CHECK: vsumb %v0, %v0, %v0 1737#CHECK: error: instruction requires: vector 1738#CHECK: vsumh %v0, %v0, %v0 1739 1740 vsumb %v0, %v0, %v0 1741 vsumh %v0, %v0, %v0 1742 1743#CHECK: error: instruction requires: vector 1744#CHECK: vsumgh %v0, %v0, %v0 1745#CHECK: error: instruction requires: vector 1746#CHECK: vsumgf %v0, %v0, %v0 1747 1748 vsumgh %v0, %v0, %v0 1749 vsumgf %v0, %v0, %v0 1750 1751#CHECK: error: instruction requires: vector 1752#CHECK: vsumqf %v0, %v0, %v0 1753#CHECK: error: instruction requires: vector 1754#CHECK: vsumqg %v0, %v0, %v0 1755 1756 vsumqf %v0, %v0, %v0 1757 vsumqg %v0, %v0, %v0 1758 1759#CHECK: error: instruction requires: vector 1760#CHECK: vtm %v0, %v0 1761 1762 vtm %v0, %v0 1763 1764#CHECK: error: instruction requires: vector 1765#CHECK: vuphb %v0, %v0 1766#CHECK: error: instruction requires: vector 1767#CHECK: vuphf %v0, %v0 1768#CHECK: error: instruction requires: vector 1769#CHECK: vuphh %v0, %v0 1770 1771 vuphb %v0, %v0 1772 vuphf %v0, %v0 1773 vuphh %v0, %v0 1774 1775#CHECK: error: instruction requires: vector 1776#CHECK: vuplb %v0, %v0 1777#CHECK: error: instruction requires: vector 1778#CHECK: vuplf %v0, %v0 1779#CHECK: error: instruction requires: vector 1780#CHECK: vuplhw %v0, %v0 1781 1782 vuplb %v0, %v0 1783 vuplf %v0, %v0 1784 vuplhw %v0, %v0 1785 1786#CHECK: error: instruction requires: vector 1787#CHECK: vuplhb %v0, %v0 1788#CHECK: error: instruction requires: vector 1789#CHECK: vuplhf %v0, %v0 1790#CHECK: error: instruction requires: vector 1791#CHECK: vuplhh %v0, %v0 1792 1793 vuplhb %v0, %v0 1794 vuplhf %v0, %v0 1795 vuplhh %v0, %v0 1796 1797#CHECK: error: instruction requires: vector 1798#CHECK: vupllb %v0, %v0 1799#CHECK: error: instruction requires: vector 1800#CHECK: vupllf %v0, %v0 1801#CHECK: error: instruction requires: vector 1802#CHECK: vupllh %v0, %v0 1803 1804 vupllb %v0, %v0 1805 vupllf %v0, %v0 1806 vupllh %v0, %v0 1807 1808#CHECK: error: instruction requires: vector 1809#CHECK: vx %v0, %v0, %v0 1810 1811 vx %v0, %v0, %v0 1812 1813#CHECK: error: instruction requires: vector 1814#CHECK: vzero %v0 1815 1816 vzero %v0 1817 1818#CHECK: error: instruction requires: vector 1819#CHECK: wcdgb %v0, %v0, 0, 0 1820 1821 wcdgb %v0, %v0, 0, 0 1822 1823#CHECK: error: instruction requires: vector 1824#CHECK: wcdlgb %v0, %v0, 0, 0 1825 1826 wcdlgb %v0, %v0, 0, 0 1827 1828#CHECK: error: instruction requires: vector 1829#CHECK: wcgdb %v0, %v0, 0, 0 1830 1831 wcgdb %v0, %v0, 0, 0 1832 1833#CHECK: error: instruction requires: vector 1834#CHECK: wclgdb %v0, %v0, 0, 0 1835 1836 wclgdb %v0, %v0, 0, 0 1837 1838#CHECK: error: instruction requires: vector 1839#CHECK: wfadb %v0, %v0, %v0 1840 1841 wfadb %v0, %v0, %v0 1842 1843#CHECK: error: instruction requires: vector 1844#CHECK: wfcdb %v0, %v0 1845 1846 wfcdb %v0, %v0 1847 1848#CHECK: error: instruction requires: vector 1849#CHECK: wfcedb %v0, %v0, %v0 1850#CHECK: wfcedbs %v0, %v0, %v0 1851 1852 wfcedb %v0, %v0, %v0 1853 wfcedbs %v0, %v0, %v0 1854 1855#CHECK: error: instruction requires: vector 1856#CHECK: wfchdb %v0, %v0, %v0 1857#CHECK: wfchdbs %v0, %v0, %v0 1858 1859 wfchdb %v0, %v0, %v0 1860 wfchdbs %v0, %v0, %v0 1861 1862#CHECK: error: instruction requires: vector 1863#CHECK: wfchedb %v0, %v0, %v0 1864#CHECK: wfchedbs %v0, %v0, %v0 1865 1866 wfchedb %v0, %v0, %v0 1867 wfchedbs %v0, %v0, %v0 1868 1869#CHECK: error: instruction requires: vector 1870#CHECK: wfddb %v0, %v0, %v0 1871 1872 wfddb %v0, %v0, %v0 1873 1874#CHECK: error: instruction requires: vector 1875#CHECK: wfidb %v0, %v0, 0, 0 1876 1877 wfidb %v0, %v0, 0, 0 1878 1879#CHECK: error: instruction requires: vector 1880#CHECK: wfkdb %v0, %v0 1881 1882 wfkdb %v0, %v0 1883 1884#CHECK: error: instruction requires: vector 1885#CHECK: wflcdb %v0, %v0 1886 1887 wflcdb %v0, %v0 1888 1889#CHECK: error: instruction requires: vector 1890#CHECK: wflndb %v0, %v0 1891 1892 wflndb %v0, %v0 1893 1894#CHECK: error: instruction requires: vector 1895#CHECK: wflpdb %v0, %v0 1896 1897 wflpdb %v0, %v0 1898 1899#CHECK: error: instruction requires: vector 1900#CHECK: wfmadb %v0, %v0, %v0, %v0 1901 1902 wfmadb %v0, %v0, %v0, %v0 1903 1904#CHECK: error: instruction requires: vector 1905#CHECK: wfmdb %v0, %v0, %v0 1906 1907 wfmdb %v0, %v0, %v0 1908 1909#CHECK: error: instruction requires: vector 1910#CHECK: wfmsdb %v0, %v0, %v0, %v0 1911 1912 wfmsdb %v0, %v0, %v0, %v0 1913 1914#CHECK: error: instruction requires: vector 1915#CHECK: wfsdb %v0, %v0, %v0 1916 1917 wfsdb %v0, %v0, %v0 1918 1919#CHECK: error: instruction requires: vector 1920#CHECK: wfsqdb %v0, %v0 1921 1922 wfsqdb %v0, %v0 1923 1924#CHECK: error: instruction requires: vector 1925#CHECK: wftcidb %v0, %v0, 0 1926 1927 wftcidb %v0, %v0, 0 1928 1929#CHECK: error: instruction requires: vector 1930#CHECK: wldeb %v0, %v0 1931 1932 wldeb %v0, %v0 1933 1934#CHECK: error: instruction requires: vector 1935#CHECK: wledb %v0, %v0, 0, 0 1936 1937 wledb %v0, %v0, 0, 0 1938 1939