1// RUN: llvm-tblgen -gen-register-bank -I %p/../../include %s | FileCheck %s 2 3include "llvm/Target/Target.td" 4 5def MyTarget : Target; 6def R0 : Register<"r0">; 7let Size = 32 in { 8 def ClassA : RegisterClass<"MyTarget", [i32], 32, (add R0)>; 9 def ClassB : RegisterClass<"MyTarget", [i1], 32, (add ClassA)>; 10} 11 12// CHECK: GPRRegBankCoverageData 13// CHECK: MyTarget::ClassARegClassID 14// CHECK: MyTarget::ClassBRegClassID 15def GPRRegBank : RegisterBank<"GPR", [ClassA]>; 16