1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -instcombine -S < %s | FileCheck %s 3 4%overflow.result = type {i8, i1} 5%ov.result.32 = type { i32, i1 } 6 7 8declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone 9declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone 10declare %ov.result.32 @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone 11declare %ov.result.32 @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone 12declare %ov.result.32 @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone 13declare %ov.result.32 @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone 14declare %ov.result.32 @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone 15declare %ov.result.32 @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone 16declare double @llvm.powi.f64(double, i32) nounwind readonly 17declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone 18declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone 19declare i1 @llvm.cttz.i1(i1, i1) nounwind readnone 20declare i1 @llvm.ctlz.i1(i1, i1) nounwind readnone 21declare i32 @llvm.ctpop.i32(i32) nounwind readnone 22declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone 23declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone 24declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone 25declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone 26declare <2 x i8> @llvm.ctlz.v2i8(<2 x i8>, i1) nounwind readnone 27declare double @llvm.cos.f64(double %Val) nounwind readonly 28declare double @llvm.sin.f64(double %Val) nounwind readonly 29declare double @llvm.floor.f64(double %Val) nounwind readonly 30declare double @llvm.ceil.f64(double %Val) nounwind readonly 31declare double @llvm.trunc.f64(double %Val) nounwind readonly 32declare double @llvm.rint.f64(double %Val) nounwind readonly 33declare double @llvm.nearbyint.f64(double %Val) nounwind readonly 34 35define i8 @uaddtest1(i8 %A, i8 %B) { 36 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B) 37 %y = extractvalue %overflow.result %x, 0 38 ret i8 %y 39; CHECK-LABEL: @uaddtest1( 40; CHECK-NEXT: %y = add i8 %A, %B 41; CHECK-NEXT: ret i8 %y 42} 43 44define i8 @uaddtest2(i8 %A, i8 %B, i1* %overflowPtr) { 45 %and.A = and i8 %A, 127 46 %and.B = and i8 %B, 127 47 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B) 48 %y = extractvalue %overflow.result %x, 0 49 %z = extractvalue %overflow.result %x, 1 50 store i1 %z, i1* %overflowPtr 51 ret i8 %y 52; CHECK-LABEL: @uaddtest2( 53; CHECK-NEXT: %and.A = and i8 %A, 127 54; CHECK-NEXT: %and.B = and i8 %B, 127 55; CHECK-NEXT: %x = add nuw i8 %and.A, %and.B 56; CHECK-NEXT: store i1 false, i1* %overflowPtr 57; CHECK-NEXT: ret i8 %x 58} 59 60define i8 @uaddtest3(i8 %A, i8 %B, i1* %overflowPtr) { 61 %or.A = or i8 %A, -128 62 %or.B = or i8 %B, -128 63 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B) 64 %y = extractvalue %overflow.result %x, 0 65 %z = extractvalue %overflow.result %x, 1 66 store i1 %z, i1* %overflowPtr 67 ret i8 %y 68; CHECK-LABEL: @uaddtest3( 69; CHECK-NEXT: %or.A = or i8 %A, -128 70; CHECK-NEXT: %or.B = or i8 %B, -128 71; CHECK-NEXT: %x = add i8 %or.A, %or.B 72; CHECK-NEXT: store i1 true, i1* %overflowPtr 73; CHECK-NEXT: ret i8 %x 74} 75 76define i8 @uaddtest4(i8 %A, i1* %overflowPtr) { 77 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A) 78 %y = extractvalue %overflow.result %x, 0 79 %z = extractvalue %overflow.result %x, 1 80 store i1 %z, i1* %overflowPtr 81 ret i8 %y 82; CHECK-LABEL: @uaddtest4( 83; CHECK-NEXT: ret i8 undef 84} 85 86define i8 @uaddtest5(i8 %A, i1* %overflowPtr) { 87 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 0, i8 %A) 88 %y = extractvalue %overflow.result %x, 0 89 %z = extractvalue %overflow.result %x, 1 90 store i1 %z, i1* %overflowPtr 91 ret i8 %y 92; CHECK-LABEL: @uaddtest5( 93; CHECK: ret i8 %A 94} 95 96define i1 @uaddtest6(i8 %A, i8 %B) { 97 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4) 98 %z = extractvalue %overflow.result %x, 1 99 ret i1 %z 100; CHECK-LABEL: @uaddtest6( 101; CHECK-NEXT: %z = icmp ugt i8 %A, 3 102; CHECK-NEXT: ret i1 %z 103} 104 105define i8 @uaddtest7(i8 %A, i8 %B) { 106 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B) 107 %z = extractvalue %overflow.result %x, 0 108 ret i8 %z 109; CHECK-LABEL: @uaddtest7( 110; CHECK-NEXT: %z = add i8 %A, %B 111; CHECK-NEXT: ret i8 %z 112} 113 114; PR20194 115define %ov.result.32 @saddtest_nsw(i8 %a, i8 %b) { 116 %A = sext i8 %a to i32 117 %B = sext i8 %b to i32 118 %x = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %A, i32 %B) 119 ret %ov.result.32 %x 120; CHECK-LABEL: @saddtest_nsw 121; CHECK: %x = add nsw i32 %A, %B 122; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 123; CHECK-NEXT: ret %ov.result.32 %1 124} 125 126define %ov.result.32 @uaddtest_nuw(i32 %a, i32 %b) { 127 %A = and i32 %a, 2147483647 128 %B = and i32 %b, 2147483647 129 %x = call %ov.result.32 @llvm.uadd.with.overflow.i32(i32 %A, i32 %B) 130 ret %ov.result.32 %x 131; CHECK-LABEL: @uaddtest_nuw 132; CHECK: %x = add nuw i32 %A, %B 133; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 134; CHECK-NEXT: ret %ov.result.32 %1 135} 136 137define %ov.result.32 @ssubtest_nsw(i8 %a, i8 %b) { 138 %A = sext i8 %a to i32 139 %B = sext i8 %b to i32 140 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %A, i32 %B) 141 ret %ov.result.32 %x 142; CHECK-LABEL: @ssubtest_nsw 143; CHECK: %x = sub nsw i32 %A, %B 144; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 145; CHECK-NEXT: ret %ov.result.32 %1 146} 147 148define %ov.result.32 @usubtest_nuw(i32 %a, i32 %b) { 149 %A = or i32 %a, 2147483648 150 %B = and i32 %b, 2147483647 151 %x = call %ov.result.32 @llvm.usub.with.overflow.i32(i32 %A, i32 %B) 152 ret %ov.result.32 %x 153; CHECK-LABEL: @usubtest_nuw 154; CHECK: %x = sub nuw i32 %A, %B 155; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 156; CHECK-NEXT: ret %ov.result.32 %1 157} 158 159define %ov.result.32 @smultest1_nsw(i32 %a, i32 %b) { 160 %A = and i32 %a, 4095 ; 0xfff 161 %B = and i32 %b, 524287; 0x7ffff 162 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B) 163 ret %ov.result.32 %x 164; CHECK-LABEL: @smultest1_nsw 165; CHECK: %x = mul nuw nsw i32 %A, %B 166; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 167; CHECK-NEXT: ret %ov.result.32 %1 168} 169 170define %ov.result.32 @smultest2_nsw(i32 %a, i32 %b) { 171 %A = ashr i32 %a, 16 172 %B = ashr i32 %b, 16 173 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B) 174 ret %ov.result.32 %x 175; CHECK-LABEL: @smultest2_nsw 176; CHECK: %x = mul nsw i32 %A, %B 177; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 178; CHECK-NEXT: ret %ov.result.32 %1 179} 180 181define %ov.result.32 @smultest3_sw(i32 %a, i32 %b) { 182 %A = ashr i32 %a, 16 183 %B = ashr i32 %b, 15 184 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B) 185 ret %ov.result.32 %x 186; CHECK-LABEL: @smultest3_sw 187; CHECK: %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B) 188; CHECK-NEXT: ret %ov.result.32 %x 189} 190 191define %ov.result.32 @umultest_nuw(i32 %a, i32 %b) { 192 %A = and i32 %a, 65535 ; 0xffff 193 %B = and i32 %b, 65535 ; 0xffff 194 %x = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %A, i32 %B) 195 ret %ov.result.32 %x 196; CHECK-LABEL: @umultest_nuw 197; CHECK: %x = mul nuw i32 %A, %B 198; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 199; CHECK-NEXT: ret %ov.result.32 %1 200} 201 202define i8 @umultest1(i8 %A, i1* %overflowPtr) { 203 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A) 204 %y = extractvalue %overflow.result %x, 0 205 %z = extractvalue %overflow.result %x, 1 206 store i1 %z, i1* %overflowPtr 207 ret i8 %y 208; CHECK-LABEL: @umultest1( 209; CHECK-NEXT: store i1 false, i1* %overflowPtr 210; CHECK-NEXT: ret i8 0 211} 212 213define i8 @umultest2(i8 %A, i1* %overflowPtr) { 214 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A) 215 %y = extractvalue %overflow.result %x, 0 216 %z = extractvalue %overflow.result %x, 1 217 store i1 %z, i1* %overflowPtr 218 ret i8 %y 219; CHECK-LABEL: @umultest2( 220; CHECK-NEXT: store i1 false, i1* %overflowPtr 221; CHECK-NEXT: ret i8 %A 222} 223 224define i32 @umultest3(i32 %n) nounwind { 225 %shr = lshr i32 %n, 2 226 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 3) 227 %ov = extractvalue %ov.result.32 %mul, 1 228 %res = extractvalue %ov.result.32 %mul, 0 229 %ret = select i1 %ov, i32 -1, i32 %res 230 ret i32 %ret 231; CHECK-LABEL: @umultest3( 232; CHECK-NEXT: shr 233; CHECK-NEXT: mul nuw 234; CHECK-NEXT: ret 235} 236 237define i32 @umultest4(i32 %n) nounwind { 238 %shr = lshr i32 %n, 1 239 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 4) 240 %ov = extractvalue %ov.result.32 %mul, 1 241 %res = extractvalue %ov.result.32 %mul, 0 242 %ret = select i1 %ov, i32 -1, i32 %res 243 ret i32 %ret 244; CHECK-LABEL: @umultest4( 245; CHECK: umul.with.overflow 246} 247 248define %ov.result.32 @umultest5(i32 %x, i32 %y) nounwind { 249 %or_x = or i32 %x, 2147483648 250 %or_y = or i32 %y, 2147483648 251 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %or_x, i32 %or_y) 252 ret %ov.result.32 %mul 253; CHECK-LABEL: @umultest5( 254; CHECK-NEXT: %[[or_x:.*]] = or i32 %x, -2147483648 255; CHECK-NEXT: %[[or_y:.*]] = or i32 %y, -2147483648 256; CHECK-NEXT: %[[mul:.*]] = mul i32 %[[or_x]], %[[or_y]] 257; CHECK-NEXT: %[[ret:.*]] = insertvalue %ov.result.32 { i32 undef, i1 true }, i32 %[[mul]], 0 258; CHECK-NEXT: ret %ov.result.32 %[[ret]] 259} 260 261define void @powi(double %V, double *%P) { 262 %A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind 263 store volatile double %A, double* %P 264 265 %D = tail call double @llvm.powi.f64(double %V, i32 2) nounwind 266 store volatile double %D, double* %P 267 ret void 268; CHECK-LABEL: @powi( 269; CHECK: %A = fdiv double 1.0{{.*}}, %V 270; CHECK: store volatile double %A, 271; CHECK: %D = fmul double %V, %V 272; CHECK: store volatile double %D 273} 274 275define i32 @cttz(i32 %a) { 276; CHECK-LABEL: @cttz( 277; CHECK-NEXT: ret i32 3 278; 279 %or = or i32 %a, 8 280 %and = and i32 %or, -8 281 %count = tail call i32 @llvm.cttz.i32(i32 %and, i1 true) nounwind readnone 282 ret i32 %count 283} 284 285define <2 x i32> @cttz_vec(<2 x i32> %a) { 286; CHECK-LABEL: @cttz_vec( 287; CHECK-NEXT: ret <2 x i32> <i32 3, i32 3> 288; 289 %or = or <2 x i32> %a, <i32 8, i32 8> 290 %and = and <2 x i32> %or, <i32 -8, i32 -8> 291 %count = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %and, i1 true) nounwind readnone 292 ret <2 x i32> %count 293} 294 295; Make sure we don't add range metadata to i1 cttz. 296define i1 @cttz_i1(i1 %arg) { 297; CHECK-LABEL: @cttz_i1( 298; CHECK-NEXT: [[CNT:%.*]] = call i1 @llvm.cttz.i1(i1 [[ARG:%.*]], i1 false) #2 299; CHECK-NEXT: ret i1 [[CNT]] 300; 301 %cnt = call i1 @llvm.cttz.i1(i1 %arg, i1 false) nounwind readnone 302 ret i1 %cnt 303} 304 305define i1 @cttz_knownbits(i32 %arg) { 306; CHECK-LABEL: @cttz_knownbits( 307; CHECK-NEXT: ret i1 false 308; 309 %or = or i32 %arg, 4 310 %cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone 311 %res = icmp eq i32 %cnt, 4 312 ret i1 %res 313} 314 315define <2 x i1> @cttz_knownbits_vec(<2 x i32> %arg) { 316; CHECK-LABEL: @cttz_knownbits_vec( 317; CHECK-NEXT: ret <2 x i1> zeroinitializer 318; 319 %or = or <2 x i32> %arg, <i32 4, i32 4> 320 %cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone 321 %res = icmp eq <2 x i32> %cnt, <i32 4, i32 4> 322 ret <2 x i1> %res 323} 324 325define i1 @cttz_knownbits2(i32 %arg) { 326; CHECK-LABEL: @cttz_knownbits2( 327; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4 328; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #2, !range ![[$CTTZ_RANGE:[0-9]+]] 329; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[CNT]], 2 330; CHECK-NEXT: ret i1 [[RES]] 331; 332 %or = or i32 %arg, 4 333 %cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone 334 %res = icmp eq i32 %cnt, 2 335 ret i1 %res 336} 337 338define <2 x i1> @cttz_knownbits2_vec(<2 x i32> %arg) { 339; CHECK-LABEL: @cttz_knownbits2_vec( 340; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4> 341; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) 342; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 2, i32 2> 343; CHECK-NEXT: ret <2 x i1> [[RES]] 344; 345 %or = or <2 x i32> %arg, <i32 4, i32 4> 346 %cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone 347 %res = icmp eq <2 x i32> %cnt, <i32 2, i32 2> 348 ret <2 x i1> %res 349} 350 351define i1 @cttz_knownbits3(i32 %arg) { 352; CHECK-LABEL: @cttz_knownbits3( 353; CHECK-NEXT: ret i1 false 354; 355 %or = or i32 %arg, 4 356 %cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone 357 %res = icmp eq i32 %cnt, 3 358 ret i1 %res 359} 360 361; TODO: The icmp is unnecessary given the known bits of the input. 362define <2 x i1> @cttz_knownbits3_vec(<2 x i32> %arg) { 363; CHECK-LABEL: @cttz_knownbits3_vec( 364; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4> 365; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) 366; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 3, i32 3> 367; CHECK-NEXT: ret <2 x i1> [[RES]] 368; 369 %or = or <2 x i32> %arg, <i32 4, i32 4> 370 %cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone 371 %res = icmp eq <2 x i32> %cnt, <i32 3, i32 3> 372 ret <2 x i1> %res 373} 374 375define i8 @ctlz(i8 %a) { 376; CHECK-LABEL: @ctlz( 377; CHECK-NEXT: ret i8 2 378; 379 %or = or i8 %a, 32 380 %and = and i8 %or, 63 381 %count = tail call i8 @llvm.ctlz.i8(i8 %and, i1 true) nounwind readnone 382 ret i8 %count 383} 384 385define <2 x i8> @ctlz_vec(<2 x i8> %a) { 386; CHECK-LABEL: @ctlz_vec( 387; CHECK-NEXT: ret <2 x i8> <i8 2, i8 2> 388; 389 %or = or <2 x i8> %a, <i8 32, i8 32> 390 %and = and <2 x i8> %or, <i8 63, i8 63> 391 %count = tail call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %and, i1 true) nounwind readnone 392 ret <2 x i8> %count 393} 394 395; Make sure we don't add range metadata to i1 ctlz. 396define i1 @ctlz_i1(i1 %arg) { 397; CHECK-LABEL: @ctlz_i1( 398; CHECK-NEXT: [[CNT:%.*]] = call i1 @llvm.ctlz.i1(i1 [[ARG:%.*]], i1 false) #2 399; CHECK-NEXT: ret i1 [[CNT]] 400; 401 %cnt = call i1 @llvm.ctlz.i1(i1 %arg, i1 false) nounwind readnone 402 ret i1 %cnt 403} 404 405define i1 @ctlz_knownbits(i8 %arg) { 406; CHECK-LABEL: @ctlz_knownbits( 407; CHECK-NEXT: ret i1 false 408; 409 %or = or i8 %arg, 32 410 %cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone 411 %res = icmp eq i8 %cnt, 4 412 ret i1 %res 413} 414 415define <2 x i1> @ctlz_knownbits_vec(<2 x i8> %arg) { 416; CHECK-LABEL: @ctlz_knownbits_vec( 417; CHECK-NEXT: ret <2 x i1> zeroinitializer 418; 419 %or = or <2 x i8> %arg, <i8 32, i8 32> 420 %cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone 421 %res = icmp eq <2 x i8> %cnt, <i8 4, i8 4> 422 ret <2 x i1> %res 423} 424 425define i1 @ctlz_knownbits2(i8 %arg) { 426; CHECK-LABEL: @ctlz_knownbits2( 427; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32 428; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #2, !range ![[$CTLZ_RANGE:[0-9]+]] 429; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[CNT]], 2 430; CHECK-NEXT: ret i1 [[RES]] 431; 432 %or = or i8 %arg, 32 433 %cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone 434 %res = icmp eq i8 %cnt, 2 435 ret i1 %res 436} 437 438define <2 x i1> @ctlz_knownbits2_vec(<2 x i8> %arg) { 439; CHECK-LABEL: @ctlz_knownbits2_vec( 440; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32> 441; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) 442; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 2, i8 2> 443; CHECK-NEXT: ret <2 x i1> [[RES]] 444; 445 %or = or <2 x i8> %arg, <i8 32, i8 32> 446 %cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone 447 %res = icmp eq <2 x i8> %cnt, <i8 2, i8 2> 448 ret <2 x i1> %res 449} 450 451define i1 @ctlz_knownbits3(i8 %arg) { 452; CHECK-LABEL: @ctlz_knownbits3( 453; CHECK-NEXT: ret i1 false 454; 455 %or = or i8 %arg, 32 456 %cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone 457 %res = icmp eq i8 %cnt, 3 458 ret i1 %res 459} 460 461; TODO: The icmp is unnecessary given the known bits of the input. 462define <2 x i1> @ctlz_knownbits3_vec(<2 x i8> %arg) { 463; CHECK-LABEL: @ctlz_knownbits3_vec( 464; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32> 465; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) 466; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 3, i8 3> 467; CHECK-NEXT: ret <2 x i1> [[RES]] 468; 469 %or = or <2 x i8> %arg, <i8 32, i8 32> 470 %cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone 471 %res = icmp eq <2 x i8> %cnt, <i8 3, i8 3> 472 ret <2 x i1> %res 473} 474 475define i32 @ctlz_undef(i32 %Value) { 476; CHECK-LABEL: @ctlz_undef( 477; CHECK-NEXT: ret i32 undef 478; 479 %ctlz = call i32 @llvm.ctlz.i32(i32 0, i1 true) 480 ret i32 %ctlz 481} 482 483define <2 x i32> @ctlz_undef_vec(<2 x i32> %Value) { 484; CHECK-LABEL: @ctlz_undef_vec( 485; CHECK-NEXT: ret <2 x i32> undef 486; 487 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> zeroinitializer, i1 true) 488 ret <2 x i32> %ctlz 489} 490 491define i32 @ctlz_make_undef(i32 %a) { 492 %or = or i32 %a, 8 493 %ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 false) 494 ret i32 %ctlz 495; CHECK-LABEL: @ctlz_make_undef( 496; CHECK-NEXT: %or = or i32 %a, 8 497; CHECK-NEXT: %ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 true) 498; CHECK-NEXT: ret i32 %ctlz 499} 500 501define <2 x i32> @ctlz_make_undef_vec(<2 x i32> %a) { 502; CHECK-LABEL: @ctlz_make_undef_vec( 503; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8> 504; CHECK-NEXT: [[CTLZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true) 505; CHECK-NEXT: ret <2 x i32> [[CTLZ]] 506; 507 %or = or <2 x i32> %a, <i32 8, i32 8> 508 %ctlz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %or, i1 false) 509 ret <2 x i32> %ctlz 510} 511 512define i32 @cttz_undef(i32 %Value) nounwind { 513; CHECK-LABEL: @cttz_undef( 514; CHECK-NEXT: ret i32 undef 515; 516 %cttz = call i32 @llvm.cttz.i32(i32 0, i1 true) 517 ret i32 %cttz 518} 519 520define <2 x i32> @cttz_undef_vec(<2 x i32> %Value) nounwind { 521; CHECK-LABEL: @cttz_undef_vec( 522; CHECK-NEXT: ret <2 x i32> undef 523; 524 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> zeroinitializer, i1 true) 525 ret <2 x i32> %cttz 526} 527 528define i32 @cttz_make_undef(i32 %a) { 529 %or = or i32 %a, 8 530 %cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 false) 531 ret i32 %cttz 532; CHECK-LABEL: @cttz_make_undef( 533; CHECK-NEXT: %or = or i32 %a, 8 534; CHECK-NEXT: %cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 true) 535; CHECK-NEXT: ret i32 %cttz 536} 537 538define <2 x i32> @cttz_make_undef_vec(<2 x i32> %a) { 539; CHECK-LABEL: @cttz_make_undef_vec( 540; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8> 541; CHECK-NEXT: [[CTTZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) 542; CHECK-NEXT: ret <2 x i32> [[CTTZ]] 543; 544 %or = or <2 x i32> %a, <i32 8, i32 8> 545 %cttz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 false) 546 ret <2 x i32> %cttz 547} 548 549define i32 @ctlz_select(i32 %Value) nounwind { 550; CHECK-LABEL: @ctlz_select( 551; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 %Value, i1 false) 552; CHECK-NEXT: ret i32 [[TMP1]] 553; 554 %tobool = icmp ne i32 %Value, 0 555 %ctlz = call i32 @llvm.ctlz.i32(i32 %Value, i1 true) 556 %s = select i1 %tobool, i32 %ctlz, i32 32 557 ret i32 %s 558} 559 560define <2 x i32> @ctlz_select_vec(<2 x i32> %Value) nounwind { 561; CHECK-LABEL: @ctlz_select_vec( 562; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false) 563; CHECK-NEXT: ret <2 x i32> [[TMP1]] 564; 565 %tobool = icmp ne <2 x i32> %Value, zeroinitializer 566 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %Value, i1 true) 567 %s = select <2 x i1> %tobool, <2 x i32> %ctlz, <2 x i32> <i32 32, i32 32> 568 ret <2 x i32> %s 569} 570 571define i32 @cttz_select(i32 %Value) nounwind { 572; CHECK-LABEL: @cttz_select( 573; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 %Value, i1 false) 574; CHECK-NEXT: ret i32 [[TMP1]] 575; 576 %tobool = icmp ne i32 %Value, 0 577 %cttz = call i32 @llvm.cttz.i32(i32 %Value, i1 true) 578 %s = select i1 %tobool, i32 %cttz, i32 32 579 ret i32 %s 580} 581 582define <2 x i32> @cttz_select_vec(<2 x i32> %Value) nounwind { 583; CHECK-LABEL: @cttz_select_vec( 584; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false) 585; CHECK-NEXT: ret <2 x i32> [[TMP1]] 586; 587 %tobool = icmp ne <2 x i32> %Value, zeroinitializer 588 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %Value, i1 true) 589 %s = select <2 x i1> %tobool, <2 x i32> %cttz, <2 x i32> <i32 32, i32 32> 590 ret <2 x i32> %s 591} 592 593define i1 @overflow_div_add(i32 %v1, i32 %v2) nounwind { 594; CHECK-LABEL: @overflow_div_add( 595; CHECK-NEXT: ret i1 false 596; 597 %div = sdiv i32 %v1, 2 598 %t = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %div, i32 1) 599 %obit = extractvalue %ov.result.32 %t, 1 600 ret i1 %obit 601} 602 603define i1 @overflow_div_sub(i32 %v1, i32 %v2) nounwind { 604 ; Check cases where the known sign bits are larger than the word size. 605; CHECK-LABEL: @overflow_div_sub( 606; CHECK-NEXT: ret i1 false 607; 608 %a = ashr i32 %v1, 18 609 %div = sdiv i32 %a, 65536 610 %t = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %div, i32 1) 611 %obit = extractvalue %ov.result.32 %t, 1 612 ret i1 %obit 613} 614 615define i1 @overflow_mod_mul(i32 %v1, i32 %v2) nounwind { 616; CHECK-LABEL: @overflow_mod_mul( 617; CHECK-NEXT: ret i1 false 618; 619 %rem = srem i32 %v1, 1000 620 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem) 621 %obit = extractvalue %ov.result.32 %t, 1 622 ret i1 %obit 623} 624 625define i1 @overflow_mod_overflow_mul(i32 %v1, i32 %v2) nounwind { 626; CHECK-LABEL: @overflow_mod_overflow_mul( 627; CHECK-NEXT: [[REM:%.*]] = srem i32 %v1, 65537 628; CHECK-NEXT: [[T:%.*]] = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 [[REM]], i32 [[REM]]) 629; CHECK-NEXT: [[OBIT:%.*]] = extractvalue %ov.result.32 [[T]], 1 630; CHECK-NEXT: ret i1 [[OBIT]] 631; 632 %rem = srem i32 %v1, 65537 633 ; This may overflow because the result of the mul operands may be greater than 16bits 634 ; and the result greater than 32. 635 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem) 636 %obit = extractvalue %ov.result.32 %t, 1 637 ret i1 %obit 638} 639 640define %ov.result.32 @ssubtest_reorder(i8 %a) { 641 %A = sext i8 %a to i32 642 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 0, i32 %A) 643 ret %ov.result.32 %x 644; CHECK-LABEL: @ssubtest_reorder 645; CHECK: %x = sub nsw i32 0, %A 646; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0 647; CHECK-NEXT: ret %ov.result.32 %1 648} 649 650define %ov.result.32 @never_overflows_ssub_test0(i32 %a) { 651 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %a, i32 0) 652 ret %ov.result.32 %x 653; CHECK-LABEL: @never_overflows_ssub_test0 654; CHECK-NEXT: %[[x:.*]] = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %a, 0 655; CHECK-NEXT: ret %ov.result.32 %[[x]] 656} 657 658define void @cos(double *%P) { 659; CHECK-LABEL: @cos( 660; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8 661; CHECK-NEXT: ret void 662; 663 %B = tail call double @llvm.cos.f64(double 0.0) nounwind 664 store volatile double %B, double* %P 665 666 ret void 667} 668 669define void @sin(double *%P) { 670; CHECK-LABEL: @sin( 671; CHECK-NEXT: store volatile double 0.000000e+00, double* %P, align 8 672; CHECK-NEXT: ret void 673; 674 %B = tail call double @llvm.sin.f64(double 0.0) nounwind 675 store volatile double %B, double* %P 676 677 ret void 678} 679 680define void @floor(double *%P) { 681; CHECK-LABEL: @floor( 682; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8 683; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8 684; CHECK-NEXT: ret void 685; 686 %B = tail call double @llvm.floor.f64(double 1.5) nounwind 687 store volatile double %B, double* %P 688 %C = tail call double @llvm.floor.f64(double -1.5) nounwind 689 store volatile double %C, double* %P 690 ret void 691} 692 693define void @ceil(double *%P) { 694; CHECK-LABEL: @ceil( 695; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8 696; CHECK-NEXT: store volatile double -1.000000e+00, double* %P, align 8 697; CHECK-NEXT: ret void 698; 699 %B = tail call double @llvm.ceil.f64(double 1.5) nounwind 700 store volatile double %B, double* %P 701 %C = tail call double @llvm.ceil.f64(double -1.5) nounwind 702 store volatile double %C, double* %P 703 ret void 704} 705 706define void @trunc(double *%P) { 707; CHECK-LABEL: @trunc( 708; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8 709; CHECK-NEXT: store volatile double -1.000000e+00, double* %P, align 8 710; CHECK-NEXT: ret void 711; 712 %B = tail call double @llvm.trunc.f64(double 1.5) nounwind 713 store volatile double %B, double* %P 714 %C = tail call double @llvm.trunc.f64(double -1.5) nounwind 715 store volatile double %C, double* %P 716 ret void 717} 718 719define void @rint(double *%P) { 720; CHECK-LABEL: @rint( 721; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8 722; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8 723; CHECK-NEXT: ret void 724; 725 %B = tail call double @llvm.rint.f64(double 1.5) nounwind 726 store volatile double %B, double* %P 727 %C = tail call double @llvm.rint.f64(double -1.5) nounwind 728 store volatile double %C, double* %P 729 ret void 730} 731 732define void @nearbyint(double *%P) { 733; CHECK-LABEL: @nearbyint( 734; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8 735; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8 736; CHECK-NEXT: ret void 737; 738 %B = tail call double @llvm.nearbyint.f64(double 1.5) nounwind 739 store volatile double %B, double* %P 740 %C = tail call double @llvm.nearbyint.f64(double -1.5) nounwind 741 store volatile double %C, double* %P 742 ret void 743} 744 745; CHECK: [[$CTTZ_RANGE]] = !{i32 0, i32 3} 746; CHECK: [[$CTLZ_RANGE]] = !{i8 0, i8 3} 747