1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4define i32 @pow2_multiplier(i32 %A) { 5; CHECK-LABEL: @pow2_multiplier( 6; CHECK-NEXT: [[B:%.*]] = shl i32 [[A:%.*]], 1 7; CHECK-NEXT: ret i32 [[B]] 8; 9 %B = mul i32 %A, 2 10 ret i32 %B 11} 12 13define <2 x i32> @pow2_multiplier_vec(<2 x i32> %A) { 14; CHECK-LABEL: @pow2_multiplier_vec( 15; CHECK-NEXT: [[B:%.*]] = shl <2 x i32> [[A:%.*]], <i32 3, i32 3> 16; CHECK-NEXT: ret <2 x i32> [[B]] 17; 18 %B = mul <2 x i32> %A, <i32 8, i32 8> 19 ret <2 x i32> %B 20} 21 22define i8 @combine_shl(i8 %A) { 23; CHECK-LABEL: @combine_shl( 24; CHECK-NEXT: [[C:%.*]] = shl i8 [[A:%.*]], 6 25; CHECK-NEXT: ret i8 [[C]] 26; 27 %B = mul i8 %A, 8 28 %C = mul i8 %B, 8 29 ret i8 %C 30} 31 32define i32 @neg(i32 %i) { 33; CHECK-LABEL: @neg( 34; CHECK-NEXT: [[TMP:%.*]] = sub i32 0, [[I:%.*]] 35; CHECK-NEXT: ret i32 [[TMP]] 36; 37 %tmp = mul i32 %i, -1 38 ret i32 %tmp 39} 40 41; Use the sign-bit as a mask: 42; (zext (A < 0)) * B --> (A >> 31) & B 43 44define i32 @test10(i32 %a, i32 %b) { 45; CHECK-LABEL: @test10( 46; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 47; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 48; CHECK-NEXT: ret i32 [[E]] 49; 50 %c = icmp slt i32 %a, 0 51 %d = zext i1 %c to i32 52 %e = mul i32 %d, %b 53 ret i32 %e 54} 55 56define i32 @test11(i32 %a, i32 %b) { 57; CHECK-LABEL: @test11( 58; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 59; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 60; CHECK-NEXT: ret i32 [[E]] 61; 62 %c = icmp sle i32 %a, -1 63 %d = zext i1 %c to i32 64 %e = mul i32 %d, %b 65 ret i32 %e 66} 67 68declare void @use32(i32) 69 70define i32 @test12(i32 %a, i32 %b) { 71; CHECK-LABEL: @test12( 72; CHECK-NEXT: [[A_LOBIT:%.*]] = lshr i32 [[A:%.*]], 31 73; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A]], 31 74; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 75; CHECK-NEXT: call void @use32(i32 [[A_LOBIT]]) 76; CHECK-NEXT: ret i32 [[E]] 77; 78 %c = icmp ugt i32 %a, 2147483647 79 %d = zext i1 %c to i32 80 %e = mul i32 %d, %b 81 call void @use32(i32 %d) 82 ret i32 %e 83} 84 85; rdar://7293527 86define i32 @test15(i32 %A, i32 %B) { 87; CHECK-LABEL: @test15( 88; CHECK-NEXT: [[M:%.*]] = shl i32 [[A:%.*]], [[B:%.*]] 89; CHECK-NEXT: ret i32 [[M]] 90; 91 %shl = shl i32 1, %B 92 %m = mul i32 %shl, %A 93 ret i32 %m 94} 95 96; X * Y (when Y is a boolean) --> Y ? X : 0 97 98define i32 @mul_bool(i32 %x, i1 %y) { 99; CHECK-LABEL: @mul_bool( 100; CHECK-NEXT: [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0 101; CHECK-NEXT: ret i32 [[M]] 102; 103 %z = zext i1 %y to i32 104 %m = mul i32 %x, %z 105 ret i32 %m 106} 107 108; Commute and test vector type. 109 110define <2 x i32> @mul_bool_vec(<2 x i32> %x, <2 x i1> %y) { 111; CHECK-LABEL: @mul_bool_vec( 112; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer 113; CHECK-NEXT: ret <2 x i32> [[M]] 114; 115 %z = zext <2 x i1> %y to <2 x i32> 116 %m = mul <2 x i32> %x, %z 117 ret <2 x i32> %m 118} 119 120define <2 x i32> @mul_bool_vec_commute(<2 x i32> %x, <2 x i1> %y) { 121; CHECK-LABEL: @mul_bool_vec_commute( 122; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer 123; CHECK-NEXT: ret <2 x i32> [[M]] 124; 125 %z = zext <2 x i1> %y to <2 x i32> 126 %m = mul <2 x i32> %z, %x 127 ret <2 x i32> %m 128} 129 130; (A >>u 31) * B --> (A >>s 31) & B 131 132define i32 @signbit_mul(i32 %a, i32 %b) { 133; CHECK-LABEL: @signbit_mul( 134; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31 135; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 136; CHECK-NEXT: ret i32 [[E]] 137; 138 %d = lshr i32 %a, 31 139 %e = mul i32 %d, %b 140 ret i32 %e 141} 142 143define i32 @signbit_mul_commute_extra_use(i32 %a, i32 %b) { 144; CHECK-LABEL: @signbit_mul_commute_extra_use( 145; CHECK-NEXT: [[D:%.*]] = lshr i32 [[A:%.*]], 31 146; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[A]], 31 147; CHECK-NEXT: [[E:%.*]] = and i32 [[TMP1]], [[B:%.*]] 148; CHECK-NEXT: call void @use32(i32 [[D]]) 149; CHECK-NEXT: ret i32 [[E]] 150; 151 %d = lshr i32 %a, 31 152 %e = mul i32 %b, %d 153 call void @use32(i32 %d) 154 ret i32 %e 155} 156 157; (A >>u 31)) * B --> (A >>s 31) & B 158 159define <2 x i32> @signbit_mul_vec(<2 x i32> %a, <2 x i32> %b) { 160; CHECK-LABEL: @signbit_mul_vec( 161; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31> 162; CHECK-NEXT: [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]] 163; CHECK-NEXT: ret <2 x i32> [[E]] 164; 165 %d = lshr <2 x i32> %a, <i32 31, i32 31> 166 %e = mul <2 x i32> %d, %b 167 ret <2 x i32> %e 168} 169 170define <2 x i32> @signbit_mul_vec_commute(<2 x i32> %a, <2 x i32> %b) { 171; CHECK-LABEL: @signbit_mul_vec_commute( 172; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31> 173; CHECK-NEXT: [[E:%.*]] = and <2 x i32> [[TMP1]], [[B:%.*]] 174; CHECK-NEXT: ret <2 x i32> [[E]] 175; 176 %d = lshr <2 x i32> %a, <i32 31, i32 31> 177 %e = mul <2 x i32> %b, %d 178 ret <2 x i32> %e 179} 180 181define i32 @test18(i32 %A, i32 %B) { 182; CHECK-LABEL: @test18( 183; CHECK-NEXT: ret i32 0 184; 185 %C = and i32 %A, 1 186 %D = and i32 %B, 1 187 %E = mul i32 %C, %D 188 %F = and i32 %E, 16 189 ret i32 %F 190} 191 192declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) 193declare void @use(i1) 194 195define i32 @test19(i32 %A, i32 %B) { 196; CHECK-LABEL: @test19( 197; CHECK-NEXT: call void @use(i1 false) 198; CHECK-NEXT: ret i32 0 199; 200 %C = and i32 %A, 1 201 %D = and i32 %B, 1 202 203; It would be nice if we also started proving that this doesn't overflow. 204 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D) 205 %F = extractvalue {i32, i1} %E, 0 206 %G = extractvalue {i32, i1} %E, 1 207 call void @use(i1 %G) 208 %H = and i32 %F, 16 209 ret i32 %H 210} 211 212define <2 x i64> @test20(<2 x i64> %A) { 213; CHECK-LABEL: @test20( 214; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i64> [[A:%.*]], <i64 3, i64 2> 215; CHECK-NEXT: [[C:%.*]] = add <2 x i64> [[TMP1]], <i64 36, i64 28> 216; CHECK-NEXT: ret <2 x i64> [[C]] 217; 218 %B = add <2 x i64> %A, <i64 12, i64 14> 219 %C = mul <2 x i64> %B, <i64 3, i64 2> 220 ret <2 x i64> %C 221} 222 223define <2 x i1> @test21(<2 x i1> %A, <2 x i1> %B) { 224; CHECK-LABEL: @test21( 225; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]] 226; CHECK-NEXT: ret <2 x i1> [[C]] 227; 228 %C = mul <2 x i1> %A, %B 229 ret <2 x i1> %C 230} 231 232define i32 @test22(i32 %A) { 233; CHECK-LABEL: @test22( 234; CHECK-NEXT: [[B:%.*]] = sub nsw i32 0, [[A:%.*]] 235; CHECK-NEXT: ret i32 [[B]] 236; 237 %B = mul nsw i32 %A, -1 238 ret i32 %B 239} 240 241define i32 @test23(i32 %A) { 242; CHECK-LABEL: @test23( 243; CHECK-NEXT: [[C:%.*]] = mul nuw i32 [[A:%.*]], 6 244; CHECK-NEXT: ret i32 [[C]] 245; 246 %B = shl nuw i32 %A, 1 247 %C = mul nuw i32 %B, 3 248 ret i32 %C 249} 250 251define i32 @test24(i32 %A) { 252; CHECK-LABEL: @test24( 253; CHECK-NEXT: [[C:%.*]] = mul nsw i32 [[A:%.*]], 6 254; CHECK-NEXT: ret i32 [[C]] 255; 256 %B = shl nsw i32 %A, 1 257 %C = mul nsw i32 %B, 3 258 ret i32 %C 259} 260 261define i32 @neg_neg_mul(i32 %A, i32 %B) { 262; CHECK-LABEL: @neg_neg_mul( 263; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], [[B:%.*]] 264; CHECK-NEXT: ret i32 [[E]] 265; 266 %C = sub i32 0, %A 267 %D = sub i32 0, %B 268 %E = mul i32 %C, %D 269 ret i32 %E 270} 271 272define i32 @neg_neg_mul_nsw(i32 %A, i32 %B) { 273; CHECK-LABEL: @neg_neg_mul_nsw( 274; CHECK-NEXT: [[E:%.*]] = mul nsw i32 [[A:%.*]], [[B:%.*]] 275; CHECK-NEXT: ret i32 [[E]] 276; 277 %C = sub nsw i32 0, %A 278 %D = sub nsw i32 0, %B 279 %E = mul nsw i32 %C, %D 280 ret i32 %E 281} 282 283define i124 @neg_neg_mul_apint(i124 %A, i124 %B) { 284; CHECK-LABEL: @neg_neg_mul_apint( 285; CHECK-NEXT: [[E:%.*]] = mul i124 [[A:%.*]], [[B:%.*]] 286; CHECK-NEXT: ret i124 [[E]] 287; 288 %C = sub i124 0, %A 289 %D = sub i124 0, %B 290 %E = mul i124 %C, %D 291 ret i124 %E 292} 293 294define i32 @neg_mul_constant(i32 %A) { 295; CHECK-LABEL: @neg_mul_constant( 296; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], -7 297; CHECK-NEXT: ret i32 [[E]] 298; 299 %C = sub i32 0, %A 300 %E = mul i32 %C, 7 301 ret i32 %E 302} 303 304define i55 @neg_mul_constant_apint(i55 %A) { 305; CHECK-LABEL: @neg_mul_constant_apint( 306; CHECK-NEXT: [[E:%.*]] = mul i55 [[A:%.*]], -7 307; CHECK-NEXT: ret i55 [[E]] 308; 309 %C = sub i55 0, %A 310 %E = mul i55 %C, 7 311 ret i55 %E 312} 313 314define <3 x i8> @neg_mul_constant_vec(<3 x i8> %a) { 315; CHECK-LABEL: @neg_mul_constant_vec( 316; CHECK-NEXT: [[B:%.*]] = mul <3 x i8> [[A:%.*]], <i8 -5, i8 -5, i8 -5> 317; CHECK-NEXT: ret <3 x i8> [[B]] 318; 319 %A = sub <3 x i8> zeroinitializer, %a 320 %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5> 321 ret <3 x i8> %B 322} 323 324define <3 x i4> @neg_mul_constant_vec_weird(<3 x i4> %a) { 325; CHECK-LABEL: @neg_mul_constant_vec_weird( 326; CHECK-NEXT: [[B:%.*]] = mul <3 x i4> [[A:%.*]], <i4 -5, i4 -5, i4 -5> 327; CHECK-NEXT: ret <3 x i4> [[B]] 328; 329 %A = sub <3 x i4> zeroinitializer, %a 330 %B = mul <3 x i4> %A, <i4 5, i4 5, i4 5> 331 ret <3 x i4> %B 332} 333 334define i32 @test26(i32 %A, i32 %B) { 335; CHECK-LABEL: @test26( 336; CHECK-NEXT: [[D:%.*]] = shl nsw i32 [[A:%.*]], [[B:%.*]] 337; CHECK-NEXT: ret i32 [[D]] 338; 339 %C = shl nsw i32 1, %B 340 %D = mul nsw i32 %A, %C 341 ret i32 %D 342} 343 344define i32 @test27(i32 %A, i32 %B) { 345; CHECK-LABEL: @test27( 346; CHECK-NEXT: [[D:%.*]] = shl nuw i32 [[A:%.*]], [[B:%.*]] 347; CHECK-NEXT: ret i32 [[D]] 348; 349 %C = shl i32 1, %B 350 %D = mul nuw i32 %A, %C 351 ret i32 %D 352} 353 354define i32 @test28(i32 %A) { 355; CHECK-LABEL: @test28( 356; CHECK-NEXT: [[B:%.*]] = shl i32 1, [[A:%.*]] 357; CHECK-NEXT: [[C:%.*]] = shl i32 [[B]], [[A]] 358; CHECK-NEXT: ret i32 [[C]] 359; 360 %B = shl i32 1, %A 361 %C = mul nsw i32 %B, %B 362 ret i32 %C 363} 364 365define i64 @test29(i31 %A, i31 %B) { 366; CHECK-LABEL: @test29( 367; CHECK-NEXT: [[C:%.*]] = sext i31 [[A:%.*]] to i64 368; CHECK-NEXT: [[D:%.*]] = sext i31 [[B:%.*]] to i64 369; CHECK-NEXT: [[E:%.*]] = mul nsw i64 [[C]], [[D]] 370; CHECK-NEXT: ret i64 [[E]] 371; 372 %C = sext i31 %A to i64 373 %D = sext i31 %B to i64 374 %E = mul i64 %C, %D 375 ret i64 %E 376} 377 378define i64 @test30(i32 %A, i32 %B) { 379; CHECK-LABEL: @test30( 380; CHECK-NEXT: [[C:%.*]] = zext i32 [[A:%.*]] to i64 381; CHECK-NEXT: [[D:%.*]] = zext i32 [[B:%.*]] to i64 382; CHECK-NEXT: [[E:%.*]] = mul nuw i64 [[C]], [[D]] 383; CHECK-NEXT: ret i64 [[E]] 384; 385 %C = zext i32 %A to i64 386 %D = zext i32 %B to i64 387 %E = mul i64 %C, %D 388 ret i64 %E 389} 390 391@PR22087 = external global i32 392define i32 @test31(i32 %V) { 393; CHECK-LABEL: @test31( 394; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[V:%.*]], zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32) 395; CHECK-NEXT: ret i32 [[MUL]] 396; 397 %mul = mul i32 %V, shl (i32 1, i32 zext (i1 icmp ne (i32* inttoptr (i64 1 to i32*), i32* @PR22087) to i32)) 398 ret i32 %mul 399} 400 401define i32 @test32(i32 %X) { 402; CHECK-LABEL: @test32( 403; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[X:%.*]], 31 404; CHECK-NEXT: ret i32 [[MUL]] 405; 406 %mul = mul nsw i32 %X, -2147483648 407 ret i32 %mul 408} 409 410define <2 x i32> @test32vec(<2 x i32> %X) { 411; CHECK-LABEL: @test32vec( 412; CHECK-NEXT: [[MUL:%.*]] = shl nsw <2 x i32> [[X:%.*]], <i32 31, i32 31> 413; CHECK-NEXT: ret <2 x i32> [[MUL]] 414; 415 %mul = mul nsw <2 x i32> %X, <i32 -2147483648, i32 -2147483648> 416 ret <2 x i32> %mul 417} 418 419define i32 @test33(i32 %X) { 420; CHECK-LABEL: @test33( 421; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[X:%.*]], 30 422; CHECK-NEXT: ret i32 [[MUL]] 423; 424 %mul = mul nsw i32 %X, 1073741824 425 ret i32 %mul 426} 427 428define <2 x i32> @test33vec(<2 x i32> %X) { 429; CHECK-LABEL: @test33vec( 430; CHECK-NEXT: [[MUL:%.*]] = shl nsw <2 x i32> [[X:%.*]], <i32 30, i32 30> 431; CHECK-NEXT: ret <2 x i32> [[MUL]] 432; 433 %mul = mul nsw <2 x i32> %X, <i32 1073741824, i32 1073741824> 434 ret <2 x i32> %mul 435} 436 437define i128 @test34(i128 %X) { 438; CHECK-LABEL: @test34( 439; CHECK-NEXT: [[MUL:%.*]] = shl nsw i128 [[X:%.*]], 1 440; CHECK-NEXT: ret i128 [[MUL]] 441; 442 %mul = mul nsw i128 %X, 2 443 ret i128 %mul 444} 445