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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -newgvn -S %s | FileCheck %s
3; Verify that we don't accidentally delete intrinsics that aren't SSA copies
4%DS_struct = type { [32 x i64*], i8, [32 x i16] }
5%MNR_struct = type { i64, i64, %DS_struct* }
6
7declare i64 @llvm.x86.bmi.bextr.64(i64, i64) #3
8
9define %MNR_struct @f000316011717_2(%DS_struct* %pDS, [64 x i64]* %pCG) #2 {
10; CHECK-LABEL: @f000316011717_2(
11; CHECK-NEXT:  Entry:
12; CHECK-NEXT:    [[RESTART:%.*]] = alloca [[MNR_STRUCT:%.*]]
13; CHECK-NEXT:    [[PCARRY:%.*]] = getelementptr [[DS_STRUCT:%.*]], %DS_struct* [[PDS:%.*]], i32 0, i32 1
14; CHECK-NEXT:    [[PBRBASE:%.*]] = getelementptr [[DS_STRUCT]], %DS_struct* [[PDS]], i32 0, i32 0
15; CHECK-NEXT:    [[PBASE:%.*]] = getelementptr [32 x i64*], [32 x i64*]* [[PBRBASE]], i64 0, i64 0
16; CHECK-NEXT:    [[BASE:%.*]] = load i64*, i64** [[PBASE]], !tbaa !14
17; CHECK-NEXT:    [[ABSADDR:%.*]] = getelementptr i64, i64* [[BASE]], i64 9
18; CHECK-NEXT:    [[EXTARGET:%.*]] = load i64, i64* [[ABSADDR]], align 8, !tbaa !4
19; CHECK-NEXT:    [[TEMPLATE:%.*]] = icmp eq i64 [[EXTARGET]], 8593987412
20; CHECK-NEXT:    br i1 [[TEMPLATE]], label %"BB3.000316011731#1", label [[BB2_000316011731_5:%.*]]
21; CHECK:       "BB3.000316011731#1":
22; CHECK-NEXT:    [[PBASE8:%.*]] = getelementptr [32 x i64*], [32 x i64*]* [[PBRBASE]], i64 0, i64 29
23; CHECK-NEXT:    [[BASE9:%.*]] = load i64*, i64** [[PBASE8]], !tbaa !14
24; CHECK-NEXT:    [[ABSADDR1:%.*]] = getelementptr i64, i64* [[BASE9]], i64 7
25; CHECK-NEXT:    [[RMEM:%.*]] = load i64, i64* [[ABSADDR1]], align 8, !tbaa !4
26; CHECK-NEXT:    [[PWT:%.*]] = getelementptr [[DS_STRUCT]], %DS_struct* [[PDS]], i32 0, i32 2
27; CHECK-NEXT:    [[PWTE:%.*]] = getelementptr [32 x i16], [32 x i16]* [[PWT]], i64 0, i64 8593987412
28; CHECK-NEXT:    [[SHIFTS:%.*]] = load i16, i16* [[PWTE]], align 2, !tbaa !18, !invariant.load !20
29; CHECK-NEXT:    [[SLOWJ:%.*]] = icmp eq i16 [[SHIFTS]], 0
30; CHECK-NEXT:    br i1 [[SLOWJ]], label [[BB2_000316011731_5]], label %"BB3.000316011731#1.1"
31; CHECK:       BB2.000316011731.5:
32; CHECK-NEXT:    [[EXTARGET1:%.*]] = and i64 [[EXTARGET]], 137438953471
33; CHECK-NEXT:    switch i64 [[EXTARGET1]], label [[EXIT:%.*]] [
34; CHECK-NEXT:    ]
35; CHECK:       "BB3.000316011731#1.1":
36; CHECK-NEXT:    [[SHIFTS1:%.*]] = zext i16 [[SHIFTS]] to i64
37; CHECK-NEXT:    [[VAL:%.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 [[RMEM]], i64 [[SHIFTS1]])
38; CHECK-NEXT:    [[PREG:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG:%.*]], i64 0, i64 12
39; CHECK-NEXT:    store i64 [[VAL]], i64* [[PREG]], align 32, !tbaa !10
40; CHECK-NEXT:    [[PREG2:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG]], i64 0, i64 14
41; CHECK-NEXT:    [[REG:%.*]] = load i64, i64* [[PREG2]], align 16, !tbaa !12
42; CHECK-NEXT:    [[BASE2:%.*]] = load i64*, i64** [[PBASE8]], !tbaa !14
43; CHECK-NEXT:    [[ABSADDR2:%.*]] = getelementptr i64, i64* [[BASE2]], i64 [[REG]]
44; CHECK-NEXT:    [[RMEM2:%.*]] = load i64, i64* [[ABSADDR2]], align 8, !tbaa !1
45; CHECK-NEXT:    [[PREG7:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG]], i64 0, i64 9
46; CHECK-NEXT:    store i64 [[RMEM2]], i64* [[PREG7]], align 8, !tbaa !8
47; CHECK-NEXT:    [[ADD2C279:%.*]] = add i64 [[RMEM2]], [[VAL]]
48; CHECK-NEXT:    [[CCHK:%.*]] = icmp sge i64 [[ADD2C279]], 0
49; CHECK-NEXT:    [[CFL:%.*]] = zext i1 [[CCHK]] to i8
50; CHECK-NEXT:    store i8 [[CFL]], i8* [[PCARRY]], align 1, !tbaa !16
51; CHECK-NEXT:    br label [[EXIT]]
52; CHECK:       Exit:
53; CHECK-NEXT:    [[RESTART378:%.*]] = load [[MNR_STRUCT]], %MNR_struct* [[RESTART]]
54; CHECK-NEXT:    ret [[MNR_STRUCT]] %restart378
55;
56Entry:
57  %restart = alloca %MNR_struct
58  %pCarry = getelementptr %DS_struct, %DS_struct* %pDS, i32 0, i32 1
59  %pBRBase = getelementptr  %DS_struct, %DS_struct* %pDS, i32 0, i32 0
60  %pbase = getelementptr  [32 x i64*], [32 x i64*]* %pBRBase, i64 0, i64 0
61  %base = load i64*, i64** %pbase, !tbaa !142
62  %absaddr = getelementptr  i64, i64* %base, i64 9
63  %extarget = load i64, i64* %absaddr, align 8, !tbaa !4
64  %template = icmp eq i64 %extarget, 8593987412
65  br i1 %template, label %"BB3.000316011731#1", label %BB2.000316011731.5
66
67"BB3.000316011731#1":
68  %pBRBase7 = getelementptr  %DS_struct, %DS_struct* %pDS, i32 0, i32 0
69  %pbase8 = getelementptr  [32 x i64*], [32 x i64*]* %pBRBase7, i64 0, i64 29
70  %base9 = load i64*, i64** %pbase8, !tbaa !142
71  %absaddr1 = getelementptr  i64, i64* %base9, i64 7
72  %rmem = load i64, i64* %absaddr1, align 8, !tbaa !4
73  %pwt = getelementptr  %DS_struct, %DS_struct* %pDS, i32 0, i32 2
74  %pwte = getelementptr  [32 x i16], [32 x i16]* %pwt, i64 0, i64 %extarget
75  %shifts = load i16, i16* %pwte, align 2, !tbaa !175, !invariant.load !181
76  %slowj = icmp eq i16 %shifts, 0
77  br i1 %slowj, label %BB2.000316011731.5, label %"BB3.000316011731#1.1"
78
79BB2.000316011731.5:
80  %extarget1 = and i64 %extarget, 137438953471
81  switch i64 %extarget1, label %Exit [
82  ]
83
84"BB3.000316011731#1.1":
85  %shifts1 = zext i16 %shifts to i64
86  %val = call i64 @llvm.x86.bmi.bextr.64(i64 %rmem, i64 %shifts1)
87  %preg = getelementptr  [64 x i64], [64 x i64]* %pCG, i64 0, i64 12
88  store i64 %val, i64* %preg, align 32, !tbaa !32
89  %preg2 = getelementptr  [64 x i64], [64 x i64]* %pCG, i64 0, i64 14
90  %reg = load i64, i64* %preg2, align 16, !tbaa !36
91  %pBRBase2 = getelementptr  %DS_struct, %DS_struct* %pDS, i32 0, i32 0
92  %pbase2 = getelementptr  [32 x i64*], [32 x i64*]* %pBRBase2, i64 0, i64 29
93  %base2 = load i64*, i64** %pbase2, !tbaa !142
94  %absaddr2 = getelementptr  i64, i64* %base2, i64 %reg
95  %rmem2 = load i64, i64* %absaddr2, align 8, !tbaa !4
96  %preg7 = getelementptr  [64 x i64], [64 x i64]* %pCG, i64 0, i64 9
97  store i64 %rmem2, i64* %preg7, align 8, !tbaa !26
98  %reg7 = load i64, i64* %preg7, align 8, !tbaa !26
99  %preg3 = getelementptr  [64 x i64], [64 x i64]* %pCG, i64 0, i64 12
100  %reg4 = load i64, i64* %preg3, align 32, !tbaa !32
101  %add2c279 = add i64 %reg7, %reg4
102  %cchk = icmp sge i64 %add2c279, 0
103  %cfl = zext i1 %cchk to i8
104  store i8 %cfl, i8* %pCarry, align 1, !tbaa !156
105  br label %Exit
106
107Exit:
108  %restart378 = load %MNR_struct, %MNR_struct* %restart
109  ret %MNR_struct %restart378
110}
111
112attributes #2 = { nounwind }
113attributes #3 = { nounwind readnone }
114
115!tbaa = !{!0, !1, !3, !4, !6, !26, !32, !36, !142, !156, !175}
116
117!0 = !{!"tbaa2200"}
118!1 = !{!2, !2, i64 0}
119!2 = !{!"data", !0}
120!3 = !{!"ctrl", !0}
121!4 = !{!5, !5, i64 0}
122!5 = !{!"mem", !2}
123!6 = !{!7, !7, i64 0}
124!7 = !{!"grs", !2}
125!26 = !{!27, !27, i64 0}
126!27 = !{!"X9", !7}
127!32 = !{!33, !33, i64 0}
128!33 = !{!"A0", !7}
129!36 = !{!37, !37, i64 0}
130!37 = !{!"A2", !7}
131!142 = !{!143, !143, i64 0}
132!143 = !{!"breg", !3}
133!156 = !{!157, !157, i64 0}
134!157 = !{!"carry", !3}
135!175 = !{!176, !176, i64 0, i32 1}
136!176 = !{!"const", !3}
137!181 = !{}
138