1; RUN: opt < %s -sroa -S | FileCheck %s 2; RUN: opt < %s -passes=sroa -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 5 6declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) 7declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) 8 9define i32 @test0() { 10; CHECK-LABEL: @test0( 11; CHECK-NOT: alloca 12; CHECK: ret i32 13 14entry: 15 %a1 = alloca i32 16 %a2 = alloca float 17 18 %a1.i8 = bitcast i32* %a1 to i8* 19 call void @llvm.lifetime.start.p0i8(i64 4, i8* %a1.i8) 20 21 store i32 0, i32* %a1 22 %v1 = load i32, i32* %a1 23 24 call void @llvm.lifetime.end.p0i8(i64 4, i8* %a1.i8) 25 26 %a2.i8 = bitcast float* %a2 to i8* 27 call void @llvm.lifetime.start.p0i8(i64 4, i8* %a2.i8) 28 29 store float 0.0, float* %a2 30 %v2 = load float , float * %a2 31 %v2.int = bitcast float %v2 to i32 32 %sum1 = add i32 %v1, %v2.int 33 34 call void @llvm.lifetime.end.p0i8(i64 4, i8* %a2.i8) 35 36 ret i32 %sum1 37} 38 39define i32 @test1() { 40; CHECK-LABEL: @test1( 41; CHECK-NOT: alloca 42; CHECK: ret i32 0 43 44entry: 45 %X = alloca { i32, float } 46 %Y = getelementptr { i32, float }, { i32, float }* %X, i64 0, i32 0 47 store i32 0, i32* %Y 48 %Z = load i32, i32* %Y 49 ret i32 %Z 50} 51 52define i64 @test2(i64 %X) { 53; CHECK-LABEL: @test2( 54; CHECK-NOT: alloca 55; CHECK: ret i64 %X 56 57entry: 58 %A = alloca [8 x i8] 59 %B = bitcast [8 x i8]* %A to i64* 60 store i64 %X, i64* %B 61 br label %L2 62 63L2: 64 %Z = load i64, i64* %B 65 ret i64 %Z 66} 67 68define void @test3(i8* %dst, i8* align 8 %src) { 69; CHECK-LABEL: @test3( 70 71entry: 72 %a = alloca [300 x i8] 73; CHECK-NOT: alloca 74; CHECK: %[[test3_a1:.*]] = alloca [42 x i8] 75; CHECK-NEXT: %[[test3_a2:.*]] = alloca [99 x i8] 76; CHECK-NEXT: %[[test3_a3:.*]] = alloca [16 x i8] 77; CHECK-NEXT: %[[test3_a4:.*]] = alloca [42 x i8] 78; CHECK-NEXT: %[[test3_a5:.*]] = alloca [7 x i8] 79; CHECK-NEXT: %[[test3_a6:.*]] = alloca [7 x i8] 80; CHECK-NEXT: %[[test3_a7:.*]] = alloca [85 x i8] 81 82 %b = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 0 83 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b, i8* align 8 %src, i32 300, i1 false), !tbaa !0 84; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a1]], i64 0, i64 0 85; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %src, i32 42, {{.*}}), !tbaa [[TAG_0:!.*]] 86; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 42 87; CHECK-NEXT: %[[test3_r1:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0]] 88; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 43 89; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [99 x i8], [99 x i8]* %[[test3_a2]], i64 0, i64 0 90; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 99, {{.*}}), !tbaa [[TAG_0:!.*]] 91; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 142 92; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 93; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 2 %[[gep_src]], i32 16, {{.*}}), !tbaa [[TAG_0:!.*]] 94; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 158 95; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 0 96; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 2 %[[gep_src]], i32 42, {{.*}}), !tbaa [[TAG_0:!.*]] 97; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 200 98; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 99; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0:!.*]] 100; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 207 101; CHECK-NEXT: %[[test3_r2:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0]] 102; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 208 103; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 104; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0:!.*]] 105; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 215 106; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 107; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 85, {{.*}}), !tbaa [[TAG_0:!.*]] 108 109 ; Clobber a single element of the array, this should be promotable, and be deleted. 110 %c = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 42 111 store i8 0, i8* %c 112 113 ; Make a sequence of overlapping stores to the array. These overlap both in 114 ; forward strides and in shrinking accesses. 115 %overlap.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 142 116 %overlap.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 143 117 %overlap.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 144 118 %overlap.4.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 145 119 %overlap.5.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 146 120 %overlap.6.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 147 121 %overlap.7.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 148 122 %overlap.8.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 149 123 %overlap.9.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 150 124 %overlap.1.i16 = bitcast i8* %overlap.1.i8 to i16* 125 %overlap.1.i32 = bitcast i8* %overlap.1.i8 to i32* 126 %overlap.1.i64 = bitcast i8* %overlap.1.i8 to i64* 127 %overlap.2.i64 = bitcast i8* %overlap.2.i8 to i64* 128 %overlap.3.i64 = bitcast i8* %overlap.3.i8 to i64* 129 %overlap.4.i64 = bitcast i8* %overlap.4.i8 to i64* 130 %overlap.5.i64 = bitcast i8* %overlap.5.i8 to i64* 131 %overlap.6.i64 = bitcast i8* %overlap.6.i8 to i64* 132 %overlap.7.i64 = bitcast i8* %overlap.7.i8 to i64* 133 %overlap.8.i64 = bitcast i8* %overlap.8.i8 to i64* 134 %overlap.9.i64 = bitcast i8* %overlap.9.i8 to i64* 135 store i8 1, i8* %overlap.1.i8, !tbaa !3 136; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 137; CHECK-NEXT: store i8 1, i8* %[[gep]], !tbaa [[TAG_3:!.*]] 138 store i16 1, i16* %overlap.1.i16, !tbaa !5 139; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i16* 140; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_5:!.*]] 141 store i32 1, i32* %overlap.1.i32, !tbaa !7 142; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i32* 143; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_7:!.*]] 144 store i64 1, i64* %overlap.1.i64, !tbaa !9 145; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i64* 146; CHECK-NEXT: store i64 1, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_9:!.*]] 147 store i64 2, i64* %overlap.2.i64, !tbaa !11 148; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 1 149; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 150; CHECK-NEXT: store i64 2, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_11:!.*]] 151 store i64 3, i64* %overlap.3.i64, !tbaa !13 152; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 2 153; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 154; CHECK-NEXT: store i64 3, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_13:!.*]] 155 store i64 4, i64* %overlap.4.i64, !tbaa !15 156; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 3 157; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 158; CHECK-NEXT: store i64 4, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_15:!.*]] 159 store i64 5, i64* %overlap.5.i64, !tbaa !17 160; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 4 161; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 162; CHECK-NEXT: store i64 5, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_17:!.*]] 163 store i64 6, i64* %overlap.6.i64, !tbaa !19 164; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 5 165; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 166; CHECK-NEXT: store i64 6, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_19:!.*]] 167 store i64 7, i64* %overlap.7.i64, !tbaa !21 168; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 6 169; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 170; CHECK-NEXT: store i64 7, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_21:!.*]] 171 store i64 8, i64* %overlap.8.i64, !tbaa !23 172; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 7 173; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 174; CHECK-NEXT: store i64 8, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_23:!.*]] 175 store i64 9, i64* %overlap.9.i64, !tbaa !25 176; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 8 177; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 178; CHECK-NEXT: store i64 9, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_25:!.*]] 179 180 ; Make two sequences of overlapping stores with more gaps and irregularities. 181 %overlap2.1.0.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 200 182 %overlap2.1.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 201 183 %overlap2.1.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 202 184 %overlap2.1.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 203 185 186 %overlap2.2.0.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 208 187 %overlap2.2.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 209 188 %overlap2.2.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 210 189 %overlap2.2.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 211 190 191 %overlap2.1.0.i16 = bitcast i8* %overlap2.1.0.i8 to i16* 192 %overlap2.1.0.i32 = bitcast i8* %overlap2.1.0.i8 to i32* 193 %overlap2.1.1.i32 = bitcast i8* %overlap2.1.1.i8 to i32* 194 %overlap2.1.2.i32 = bitcast i8* %overlap2.1.2.i8 to i32* 195 %overlap2.1.3.i32 = bitcast i8* %overlap2.1.3.i8 to i32* 196 store i8 1, i8* %overlap2.1.0.i8, !tbaa !27 197; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 198; CHECK-NEXT: store i8 1, i8* %[[gep]], !tbaa [[TAG_27:!.*]] 199 store i16 1, i16* %overlap2.1.0.i16, !tbaa !29 200; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a5]] to i16* 201; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_29:!.*]] 202 store i32 1, i32* %overlap2.1.0.i32, !tbaa !31 203; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a5]] to i32* 204; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_31:!.*]] 205 store i32 2, i32* %overlap2.1.1.i32, !tbaa !33 206; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 1 207; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 208; CHECK-NEXT: store i32 2, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_33:!.*]] 209 store i32 3, i32* %overlap2.1.2.i32, !tbaa !35 210; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 2 211; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 212; CHECK-NEXT: store i32 3, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_35:!.*]] 213 store i32 4, i32* %overlap2.1.3.i32, !tbaa !37 214; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 3 215; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 216; CHECK-NEXT: store i32 4, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_37:!.*]] 217 218 %overlap2.2.0.i32 = bitcast i8* %overlap2.2.0.i8 to i32* 219 %overlap2.2.1.i16 = bitcast i8* %overlap2.2.1.i8 to i16* 220 %overlap2.2.1.i32 = bitcast i8* %overlap2.2.1.i8 to i32* 221 %overlap2.2.2.i32 = bitcast i8* %overlap2.2.2.i8 to i32* 222 %overlap2.2.3.i32 = bitcast i8* %overlap2.2.3.i8 to i32* 223 store i32 1, i32* %overlap2.2.0.i32, !tbaa !39 224; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a6]] to i32* 225; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_39:!.*]] 226 store i8 1, i8* %overlap2.2.1.i8, !tbaa !41 227; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 228; CHECK-NEXT: store i8 1, i8* %[[gep]], !tbaa [[TAG_41:!.*]] 229 store i16 1, i16* %overlap2.2.1.i16, !tbaa !43 230; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 231; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 232; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_43:!.*]] 233 store i32 1, i32* %overlap2.2.1.i32, !tbaa !45 234; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 235; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 236; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_45:!.*]] 237 store i32 3, i32* %overlap2.2.2.i32, !tbaa !47 238; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 2 239; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 240; CHECK-NEXT: store i32 3, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_47:!.*]] 241 store i32 4, i32* %overlap2.2.3.i32, !tbaa !49 242; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 3 243; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 244; CHECK-NEXT: store i32 4, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_49:!.*]] 245 246 %overlap2.prefix = getelementptr i8, i8* %overlap2.1.1.i8, i64 -4 247 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.prefix, i8* %src, i32 8, i1 false), !tbaa !51 248; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 39 249; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %src, i32 3, {{.*}}), !tbaa [[TAG_51:!.*]] 250; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 3 251; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 252; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 5, {{.*}}), !tbaa [[TAG_51]] 253 254 ; Bridge between the overlapping areas 255 call void @llvm.memset.p0i8.i32(i8* %overlap2.1.2.i8, i8 42, i32 8, i1 false), !tbaa !53 256; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 2 257; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[gep]], i8 42, i32 5, {{.*}}), !tbaa [[TAG_53:!.*]] 258; ...promoted i8 store... 259; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 260; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[gep]], i8 42, i32 2, {{.*}}), !tbaa [[TAG_53]] 261 262 ; Entirely within the second overlap. 263 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.2.1.i8, i8* %src, i32 5, i1 false), !tbaa !55 264; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 265; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 5, {{.*}}), !tbaa [[TAG_55:!.*]] 266 267 ; Trailing past the second overlap. 268 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.2.2.i8, i8* %src, i32 8, i1 false), !tbaa !57 269; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 2 270; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 5, {{.*}}), !tbaa [[TAG_57:!.*]] 271; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 5 272; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 273; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 3, {{.*}}), !tbaa [[TAG_57]] 274 275 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %b, i32 300, i1 false), !tbaa !59 276; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a1]], i64 0, i64 0 277; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dst, i8* align 1 %[[gep]], i32 42, {{.*}}), !tbaa [[TAG_59:!.*]] 278; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 42 279; CHECK-NEXT: store i8 0, i8* %[[gep]], {{.*}}, !tbaa [[TAG_59]] 280; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 43 281; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [99 x i8], [99 x i8]* %[[test3_a2]], i64 0, i64 0 282; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 99, {{.*}}), !tbaa [[TAG_59]] 283; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 142 284; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 285; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 16, {{.*}}), !tbaa [[TAG_59]] 286; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 158 287; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 0 288; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 42, {{.*}}), !tbaa [[TAG_59]] 289; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 200 290; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 291; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_59]] 292; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 207 293; CHECK-NEXT: store i8 42, i8* %[[gep]], {{.*}}, !tbaa [[TAG_59]] 294; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 208 295; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 296; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_59]] 297; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 215 298; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 299; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 85, {{.*}}), !tbaa [[TAG_59]] 300 301 ret void 302} 303 304define void @test4(i8* %dst, i8* %src) { 305; CHECK-LABEL: @test4( 306 307entry: 308 %a = alloca [100 x i8] 309; CHECK-NOT: alloca 310; CHECK: %[[test4_a1:.*]] = alloca [20 x i8] 311; CHECK-NEXT: %[[test4_a2:.*]] = alloca [7 x i8] 312; CHECK-NEXT: %[[test4_a3:.*]] = alloca [10 x i8] 313; CHECK-NEXT: %[[test4_a4:.*]] = alloca [7 x i8] 314; CHECK-NEXT: %[[test4_a5:.*]] = alloca [7 x i8] 315; CHECK-NEXT: %[[test4_a6:.*]] = alloca [40 x i8] 316 317 %b = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 0 318 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b, i8* %src, i32 100, i1 false), !tbaa !0 319; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [20 x i8], [20 x i8]* %[[test4_a1]], i64 0, i64 0 320; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 20, {{.*}}), !tbaa [[TAG_0]] 321; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 20 322; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 323; CHECK-NEXT: %[[test4_r1:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0]] 324; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 22 325; CHECK-NEXT: %[[test4_r2:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0]] 326; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 23 327; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 328; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0]] 329; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 30 330; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [10 x i8], [10 x i8]* %[[test4_a3]], i64 0, i64 0 331; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 10, {{.*}}), !tbaa [[TAG_0]] 332; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 40 333; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 334; CHECK-NEXT: %[[test4_r3:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0]] 335; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 42 336; CHECK-NEXT: %[[test4_r4:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0]] 337; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 43 338; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 339; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0]] 340; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 50 341; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 342; CHECK-NEXT: %[[test4_r5:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0]] 343; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 52 344; CHECK-NEXT: %[[test4_r6:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0]] 345; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 53 346; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 347; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0]] 348; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 60 349; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [40 x i8], [40 x i8]* %[[test4_a6]], i64 0, i64 0 350; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 40, {{.*}}), !tbaa [[TAG_0]] 351 352 %a.src.1 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 20 353 %a.dst.1 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 40 354 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.dst.1, i8* %a.src.1, i32 10, i1 false), !tbaa !3 355; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 356; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 357; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_3]] 358 359 ; Clobber a single element of the array, this should be promotable, and be deleted. 360 %c = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 42 361 store i8 0, i8* %c 362 363 %a.src.2 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 50 364 call void @llvm.memmove.p0i8.p0i8.i32(i8* %a.dst.1, i8* %a.src.2, i32 10, i1 false), !tbaa !5 365; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 366; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 367; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_5]] 368 369 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %b, i32 100, i1 false), !tbaa !7 370; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [20 x i8], [20 x i8]* %[[test4_a1]], i64 0, i64 0 371; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dst, i8* align 1 %[[gep]], i32 20, {{.*}}), !tbaa [[TAG_7]] 372; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 20 373; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 374; CHECK-NEXT: store i16 %[[test4_r1]], i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_7]] 375; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 22 376; CHECK-NEXT: store i8 %[[test4_r2]], i8* %[[gep]], {{.*}}, !tbaa [[TAG_7]] 377; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 23 378; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 379; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_7]] 380; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 30 381; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [10 x i8], [10 x i8]* %[[test4_a3]], i64 0, i64 0 382; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 10, {{.*}}), !tbaa [[TAG_7]] 383; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 40 384; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 385; CHECK-NEXT: store i16 %[[test4_r5]], i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_7]] 386; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 42 387; CHECK-NEXT: store i8 %[[test4_r6]], i8* %[[gep]], {{.*}}, !tbaa [[TAG_7]] 388; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 43 389; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 390; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_7]] 391; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 50 392; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 393; CHECK-NEXT: store i16 %[[test4_r5]], i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_7]] 394; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 52 395; CHECK-NEXT: store i8 %[[test4_r6]], i8* %[[gep]], {{.*}}, !tbaa [[TAG_7]] 396; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 53 397; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 398; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_7]] 399; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 60 400; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [40 x i8], [40 x i8]* %[[test4_a6]], i64 0, i64 0 401; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 40, {{.*}}), !tbaa [[TAG_7]] 402 403 ret void 404} 405 406declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 407declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i1) nounwind 408declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 409declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind 410 411define i16 @test5() { 412; CHECK-LABEL: @test5( 413; CHECK-NOT: alloca float 414; CHECK: %[[cast:.*]] = bitcast float 0.0{{.*}} to i32 415; CHECK-NEXT: %[[shr:.*]] = lshr i32 %[[cast]], 16 416; CHECK-NEXT: %[[trunc:.*]] = trunc i32 %[[shr]] to i16 417; CHECK-NEXT: ret i16 %[[trunc]] 418 419entry: 420 %a = alloca [4 x i8] 421 %fptr = bitcast [4 x i8]* %a to float* 422 store float 0.0, float* %fptr 423 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 2 424 %iptr = bitcast i8* %ptr to i16* 425 %val = load i16, i16* %iptr 426 ret i16 %val 427} 428 429define i32 @test6() { 430; CHECK-LABEL: @test6( 431; CHECK: alloca i32 432; CHECK-NEXT: store volatile i32 433; CHECK-NEXT: load i32, i32* 434; CHECK-NEXT: ret i32 435 436entry: 437 %a = alloca [4 x i8] 438 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 0 439 call void @llvm.memset.p0i8.i32(i8* %ptr, i8 42, i32 4, i1 true) 440 %iptr = bitcast i8* %ptr to i32* 441 %val = load i32, i32* %iptr 442 ret i32 %val 443} 444 445define void @test7(i8* %src, i8* %dst) { 446; CHECK-LABEL: @test7( 447; CHECK: alloca i32 448; CHECK-NEXT: bitcast i8* %src to i32* 449; CHECK-NEXT: load volatile i32, {{.*}}, !tbaa [[TAG_0]] 450; CHECK-NEXT: store volatile i32 {{.*}}, !tbaa [[TAG_0]] 451; CHECK-NEXT: bitcast i8* %dst to i32* 452; CHECK-NEXT: load volatile i32, {{.*}}, !tbaa [[TAG_3]] 453; CHECK-NEXT: store volatile i32 {{.*}}, !tbaa [[TAG_3]] 454; CHECK-NEXT: ret 455 456entry: 457 %a = alloca [4 x i8] 458 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 0 459 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 true), !tbaa !0 460 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 true), !tbaa !3 461 ret void 462} 463 464 465%S1 = type { i32, i32, [16 x i8] } 466%S2 = type { %S1*, %S2* } 467 468define %S2 @test8(%S2* %s2) { 469; CHECK-LABEL: @test8( 470entry: 471 %new = alloca %S2 472; CHECK-NOT: alloca 473 474 %s2.next.ptr = getelementptr %S2, %S2* %s2, i64 0, i32 1 475 %s2.next = load %S2*, %S2** %s2.next.ptr, !tbaa !0 476; CHECK: %[[gep:.*]] = getelementptr %S2, %S2* %s2, i64 0, i32 1 477; CHECK-NEXT: %[[next:.*]] = load %S2*, %S2** %[[gep]], !tbaa [[TAG_0]] 478 479 %s2.next.s1.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 0 480 %s2.next.s1 = load %S1*, %S1** %s2.next.s1.ptr, !tbaa !3 481 %new.s1.ptr = getelementptr %S2, %S2* %new, i64 0, i32 0 482 store %S1* %s2.next.s1, %S1** %new.s1.ptr, !tbaa !5 483 %s2.next.next.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 1 484 %s2.next.next = load %S2*, %S2** %s2.next.next.ptr, !tbaa !7 485 %new.next.ptr = getelementptr %S2, %S2* %new, i64 0, i32 1 486 store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9 487; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 0 488; CHECK-NEXT: %[[next_s1:.*]] = load %S1*, %S1** %[[gep]], !tbaa [[TAG_3]] 489; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 1 490; CHECK-NEXT: %[[next_next:.*]] = load %S2*, %S2** %[[gep]], !tbaa [[TAG_7]] 491 492 %new.s1 = load %S1*, %S1** %new.s1.ptr 493 %result1 = insertvalue %S2 undef, %S1* %new.s1, 0 494; CHECK-NEXT: %[[result1:.*]] = insertvalue %S2 undef, %S1* %[[next_s1]], 0 495 %new.next = load %S2*, %S2** %new.next.ptr 496 %result2 = insertvalue %S2 %result1, %S2* %new.next, 1 497; CHECK-NEXT: %[[result2:.*]] = insertvalue %S2 %[[result1]], %S2* %[[next_next]], 1 498 ret %S2 %result2 499; CHECK-NEXT: ret %S2 %[[result2]] 500} 501 502define i64 @test9() { 503; Ensure we can handle loads off the end of an alloca even when wrapped in 504; weird bit casts and types. This is valid IR due to the alignment and masking 505; off the bits past the end of the alloca. 506; 507; CHECK-LABEL: @test9( 508; CHECK-NOT: alloca 509; CHECK: %[[b2:.*]] = zext i8 26 to i64 510; CHECK-NEXT: %[[s2:.*]] = shl i64 %[[b2]], 16 511; CHECK-NEXT: %[[m2:.*]] = and i64 undef, -16711681 512; CHECK-NEXT: %[[i2:.*]] = or i64 %[[m2]], %[[s2]] 513; CHECK-NEXT: %[[b1:.*]] = zext i8 0 to i64 514; CHECK-NEXT: %[[s1:.*]] = shl i64 %[[b1]], 8 515; CHECK-NEXT: %[[m1:.*]] = and i64 %[[i2]], -65281 516; CHECK-NEXT: %[[i1:.*]] = or i64 %[[m1]], %[[s1]] 517; CHECK-NEXT: %[[b0:.*]] = zext i8 0 to i64 518; CHECK-NEXT: %[[m0:.*]] = and i64 %[[i1]], -256 519; CHECK-NEXT: %[[i0:.*]] = or i64 %[[m0]], %[[b0]] 520; CHECK-NEXT: %[[result:.*]] = and i64 %[[i0]], 16777215 521; CHECK-NEXT: ret i64 %[[result]] 522 523entry: 524 %a = alloca { [3 x i8] }, align 8 525 %gep1 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 0 526 store i8 0, i8* %gep1, align 1 527 %gep2 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 1 528 store i8 0, i8* %gep2, align 1 529 %gep3 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 2 530 store i8 26, i8* %gep3, align 1 531 %cast = bitcast { [3 x i8] }* %a to { i64 }* 532 %elt = getelementptr inbounds { i64 }, { i64 }* %cast, i32 0, i32 0 533 %load = load i64, i64* %elt 534 %result = and i64 %load, 16777215 535 ret i64 %result 536} 537 538define %S2* @test10() { 539; CHECK-LABEL: @test10( 540; CHECK-NOT: alloca %S2* 541; CHECK: ret %S2* null 542 543entry: 544 %a = alloca [8 x i8] 545 %ptr = getelementptr [8 x i8], [8 x i8]* %a, i32 0, i32 0 546 call void @llvm.memset.p0i8.i32(i8* %ptr, i8 0, i32 8, i1 false) 547 %s2ptrptr = bitcast i8* %ptr to %S2** 548 %s2ptr = load %S2*, %S2** %s2ptrptr 549 ret %S2* %s2ptr 550} 551 552define i32 @test11() { 553; CHECK-LABEL: @test11( 554; CHECK-NOT: alloca 555; CHECK: ret i32 0 556 557entry: 558 %X = alloca i32 559 br i1 undef, label %good, label %bad 560 561good: 562 %Y = getelementptr i32, i32* %X, i64 0 563 store i32 0, i32* %Y 564 %Z = load i32, i32* %Y 565 ret i32 %Z 566 567bad: 568 %Y2 = getelementptr i32, i32* %X, i64 1 569 store i32 0, i32* %Y2 570 %Z2 = load i32, i32* %Y2 571 ret i32 %Z2 572} 573 574define i8 @test12() { 575; We fully promote these to the i24 load or store size, resulting in just masks 576; and other operations that instcombine will fold, but no alloca. 577; 578; CHECK-LABEL: @test12( 579 580entry: 581 %a = alloca [3 x i8] 582 %b = alloca [3 x i8] 583; CHECK-NOT: alloca 584 585 %a0ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 0 586 store i8 0, i8* %a0ptr 587 %a1ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 1 588 store i8 0, i8* %a1ptr 589 %a2ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 2 590 store i8 0, i8* %a2ptr 591 %aiptr = bitcast [3 x i8]* %a to i24* 592 %ai = load i24, i24* %aiptr 593; CHECK-NOT: store 594; CHECK-NOT: load 595; CHECK: %[[ext2:.*]] = zext i8 0 to i24 596; CHECK-NEXT: %[[shift2:.*]] = shl i24 %[[ext2]], 16 597; CHECK-NEXT: %[[mask2:.*]] = and i24 undef, 65535 598; CHECK-NEXT: %[[insert2:.*]] = or i24 %[[mask2]], %[[shift2]] 599; CHECK-NEXT: %[[ext1:.*]] = zext i8 0 to i24 600; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8 601; CHECK-NEXT: %[[mask1:.*]] = and i24 %[[insert2]], -65281 602; CHECK-NEXT: %[[insert1:.*]] = or i24 %[[mask1]], %[[shift1]] 603; CHECK-NEXT: %[[ext0:.*]] = zext i8 0 to i24 604; CHECK-NEXT: %[[mask0:.*]] = and i24 %[[insert1]], -256 605; CHECK-NEXT: %[[insert0:.*]] = or i24 %[[mask0]], %[[ext0]] 606 607 %biptr = bitcast [3 x i8]* %b to i24* 608 store i24 %ai, i24* %biptr 609 %b0ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 0 610 %b0 = load i8, i8* %b0ptr 611 %b1ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 1 612 %b1 = load i8, i8* %b1ptr 613 %b2ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 2 614 %b2 = load i8, i8* %b2ptr 615; CHECK-NOT: store 616; CHECK-NOT: load 617; CHECK: %[[trunc0:.*]] = trunc i24 %[[insert0]] to i8 618; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[insert0]], 8 619; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8 620; CHECK-NEXT: %[[shift2:.*]] = lshr i24 %[[insert0]], 16 621; CHECK-NEXT: %[[trunc2:.*]] = trunc i24 %[[shift2]] to i8 622 623 %bsum0 = add i8 %b0, %b1 624 %bsum1 = add i8 %bsum0, %b2 625 ret i8 %bsum1 626; CHECK: %[[sum0:.*]] = add i8 %[[trunc0]], %[[trunc1]] 627; CHECK-NEXT: %[[sum1:.*]] = add i8 %[[sum0]], %[[trunc2]] 628; CHECK-NEXT: ret i8 %[[sum1]] 629} 630 631define i32 @test13() { 632; Ensure we don't crash and handle undefined loads that straddle the end of the 633; allocation. 634; CHECK-LABEL: @test13( 635; CHECK: %[[value:.*]] = zext i8 0 to i16 636; CHECK-NEXT: %[[ret:.*]] = zext i16 %[[value]] to i32 637; CHECK-NEXT: ret i32 %[[ret]] 638 639entry: 640 %a = alloca [3 x i8], align 2 641 %b0ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 0 642 store i8 0, i8* %b0ptr 643 %b1ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 1 644 store i8 0, i8* %b1ptr 645 %b2ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 2 646 store i8 0, i8* %b2ptr 647 %iptrcast = bitcast [3 x i8]* %a to i16* 648 %iptrgep = getelementptr i16, i16* %iptrcast, i64 1 649 %i = load i16, i16* %iptrgep 650 %ret = zext i16 %i to i32 651 ret i32 %ret 652} 653 654%test14.struct = type { [3 x i32] } 655 656define void @test14(...) nounwind uwtable { 657; This is a strange case where we split allocas into promotable partitions, but 658; also gain enough data to prove they must be dead allocas due to GEPs that walk 659; across two adjacent allocas. Test that we don't try to promote or otherwise 660; do bad things to these dead allocas, they should just be removed. 661; CHECK-LABEL: @test14( 662; CHECK-NEXT: entry: 663; CHECK-NEXT: ret void 664 665entry: 666 %a = alloca %test14.struct 667 %p = alloca %test14.struct* 668 %0 = bitcast %test14.struct* %a to i8* 669 %1 = getelementptr i8, i8* %0, i64 12 670 %2 = bitcast i8* %1 to %test14.struct* 671 %3 = getelementptr inbounds %test14.struct, %test14.struct* %2, i32 0, i32 0 672 %4 = getelementptr inbounds %test14.struct, %test14.struct* %a, i32 0, i32 0 673 %5 = bitcast [3 x i32]* %3 to i32* 674 %6 = bitcast [3 x i32]* %4 to i32* 675 %7 = load i32, i32* %6, align 4 676 store i32 %7, i32* %5, align 4 677 %8 = getelementptr inbounds i32, i32* %5, i32 1 678 %9 = getelementptr inbounds i32, i32* %6, i32 1 679 %10 = load i32, i32* %9, align 4 680 store i32 %10, i32* %8, align 4 681 %11 = getelementptr inbounds i32, i32* %5, i32 2 682 %12 = getelementptr inbounds i32, i32* %6, i32 2 683 %13 = load i32, i32* %12, align 4 684 store i32 %13, i32* %11, align 4 685 ret void 686} 687 688define i32 @test15(i1 %flag) nounwind uwtable { 689; Ensure that when there are dead instructions using an alloca that are not 690; loads or stores we still delete them during partitioning and rewriting. 691; Otherwise we'll go to promote them while thy still have unpromotable uses. 692; CHECK-LABEL: @test15( 693; CHECK-NEXT: entry: 694; CHECK-NEXT: br label %loop 695; CHECK: loop: 696; CHECK-NEXT: br label %loop 697 698entry: 699 %l0 = alloca i64 700 %l1 = alloca i64 701 %l2 = alloca i64 702 %l3 = alloca i64 703 br label %loop 704 705loop: 706 %dead3 = phi i8* [ %gep3, %loop ], [ null, %entry ] 707 708 store i64 1879048192, i64* %l0, align 8 709 %bc0 = bitcast i64* %l0 to i8* 710 %gep0 = getelementptr i8, i8* %bc0, i64 3 711 %dead0 = bitcast i8* %gep0 to i64* 712 713 store i64 1879048192, i64* %l1, align 8 714 %bc1 = bitcast i64* %l1 to i8* 715 %gep1 = getelementptr i8, i8* %bc1, i64 3 716 %dead1 = getelementptr i8, i8* %gep1, i64 1 717 718 store i64 1879048192, i64* %l2, align 8 719 %bc2 = bitcast i64* %l2 to i8* 720 %gep2.1 = getelementptr i8, i8* %bc2, i64 1 721 %gep2.2 = getelementptr i8, i8* %bc2, i64 3 722 ; Note that this select should get visited multiple times due to using two 723 ; different GEPs off the same alloca. We should only delete it once. 724 %dead2 = select i1 %flag, i8* %gep2.1, i8* %gep2.2 725 726 store i64 1879048192, i64* %l3, align 8 727 %bc3 = bitcast i64* %l3 to i8* 728 %gep3 = getelementptr i8, i8* %bc3, i64 3 729 730 br label %loop 731} 732 733define void @test16(i8* %src, i8* %dst) { 734; Ensure that we can promote an alloca of [3 x i8] to an i24 SSA value. 735; CHECK-LABEL: @test16( 736; CHECK-NOT: alloca 737; CHECK: %[[srccast:.*]] = bitcast i8* %src to i24* 738; CHECK-NEXT: load i24, i24* %[[srccast]], {{.*}}, !tbaa [[TAG_0]] 739; CHECK-NEXT: %[[dstcast:.*]] = bitcast i8* %dst to i24* 740; CHECK-NEXT: store i24 0, i24* %[[dstcast]], {{.*}}, !tbaa [[TAG_5]] 741; CHECK-NEXT: ret void 742 743entry: 744 %a = alloca [3 x i8] 745 %ptr = getelementptr [3 x i8], [3 x i8]* %a, i32 0, i32 0 746 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 false), !tbaa !0 747 %cast = bitcast i8* %ptr to i24* 748 store i24 0, i24* %cast, !tbaa !3 749 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 false), !tbaa !5 750 ret void 751} 752 753define void @test17(i8* %src, i8* %dst) { 754; Ensure that we can rewrite unpromotable memcpys which extend past the end of 755; the alloca. 756; CHECK-LABEL: @test17( 757; CHECK: %[[a:.*]] = alloca [3 x i8] 758; CHECK-NEXT: %[[ptr:.*]] = getelementptr [3 x i8], [3 x i8]* %[[a]], i32 0, i32 0 759; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %[[ptr]], i8* %src, {{.*}}), !tbaa [[TAG_0]] 760; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %[[ptr]], {{.*}}), !tbaa [[TAG_3]] 761; CHECK-NEXT: ret void 762 763entry: 764 %a = alloca [3 x i8] 765 %ptr = getelementptr [3 x i8], [3 x i8]* %a, i32 0, i32 0 766 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 true), !tbaa !0 767 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 true), !tbaa !3 768 ret void 769} 770 771define void @test18(i8* %src, i8* %dst, i32 %size) { 772; Preserve transfer instrinsics with a variable size, even if they overlap with 773; fixed size operations. Further, continue to split and promote allocas preceding 774; the variable sized intrinsic. 775; CHECK-LABEL: @test18( 776; CHECK: %[[a:.*]] = alloca [34 x i8] 777; CHECK: %[[srcgep1:.*]] = getelementptr inbounds i8, i8* %src, i64 4 778; CHECK-NEXT: %[[srccast1:.*]] = bitcast i8* %[[srcgep1]] to i32* 779; CHECK-NEXT: %[[srcload:.*]] = load i32, i32* %[[srccast1]], {{.*}}, !tbaa [[TAG_0]] 780; CHECK-NEXT: %[[agep1:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 781; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[agep1]], i8* %src, i32 %size, {{.*}}), !tbaa [[TAG_3]] 782; CHECK-NEXT: %[[agep2:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 783; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[agep2]], i8 42, i32 %size, {{.*}}), !tbaa [[TAG_5]] 784; CHECK-NEXT: %[[dstcast1:.*]] = bitcast i8* %dst to i32* 785; CHECK-NEXT: store i32 42, i32* %[[dstcast1]], {{.*}}, !tbaa [[TAG_9]] 786; CHECK-NEXT: %[[dstgep1:.*]] = getelementptr inbounds i8, i8* %dst, i64 4 787; CHECK-NEXT: %[[dstcast2:.*]] = bitcast i8* %[[dstgep1]] to i32* 788; CHECK-NEXT: store i32 %[[srcload]], i32* %[[dstcast2]], {{.*}}, !tbaa [[TAG_9]] 789; CHECK-NEXT: %[[agep3:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 790; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* align 1 %[[agep3]], i32 %size, {{.*}}), !tbaa [[TAG_11]] 791; CHECK-NEXT: ret void 792 793entry: 794 %a = alloca [42 x i8] 795 %ptr = getelementptr [42 x i8], [42 x i8]* %a, i32 0, i32 0 796 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 8, i1 false), !tbaa !0 797 %ptr2 = getelementptr [42 x i8], [42 x i8]* %a, i32 0, i32 8 798 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr2, i8* %src, i32 %size, i1 false), !tbaa !3 799 call void @llvm.memset.p0i8.i32(i8* %ptr2, i8 42, i32 %size, i1 false), !tbaa !5 800 %cast = bitcast i8* %ptr to i32* 801 store i32 42, i32* %cast, !tbaa !7 802 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 8, i1 false), !tbaa !9 803 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr2, i32 %size, i1 false), !tbaa !11 804 ret void 805} 806 807%opaque = type opaque 808 809define i32 @test19(%opaque* %x) { 810; This input will cause us to try to compute a natural GEP when rewriting 811; pointers in such a way that we try to GEP through the opaque type. Previously, 812; a check for an unsized type was missing and this crashed. Ensure it behaves 813; reasonably now. 814; CHECK-LABEL: @test19( 815; CHECK-NOT: alloca 816; CHECK: ret i32 undef 817 818entry: 819 %a = alloca { i64, i8* } 820 %cast1 = bitcast %opaque* %x to i8* 821 %cast2 = bitcast { i64, i8* }* %a to i8* 822 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false) 823 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 824 %val = load i64, i64* %gep 825 ret i32 undef 826} 827 828define i32 @test20() { 829; Ensure we can track negative offsets (before the beginning of the alloca) and 830; negative relative offsets from offsets starting past the end of the alloca. 831; CHECK-LABEL: @test20( 832; CHECK-NOT: alloca 833; CHECK: %[[sum1:.*]] = add i32 1, 2 834; CHECK: %[[sum2:.*]] = add i32 %[[sum1]], 3 835; CHECK: ret i32 %[[sum2]] 836 837entry: 838 %a = alloca [3 x i32] 839 %gep1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 0 840 store i32 1, i32* %gep1 841 %gep2.1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 -2 842 %gep2.2 = getelementptr i32, i32* %gep2.1, i32 3 843 store i32 2, i32* %gep2.2 844 %gep3.1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 14 845 %gep3.2 = getelementptr i32, i32* %gep3.1, i32 -12 846 store i32 3, i32* %gep3.2 847 848 %load1 = load i32, i32* %gep1 849 %load2 = load i32, i32* %gep2.2 850 %load3 = load i32, i32* %gep3.2 851 %sum1 = add i32 %load1, %load2 852 %sum2 = add i32 %sum1, %load3 853 ret i32 %sum2 854} 855 856declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind 857 858define i8 @test21() { 859; Test allocations and offsets which border on overflow of the int64_t used 860; internally. This is really awkward to really test as LLVM doesn't really 861; support such extreme constructs cleanly. 862; CHECK-LABEL: @test21( 863; CHECK-NOT: alloca 864; CHECK: or i8 -1, -1 865 866entry: 867 %a = alloca [2305843009213693951 x i8] 868 %gep0 = getelementptr [2305843009213693951 x i8], [2305843009213693951 x i8]* %a, i64 0, i64 2305843009213693949 869 store i8 255, i8* %gep0 870 %gep1 = getelementptr [2305843009213693951 x i8], [2305843009213693951 x i8]* %a, i64 0, i64 -9223372036854775807 871 %gep2 = getelementptr i8, i8* %gep1, i64 -1 872 call void @llvm.memset.p0i8.i64(i8* %gep2, i8 0, i64 18446744073709551615, i1 false) 873 %gep3 = getelementptr i8, i8* %gep1, i64 9223372036854775807 874 %gep4 = getelementptr i8, i8* %gep3, i64 9223372036854775807 875 %gep5 = getelementptr i8, i8* %gep4, i64 -6917529027641081857 876 store i8 255, i8* %gep5 877 %cast1 = bitcast i8* %gep4 to i32* 878 store i32 0, i32* %cast1 879 %load = load i8, i8* %gep0 880 %gep6 = getelementptr i8, i8* %gep0, i32 1 881 %load2 = load i8, i8* %gep6 882 %result = or i8 %load, %load2 883 ret i8 %result 884} 885 886%PR13916.struct = type { i8 } 887 888define void @PR13916.1() { 889; Ensure that we handle overlapping memcpy intrinsics correctly, especially in 890; the case where there is a directly identical value for both source and dest. 891; CHECK: @PR13916.1 892; CHECK-NOT: alloca 893; CHECK: ret void 894 895entry: 896 %a = alloca i8 897 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 1, i1 false) 898 %tmp2 = load i8, i8* %a 899 ret void 900} 901 902define void @PR13916.2() { 903; Check whether we continue to handle them correctly when they start off with 904; different pointer value chains, but during rewriting we coalesce them into the 905; same value. 906; CHECK: @PR13916.2 907; CHECK-NOT: alloca 908; CHECK: ret void 909 910entry: 911 %a = alloca %PR13916.struct, align 1 912 br i1 undef, label %if.then, label %if.end 913 914if.then: 915 %tmp0 = bitcast %PR13916.struct* %a to i8* 916 %tmp1 = bitcast %PR13916.struct* %a to i8* 917 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp0, i8* %tmp1, i32 1, i1 false) 918 br label %if.end 919 920if.end: 921 %gep = getelementptr %PR13916.struct, %PR13916.struct* %a, i32 0, i32 0 922 %tmp2 = load i8, i8* %gep 923 ret void 924} 925 926define void @PR13990() { 927; Ensure we can handle cases where processing one alloca causes the other 928; alloca to become dead and get deleted. This might crash or fail under 929; Valgrind if we regress. 930; CHECK-LABEL: @PR13990( 931; CHECK-NOT: alloca 932; CHECK: unreachable 933; CHECK: unreachable 934 935entry: 936 %tmp1 = alloca i8* 937 %tmp2 = alloca i8* 938 br i1 undef, label %bb1, label %bb2 939 940bb1: 941 store i8* undef, i8** %tmp2 942 br i1 undef, label %bb2, label %bb3 943 944bb2: 945 %tmp50 = select i1 undef, i8** %tmp2, i8** %tmp1 946 br i1 undef, label %bb3, label %bb4 947 948bb3: 949 unreachable 950 951bb4: 952 unreachable 953} 954 955define double @PR13969(double %x) { 956; Check that we detect when promotion will un-escape an alloca and iterate to 957; re-try running SROA over that alloca. Without that, the two allocas that are 958; stored into a dead alloca don't get rewritten and promoted. 959; CHECK-LABEL: @PR13969( 960 961entry: 962 %a = alloca double 963 %b = alloca double* 964 %c = alloca double 965; CHECK-NOT: alloca 966 967 store double %x, double* %a 968 store double* %c, double** %b 969 store double* %a, double** %b 970 store double %x, double* %c 971 %ret = load double, double* %a 972; CHECK-NOT: store 973; CHECK-NOT: load 974 975 ret double %ret 976; CHECK: ret double %x 977} 978 979%PR14034.struct = type { { {} }, i32, %PR14034.list } 980%PR14034.list = type { %PR14034.list*, %PR14034.list* } 981 982define void @PR14034() { 983; This test case tries to form GEPs into the empty leading struct members, and 984; subsequently crashed (under valgrind) before we fixed the PR. The important 985; thing is to handle empty structs gracefully. 986; CHECK-LABEL: @PR14034( 987 988entry: 989 %a = alloca %PR14034.struct 990 %list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2 991 %prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1 992 store %PR14034.list* undef, %PR14034.list** %prev 993 %cast0 = bitcast %PR14034.struct* undef to i8* 994 %cast1 = bitcast %PR14034.struct* %a to i8* 995 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false) 996 ret void 997} 998 999define i32 @test22(i32 %x) { 1000; Test that SROA and promotion is not confused by a grab bax mixture of pointer 1001; types involving wrapper aggregates and zero-length aggregate members. 1002; CHECK-LABEL: @test22( 1003 1004entry: 1005 %a1 = alloca { { [1 x { i32 }] } } 1006 %a2 = alloca { {}, { float }, [0 x i8] } 1007 %a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } } 1008; CHECK-NOT: alloca 1009 1010 %wrap1 = insertvalue [1 x { i32 }] undef, i32 %x, 0, 0 1011 %gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0 1012 store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1 1013 1014 %gep2 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0 1015 %ptrcast1 = bitcast { [1 x { i32 }] }* %gep2 to { [1 x { float }] }* 1016 %load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1 1017 %unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0 1018 1019 %wrap2 = insertvalue { {}, { float }, [0 x i8] } undef, { float } %unwrap1, 1 1020 store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2 1021 1022 %gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0 1023 %ptrcast2 = bitcast float* %gep3 to <4 x i8>* 1024 %load3 = load <4 x i8>, <4 x i8>* %ptrcast2 1025 %valcast1 = bitcast <4 x i8> %load3 to i32 1026 1027 %wrap3 = insertvalue [1 x [1 x i32]] undef, i32 %valcast1, 0, 0 1028 %wrap4 = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] %wrap3, 0 1029 %gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1 1030 %ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }* 1031 store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3 1032 1033 %gep5 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1, i32 1, i32 0 1034 %ptrcast4 = bitcast [1 x <4 x i8>]* %gep5 to { {}, float, {} }* 1035 %load4 = load { {}, float, {} }, { {}, float, {} }* %ptrcast4 1036 %unwrap2 = extractvalue { {}, float, {} } %load4, 1 1037 %valcast2 = bitcast float %unwrap2 to i32 1038 1039 ret i32 %valcast2 1040; CHECK: ret i32 1041} 1042 1043define void @PR14059.1(double* %d) { 1044; In PR14059 a peculiar construct was identified as something that is used 1045; pervasively in ARM's ABI-calling-convention lowering: the passing of a struct 1046; of doubles via an array of i32 in order to place the data into integer 1047; registers. This in turn was missed as an optimization by SROA due to the 1048; partial loads and stores of integers to the double alloca we were trying to 1049; form and promote. The solution is to widen the integer operations to be 1050; whole-alloca operations, and perform the appropriate bitcasting on the 1051; *values* rather than the pointers. When this works, partial reads and writes 1052; via integers can be promoted away. 1053; CHECK: @PR14059.1 1054; CHECK-NOT: alloca 1055; CHECK: ret void 1056 1057entry: 1058 %X.sroa.0.i = alloca double, align 8 1059 %0 = bitcast double* %X.sroa.0.i to i8* 1060 call void @llvm.lifetime.start.p0i8(i64 -1, i8* %0) 1061 1062 ; Store to the low 32-bits... 1063 %X.sroa.0.0.cast2.i = bitcast double* %X.sroa.0.i to i32* 1064 store i32 0, i32* %X.sroa.0.0.cast2.i, align 8 1065 1066 ; Also use a memset to the middle 32-bits for fun. 1067 %X.sroa.0.2.raw_idx2.i = getelementptr inbounds i8, i8* %0, i32 2 1068 call void @llvm.memset.p0i8.i64(i8* %X.sroa.0.2.raw_idx2.i, i8 0, i64 4, i1 false) 1069 1070 ; Or a memset of the whole thing. 1071 call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 8, i1 false) 1072 1073 ; Write to the high 32-bits with a memcpy. 1074 %X.sroa.0.4.raw_idx4.i = getelementptr inbounds i8, i8* %0, i32 4 1075 %d.raw = bitcast double* %d to i8* 1076 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %X.sroa.0.4.raw_idx4.i, i8* %d.raw, i32 4, i1 false) 1077 1078 ; Store to the high 32-bits... 1079 %X.sroa.0.4.cast5.i = bitcast i8* %X.sroa.0.4.raw_idx4.i to i32* 1080 store i32 1072693248, i32* %X.sroa.0.4.cast5.i, align 4 1081 1082 ; Do the actual math... 1083 %X.sroa.0.0.load1.i = load double, double* %X.sroa.0.i, align 8 1084 %accum.real.i = load double, double* %d, align 8 1085 %add.r.i = fadd double %accum.real.i, %X.sroa.0.0.load1.i 1086 store double %add.r.i, double* %d, align 8 1087 call void @llvm.lifetime.end.p0i8(i64 -1, i8* %0) 1088 ret void 1089} 1090 1091define i64 @PR14059.2({ float, float }* %phi) { 1092; Check that SROA can split up alloca-wide integer loads and stores where the 1093; underlying alloca has smaller components that are accessed independently. This 1094; shows up particularly with ABI lowering patterns coming out of Clang that rely 1095; on the particular register placement of a single large integer return value. 1096; CHECK: @PR14059.2 1097 1098entry: 1099 %retval = alloca { float, float }, align 4 1100 ; CHECK-NOT: alloca 1101 1102 %0 = bitcast { float, float }* %retval to i64* 1103 store i64 0, i64* %0 1104 ; CHECK-NOT: store 1105 1106 %phi.realp = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 0 1107 %phi.real = load float, float* %phi.realp 1108 %phi.imagp = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 1 1109 %phi.imag = load float, float* %phi.imagp 1110 ; CHECK: %[[realp:.*]] = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 0 1111 ; CHECK-NEXT: %[[real:.*]] = load float, float* %[[realp]] 1112 ; CHECK-NEXT: %[[imagp:.*]] = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 1 1113 ; CHECK-NEXT: %[[imag:.*]] = load float, float* %[[imagp]] 1114 1115 %real = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 0 1116 %imag = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 1 1117 store float %phi.real, float* %real 1118 store float %phi.imag, float* %imag 1119 ; CHECK-NEXT: %[[real_convert:.*]] = bitcast float %[[real]] to i32 1120 ; CHECK-NEXT: %[[imag_convert:.*]] = bitcast float %[[imag]] to i32 1121 ; CHECK-NEXT: %[[imag_ext:.*]] = zext i32 %[[imag_convert]] to i64 1122 ; CHECK-NEXT: %[[imag_shift:.*]] = shl i64 %[[imag_ext]], 32 1123 ; CHECK-NEXT: %[[imag_mask:.*]] = and i64 undef, 4294967295 1124 ; CHECK-NEXT: %[[imag_insert:.*]] = or i64 %[[imag_mask]], %[[imag_shift]] 1125 ; CHECK-NEXT: %[[real_ext:.*]] = zext i32 %[[real_convert]] to i64 1126 ; CHECK-NEXT: %[[real_mask:.*]] = and i64 %[[imag_insert]], -4294967296 1127 ; CHECK-NEXT: %[[real_insert:.*]] = or i64 %[[real_mask]], %[[real_ext]] 1128 1129 %1 = load i64, i64* %0, align 1 1130 ret i64 %1 1131 ; CHECK-NEXT: ret i64 %[[real_insert]] 1132} 1133 1134define void @PR14105({ [16 x i8] }* %ptr) { 1135; Ensure that when rewriting the GEP index '-1' for this alloca we preserve is 1136; sign as negative. We use a volatile memcpy to ensure promotion never actually 1137; occurs. 1138; CHECK-LABEL: @PR14105( 1139 1140entry: 1141 %a = alloca { [16 x i8] }, align 8 1142; CHECK: alloca [16 x i8], align 8 1143 1144 %gep = getelementptr inbounds { [16 x i8] }, { [16 x i8] }* %ptr, i64 -1 1145; CHECK-NEXT: getelementptr inbounds { [16 x i8] }, { [16 x i8] }* %ptr, i64 -1, i32 0, i64 0 1146 1147 %cast1 = bitcast { [16 x i8 ] }* %gep to i8* 1148 %cast2 = bitcast { [16 x i8 ] }* %a to i8* 1149 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %cast1, i8* align 8 %cast2, i32 16, i1 true) 1150 ret void 1151; CHECK: ret 1152} 1153 1154define void @PR14105_as1({ [16 x i8] } addrspace(1)* %ptr) { 1155; Make sure this the right address space pointer is used for type check. 1156; CHECK-LABEL: @PR14105_as1( 1157 1158entry: 1159 %a = alloca { [16 x i8] }, align 8 1160; CHECK: alloca [16 x i8], align 8 1161 1162 %gep = getelementptr inbounds { [16 x i8] }, { [16 x i8] } addrspace(1)* %ptr, i64 -1 1163; CHECK-NEXT: getelementptr inbounds { [16 x i8] }, { [16 x i8] } addrspace(1)* %ptr, i16 -1, i32 0, i16 0 1164 1165 %cast1 = bitcast { [16 x i8 ] } addrspace(1)* %gep to i8 addrspace(1)* 1166 %cast2 = bitcast { [16 x i8 ] }* %a to i8* 1167 call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 8 %cast1, i8* align 8 %cast2, i32 16, i1 true) 1168 ret void 1169; CHECK: ret 1170} 1171 1172define void @PR14465() { 1173; Ensure that we don't crash when analyzing a alloca larger than the maximum 1174; integer type width (MAX_INT_BITS) supported by llvm (1048576*32 > (1<<23)-1). 1175; CHECK-LABEL: @PR14465( 1176 1177 %stack = alloca [1048576 x i32], align 16 1178; CHECK: alloca [1048576 x i32] 1179 %cast = bitcast [1048576 x i32]* %stack to i8* 1180 call void @llvm.memset.p0i8.i64(i8* align 16 %cast, i8 -2, i64 4194304, i1 false) 1181 ret void 1182; CHECK: ret 1183} 1184 1185define void @PR14548(i1 %x) { 1186; Handle a mixture of i1 and i8 loads and stores to allocas. This particular 1187; pattern caused crashes and invalid output in the PR, and its nature will 1188; trigger a mixture in several permutations as we resolve each alloca 1189; iteratively. 1190; Note that we don't do a particularly good *job* of handling these mixtures, 1191; but the hope is that this is very rare. 1192; CHECK-LABEL: @PR14548( 1193 1194entry: 1195 %a = alloca <{ i1 }>, align 8 1196 %b = alloca <{ i1 }>, align 8 1197; CHECK: %[[a:.*]] = alloca i8, align 8 1198; CHECK-NEXT: %[[b:.*]] = alloca i8, align 8 1199 1200 %b.i1 = bitcast <{ i1 }>* %b to i1* 1201 store i1 %x, i1* %b.i1, align 8 1202 %b.i8 = bitcast <{ i1 }>* %b to i8* 1203 %foo = load i8, i8* %b.i8, align 1 1204; CHECK-NEXT: %[[b_cast:.*]] = bitcast i8* %[[b]] to i1* 1205; CHECK-NEXT: store i1 %x, i1* %[[b_cast]], align 8 1206; CHECK-NEXT: {{.*}} = load i8, i8* %[[b]], align 8 1207 1208 %a.i8 = bitcast <{ i1 }>* %a to i8* 1209 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.i8, i8* %b.i8, i32 1, i1 false) nounwind 1210 %bar = load i8, i8* %a.i8, align 1 1211 %a.i1 = getelementptr inbounds <{ i1 }>, <{ i1 }>* %a, i32 0, i32 0 1212 %baz = load i1, i1* %a.i1, align 1 1213; CHECK-NEXT: %[[copy:.*]] = load i8, i8* %[[b]], align 8 1214; CHECK-NEXT: store i8 %[[copy]], i8* %[[a]], align 8 1215; CHECK-NEXT: {{.*}} = load i8, i8* %[[a]], align 8 1216; CHECK-NEXT: %[[a_cast:.*]] = bitcast i8* %[[a]] to i1* 1217; CHECK-NEXT: {{.*}} = load i1, i1* %[[a_cast]], align 8 1218 1219 ret void 1220} 1221 1222define <3 x i8> @PR14572.1(i32 %x) { 1223; Ensure that a split integer store which is wider than the type size of the 1224; alloca (relying on the alloc size padding) doesn't trigger an assert. 1225; CHECK: @PR14572.1 1226 1227entry: 1228 %a = alloca <3 x i8>, align 4 1229; CHECK-NOT: alloca 1230 1231 %cast = bitcast <3 x i8>* %a to i32* 1232 store i32 %x, i32* %cast, align 1 1233 %y = load <3 x i8>, <3 x i8>* %a, align 4 1234 ret <3 x i8> %y 1235; CHECK: ret <3 x i8> 1236} 1237 1238define i32 @PR14572.2(<3 x i8> %x) { 1239; Ensure that a split integer load which is wider than the type size of the 1240; alloca (relying on the alloc size padding) doesn't trigger an assert. 1241; CHECK: @PR14572.2 1242 1243entry: 1244 %a = alloca <3 x i8>, align 4 1245; CHECK-NOT: alloca 1246 1247 store <3 x i8> %x, <3 x i8>* %a, align 1 1248 %cast = bitcast <3 x i8>* %a to i32* 1249 %y = load i32, i32* %cast, align 4 1250 ret i32 %y 1251; CHECK: ret i32 1252} 1253 1254define i32 @PR14601(i32 %x) { 1255; Don't try to form a promotable integer alloca when there is a variable length 1256; memory intrinsic. 1257; CHECK-LABEL: @PR14601( 1258 1259entry: 1260 %a = alloca i32 1261; CHECK: alloca 1262 1263 %a.i8 = bitcast i32* %a to i8* 1264 call void @llvm.memset.p0i8.i32(i8* %a.i8, i8 0, i32 %x, i1 false) 1265 %v = load i32, i32* %a 1266 ret i32 %v 1267} 1268 1269define void @PR15674(i8* %data, i8* %src, i32 %size) { 1270; Arrange (via control flow) to have unmerged stores of a particular width to 1271; an alloca where we incrementally store from the end of the array toward the 1272; beginning of the array. Ensure that the final integer store, despite being 1273; convertable to the integer type that we end up promoting this alloca toward, 1274; doesn't get widened to a full alloca store. 1275; CHECK-LABEL: @PR15674( 1276 1277entry: 1278 %tmp = alloca [4 x i8], align 1 1279; CHECK: alloca i32 1280 1281 switch i32 %size, label %end [ 1282 i32 4, label %bb4 1283 i32 3, label %bb3 1284 i32 2, label %bb2 1285 i32 1, label %bb1 1286 ] 1287 1288bb4: 1289 %src.gep3 = getelementptr inbounds i8, i8* %src, i32 3 1290 %src.3 = load i8, i8* %src.gep3 1291 %tmp.gep3 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 3 1292 store i8 %src.3, i8* %tmp.gep3 1293; CHECK: store i8 1294 1295 br label %bb3 1296 1297bb3: 1298 %src.gep2 = getelementptr inbounds i8, i8* %src, i32 2 1299 %src.2 = load i8, i8* %src.gep2 1300 %tmp.gep2 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 2 1301 store i8 %src.2, i8* %tmp.gep2 1302; CHECK: store i8 1303 1304 br label %bb2 1305 1306bb2: 1307 %src.gep1 = getelementptr inbounds i8, i8* %src, i32 1 1308 %src.1 = load i8, i8* %src.gep1 1309 %tmp.gep1 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 1 1310 store i8 %src.1, i8* %tmp.gep1 1311; CHECK: store i8 1312 1313 br label %bb1 1314 1315bb1: 1316 %src.gep0 = getelementptr inbounds i8, i8* %src, i32 0 1317 %src.0 = load i8, i8* %src.gep0 1318 %tmp.gep0 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 0 1319 store i8 %src.0, i8* %tmp.gep0 1320; CHECK: store i8 1321 1322 br label %end 1323 1324end: 1325 %tmp.raw = bitcast [4 x i8]* %tmp to i8* 1326 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %data, i8* %tmp.raw, i32 %size, i1 false) 1327 ret void 1328; CHECK: ret void 1329} 1330 1331define void @PR15805(i1 %a, i1 %b) { 1332; CHECK-LABEL: @PR15805( 1333; CHECK-NOT: alloca 1334; CHECK: ret void 1335 1336 %c = alloca i64, align 8 1337 %p.0.c = select i1 undef, i64* %c, i64* %c 1338 %cond.in = select i1 undef, i64* %p.0.c, i64* %c 1339 %cond = load i64, i64* %cond.in, align 8 1340 ret void 1341} 1342 1343define void @PR15805.1(i1 %a, i1 %b) { 1344; Same as the normal PR15805, but rigged to place the use before the def inside 1345; of looping unreachable code. This helps ensure that we aren't sensitive to the 1346; order in which the uses of the alloca are visited. 1347; 1348; CHECK-LABEL: @PR15805.1( 1349; CHECK-NOT: alloca 1350; CHECK: ret void 1351 1352 %c = alloca i64, align 8 1353 br label %exit 1354 1355loop: 1356 %cond.in = select i1 undef, i64* %c, i64* %p.0.c 1357 %p.0.c = select i1 undef, i64* %c, i64* %c 1358 %cond = load i64, i64* %cond.in, align 8 1359 br i1 undef, label %loop, label %exit 1360 1361exit: 1362 ret void 1363} 1364 1365define void @PR16651.1(i8* %a) { 1366; This test case caused a crash due to the volatile memcpy in combination with 1367; lowering to integer loads and stores of a width other than that of the original 1368; memcpy. 1369; 1370; CHECK-LABEL: @PR16651.1( 1371; CHECK: alloca i16 1372; CHECK: alloca i8 1373; CHECK: alloca i8 1374; CHECK: unreachable 1375 1376entry: 1377 %b = alloca i32, align 4 1378 %b.cast = bitcast i32* %b to i8* 1379 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %b.cast, i8* align 4 %a, i32 4, i1 true) 1380 %b.gep = getelementptr inbounds i8, i8* %b.cast, i32 2 1381 load i8, i8* %b.gep, align 2 1382 unreachable 1383} 1384 1385define void @PR16651.2() { 1386; This test case caused a crash due to failing to promote given a select that 1387; can't be speculated. It shouldn't be promoted, but we missed that fact when 1388; analyzing whether we could form a vector promotion because that code didn't 1389; bail on select instructions. 1390; 1391; CHECK-LABEL: @PR16651.2( 1392; CHECK: alloca <2 x float> 1393; CHECK: ret void 1394 1395entry: 1396 %tv1 = alloca { <2 x float>, <2 x float> }, align 8 1397 %0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1 1398 store <2 x float> undef, <2 x float>* %0, align 8 1399 %1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0 1400 %cond105.in.i.i = select i1 undef, float* null, float* %1 1401 %cond105.i.i = load float, float* %cond105.in.i.i, align 8 1402 ret void 1403} 1404 1405define void @test23(i32 %x) { 1406; CHECK-LABEL: @test23( 1407; CHECK-NOT: alloca 1408; CHECK: ret void 1409entry: 1410 %a = alloca i32, align 4 1411 store i32 %x, i32* %a, align 4 1412 %gep1 = getelementptr inbounds i32, i32* %a, i32 1 1413 %gep0 = getelementptr inbounds i32, i32* %a, i32 0 1414 %cast1 = bitcast i32* %gep1 to i8* 1415 %cast0 = bitcast i32* %gep0 to i8* 1416 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast1, i8* %cast0, i32 4, i1 false) 1417 ret void 1418} 1419 1420define void @PR18615() { 1421; CHECK-LABEL: @PR18615( 1422; CHECK-NOT: alloca 1423; CHECK: ret void 1424entry: 1425 %f = alloca i8 1426 %gep = getelementptr i8, i8* %f, i64 -1 1427 call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* %gep, i32 1, i1 false) 1428 ret void 1429} 1430 1431define void @test24(i8* %src, i8* %dst) { 1432; CHECK-LABEL: @test24( 1433; CHECK: alloca i64, align 16 1434; CHECK: load volatile i64, i64* %{{[^,]*}}, align 1, !tbaa [[TAG_0]] 1435; CHECK: store volatile i64 %{{[^,]*}}, i64* %{{[^,]*}}, align 16, !tbaa [[TAG_0]] 1436; CHECK: load volatile i64, i64* %{{[^,]*}}, align 16, !tbaa [[TAG_3]] 1437; CHECK: store volatile i64 %{{[^,]*}}, i64* %{{[^,]*}}, align 1, !tbaa [[TAG_3]] 1438 1439entry: 1440 %a = alloca i64, align 16 1441 %ptr = bitcast i64* %a to i8* 1442 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 8, i1 true), !tbaa !0 1443 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 8, i1 true), !tbaa !3 1444 ret void 1445} 1446 1447define float @test25() { 1448; Check that we split up stores in order to promote the smaller SSA values.. These types 1449; of patterns can arise because LLVM maps small memcpy's to integer load and 1450; stores. If we get a memcpy of an aggregate (such as C and C++ frontends would 1451; produce, but so might any language frontend), this will in many cases turn into 1452; an integer load and store. SROA needs to be extremely powerful to correctly 1453; handle these cases and form splitable and promotable SSA values. 1454; 1455; CHECK-LABEL: @test25( 1456; CHECK-NOT: alloca 1457; CHECK: %[[F1:.*]] = bitcast i32 0 to float 1458; CHECK: %[[F2:.*]] = bitcast i32 1065353216 to float 1459; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1460; CHECK: ret float %[[SUM]] 1461 1462entry: 1463 %a = alloca i64 1464 %b = alloca i64 1465 %a.cast = bitcast i64* %a to [2 x float]* 1466 %a.gep1 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 0 1467 %a.gep2 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 1 1468 %b.cast = bitcast i64* %b to [2 x float]* 1469 %b.gep1 = getelementptr [2 x float], [2 x float]* %b.cast, i32 0, i32 0 1470 %b.gep2 = getelementptr [2 x float], [2 x float]* %b.cast, i32 0, i32 1 1471 store float 0.0, float* %a.gep1 1472 store float 1.0, float* %a.gep2 1473 %v = load i64, i64* %a 1474 store i64 %v, i64* %b 1475 %f1 = load float, float* %b.gep1 1476 %f2 = load float, float* %b.gep2 1477 %ret = fadd float %f1, %f2 1478 ret float %ret 1479} 1480 1481@complex1 = external global [2 x float] 1482@complex2 = external global [2 x float] 1483 1484define void @test26() { 1485; Test a case of splitting up loads and stores against a globals. 1486; 1487; CHECK-LABEL: @test26( 1488; CHECK-NOT: alloca 1489; CHECK: %[[L1:.*]] = load i32, i32* bitcast 1490; CHECK: %[[L2:.*]] = load i32, i32* bitcast 1491; CHECK: %[[F1:.*]] = bitcast i32 %[[L1]] to float 1492; CHECK: %[[F2:.*]] = bitcast i32 %[[L2]] to float 1493; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1494; CHECK: %[[C1:.*]] = bitcast float %[[SUM]] to i32 1495; CHECK: %[[C2:.*]] = bitcast float %[[SUM]] to i32 1496; CHECK: store i32 %[[C1]], i32* bitcast 1497; CHECK: store i32 %[[C2]], i32* bitcast 1498; CHECK: ret void 1499 1500entry: 1501 %a = alloca i64 1502 %a.cast = bitcast i64* %a to [2 x float]* 1503 %a.gep1 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 0 1504 %a.gep2 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 1 1505 %v1 = load i64, i64* bitcast ([2 x float]* @complex1 to i64*) 1506 store i64 %v1, i64* %a 1507 %f1 = load float, float* %a.gep1 1508 %f2 = load float, float* %a.gep2 1509 %sum = fadd float %f1, %f2 1510 store float %sum, float* %a.gep1 1511 store float %sum, float* %a.gep2 1512 %v2 = load i64, i64* %a 1513 store i64 %v2, i64* bitcast ([2 x float]* @complex2 to i64*) 1514 ret void 1515} 1516 1517define float @test27() { 1518; Another, more complex case of splittable i64 loads and stores. This example 1519; is a particularly challenging one because the load and store both point into 1520; the alloca SROA is processing, and they overlap but at an offset. 1521; 1522; CHECK-LABEL: @test27( 1523; CHECK-NOT: alloca 1524; CHECK: %[[F1:.*]] = bitcast i32 0 to float 1525; CHECK: %[[F2:.*]] = bitcast i32 1065353216 to float 1526; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1527; CHECK: ret float %[[SUM]] 1528 1529entry: 1530 %a = alloca [12 x i8] 1531 %gep1 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 0 1532 %gep2 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 4 1533 %gep3 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 8 1534 %iptr1 = bitcast i8* %gep1 to i64* 1535 %iptr2 = bitcast i8* %gep2 to i64* 1536 %fptr1 = bitcast i8* %gep1 to float* 1537 %fptr2 = bitcast i8* %gep2 to float* 1538 %fptr3 = bitcast i8* %gep3 to float* 1539 store float 0.0, float* %fptr1 1540 store float 1.0, float* %fptr2 1541 %v = load i64, i64* %iptr1 1542 store i64 %v, i64* %iptr2 1543 %f1 = load float, float* %fptr2 1544 %f2 = load float, float* %fptr3 1545 %ret = fadd float %f1, %f2 1546 ret float %ret 1547} 1548 1549define i32 @PR22093() { 1550; Test that we don't try to pre-split a splittable store of a splittable but 1551; not pre-splittable load over the same alloca. We "handle" this case when the 1552; load is unsplittable but unrelated to this alloca by just generating extra 1553; loads without touching the original, but when the original load was out of 1554; this alloca we need to handle it specially to ensure the splits line up 1555; properly for rewriting. 1556; 1557; CHECK-LABEL: @PR22093( 1558; CHECK-NOT: alloca 1559; CHECK: alloca i16 1560; CHECK-NOT: alloca 1561; CHECK: store volatile i16 1562 1563entry: 1564 %a = alloca i32 1565 %a.cast = bitcast i32* %a to i16* 1566 store volatile i16 42, i16* %a.cast 1567 %load = load i32, i32* %a 1568 store i32 %load, i32* %a 1569 ret i32 %load 1570} 1571 1572define void @PR22093.2() { 1573; Another way that we end up being unable to split a particular set of loads 1574; and stores can even have ordering importance. Here we have a load which is 1575; pre-splittable by itself, and the first store is also compatible. But the 1576; second store of the load makes the load unsplittable because of a mismatch of 1577; splits. Because this makes the load unsplittable, we also have to go back and 1578; remove the first store from the presplit candidates as its load won't be 1579; presplit. 1580; 1581; CHECK-LABEL: @PR22093.2( 1582; CHECK-NOT: alloca 1583; CHECK: alloca i16 1584; CHECK-NEXT: alloca i8 1585; CHECK-NOT: alloca 1586; CHECK: store volatile i16 1587; CHECK: store volatile i8 1588 1589entry: 1590 %a = alloca i64 1591 %a.cast1 = bitcast i64* %a to i32* 1592 %a.cast2 = bitcast i64* %a to i16* 1593 store volatile i16 42, i16* %a.cast2 1594 %load = load i32, i32* %a.cast1 1595 store i32 %load, i32* %a.cast1 1596 %a.gep1 = getelementptr i32, i32* %a.cast1, i32 1 1597 %a.cast3 = bitcast i32* %a.gep1 to i8* 1598 store volatile i8 13, i8* %a.cast3 1599 store i32 %load, i32* %a.gep1 1600 ret void 1601} 1602 1603define void @PR23737() { 1604; CHECK-LABEL: @PR23737( 1605; CHECK: store atomic volatile {{.*}} seq_cst 1606; CHECK: load atomic volatile {{.*}} seq_cst 1607entry: 1608 %ptr = alloca i64, align 8 1609 store atomic volatile i64 0, i64* %ptr seq_cst, align 8 1610 %load = load atomic volatile i64, i64* %ptr seq_cst, align 8 1611 ret void 1612} 1613 1614define i16 @PR24463() { 1615; Ensure we can handle a very interesting case where there is an integer-based 1616; rewrite of the uses of the alloca, but where one of the integers in that is 1617; a sub-integer that requires extraction *and* extends past the end of the 1618; alloca. SROA can split the alloca to avoid shift or trunc. 1619; 1620; CHECK-LABEL: @PR24463( 1621; CHECK-NOT: alloca 1622; CHECK-NOT: trunc 1623; CHECK-NOT: lshr 1624; CHECK: %[[ZEXT:.*]] = zext i8 {{.*}} to i16 1625; CHECK: ret i16 %[[ZEXT]] 1626entry: 1627 %alloca = alloca [3 x i8] 1628 %gep1 = getelementptr inbounds [3 x i8], [3 x i8]* %alloca, i64 0, i64 1 1629 %bc1 = bitcast i8* %gep1 to i16* 1630 store i16 0, i16* %bc1 1631 %gep2 = getelementptr inbounds [3 x i8], [3 x i8]* %alloca, i64 0, i64 2 1632 %bc2 = bitcast i8* %gep2 to i16* 1633 %load = load i16, i16* %bc2 1634 ret i16 %load 1635} 1636 1637%struct.STest = type { %struct.SPos, %struct.SPos } 1638%struct.SPos = type { float, float } 1639 1640define void @PR25873(%struct.STest* %outData) { 1641; CHECK-LABEL: @PR25873( 1642; CHECK: store i32 1123418112 1643; CHECK: store i32 1139015680 1644; CHECK: %[[HIZEXT:.*]] = zext i32 1139015680 to i64 1645; CHECK: %[[HISHL:.*]] = shl i64 %[[HIZEXT]], 32 1646; CHECK: %[[HIMASK:.*]] = and i64 undef, 4294967295 1647; CHECK: %[[HIINSERT:.*]] = or i64 %[[HIMASK]], %[[HISHL]] 1648; CHECK: %[[LOZEXT:.*]] = zext i32 1123418112 to i64 1649; CHECK: %[[LOMASK:.*]] = and i64 %[[HIINSERT]], -4294967296 1650; CHECK: %[[LOINSERT:.*]] = or i64 %[[LOMASK]], %[[LOZEXT]] 1651; CHECK: store i64 %[[LOINSERT]] 1652entry: 1653 %tmpData = alloca %struct.STest, align 8 1654 %0 = bitcast %struct.STest* %tmpData to i8* 1655 call void @llvm.lifetime.start.p0i8(i64 16, i8* %0) 1656 %x = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 0, i32 0 1657 store float 1.230000e+02, float* %x, align 8 1658 %y = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 0, i32 1 1659 store float 4.560000e+02, float* %y, align 4 1660 %m_posB = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 1 1661 %1 = bitcast %struct.STest* %tmpData to i64* 1662 %2 = bitcast %struct.SPos* %m_posB to i64* 1663 %3 = load i64, i64* %1, align 8 1664 store i64 %3, i64* %2, align 8 1665 %4 = bitcast %struct.STest* %outData to i8* 1666 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %4, i8* align 4 %0, i64 16, i1 false) 1667 call void @llvm.lifetime.end.p0i8(i64 16, i8* %0) 1668 ret void 1669} 1670 1671declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind 1672 1673define void @PR27999() unnamed_addr { 1674; CHECK-LABEL: @PR27999( 1675; CHECK: entry-block: 1676; CHECK-NEXT: ret void 1677entry-block: 1678 %0 = alloca [2 x i64], align 8 1679 %1 = bitcast [2 x i64]* %0 to i8* 1680 call void @llvm.lifetime.start.p0i8(i64 16, i8* %1) 1681 %2 = getelementptr inbounds [2 x i64], [2 x i64]* %0, i32 0, i32 1 1682 %3 = bitcast i64* %2 to i8* 1683 call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) 1684 ret void 1685} 1686 1687define void @PR29139() { 1688; CHECK-LABEL: @PR29139( 1689; CHECK: bb1: 1690; CHECK-NEXT: ret void 1691bb1: 1692 %e.7.sroa.6.i = alloca i32, align 1 1693 %e.7.sroa.6.0.load81.i = load i32, i32* %e.7.sroa.6.i, align 1 1694 %0 = bitcast i32* %e.7.sroa.6.i to i8* 1695 call void @llvm.lifetime.end.p0i8(i64 2, i8* %0) 1696 ret void 1697} 1698 1699; PR35657 reports assertion failure with this code 1700define void @PR35657(i64 %v) { 1701; CHECK-LABEL: @PR35657 1702; CHECK: call void @callee16(i16 %{{.*}}) 1703; CHECK: call void @callee48(i48 %{{.*}}) 1704; CHECK: ret void 1705entry: 1706 %a48 = alloca i48 1707 %a48.cast64 = bitcast i48* %a48 to i64* 1708 store i64 %v, i64* %a48.cast64 1709 %a48.cast16 = bitcast i48* %a48 to i16* 1710 %b0_15 = load i16, i16* %a48.cast16 1711 %a48.cast8 = bitcast i48* %a48 to i8* 1712 %a48_offset2 = getelementptr inbounds i8, i8* %a48.cast8, i64 2 1713 %a48_offset2.cast48 = bitcast i8* %a48_offset2 to i48* 1714 %b16_63 = load i48, i48* %a48_offset2.cast48, align 2 1715 call void @callee16(i16 %b0_15) 1716 call void @callee48(i48 %b16_63) 1717 ret void 1718} 1719 1720declare void @callee16(i16 %a) 1721declare void @callee48(i48 %a) 1722 1723define void @test28(i64 %v) #0 { 1724; SROA should split the first i64 store to avoid additional and/or instructions 1725; when storing into i32 fields 1726 1727; CHECK-LABEL: @test28( 1728; CHECK-NOT: alloca 1729; CHECK-NOT: and 1730; CHECK-NOT: or 1731; CHECK: %[[shift:.*]] = lshr i64 %v, 32 1732; CHECK-NEXT: %{{.*}} = trunc i64 %[[shift]] to i32 1733; CHECK-NEXT: ret void 1734 1735entry: 1736 %t = alloca { i64, i32, i32 } 1737 1738 %b = getelementptr { i64, i32, i32 }, { i64, i32, i32 }* %t, i32 0, i32 1 1739 %0 = bitcast i32* %b to i64* 1740 store i64 %v, i64* %0 1741 1742 %1 = load i32, i32* %b 1743 %c = getelementptr { i64, i32, i32 }, { i64, i32, i32 }* %t, i32 0, i32 2 1744 store i32 %1, i32* %c 1745 ret void 1746} 1747 1748!0 = !{!1, !1, i64 0, i64 1} 1749!1 = !{!2, i64 1, !"type_0"} 1750!2 = !{!"root"} 1751!3 = !{!4, !4, i64 0, i64 1} 1752!4 = !{!2, i64 1, !"type_3"} 1753!5 = !{!6, !6, i64 0, i64 1} 1754!6 = !{!2, i64 1, !"type_5"} 1755!7 = !{!8, !8, i64 0, i64 1} 1756!8 = !{!2, i64 1, !"type_7"} 1757!9 = !{!10, !10, i64 0, i64 1} 1758!10 = !{!2, i64 1, !"type_9"} 1759!11 = !{!12, !12, i64 0, i64 1} 1760!12 = !{!2, i64 1, !"type_11"} 1761!13 = !{!14, !14, i64 0, i64 1} 1762!14 = !{!2, i64 1, !"type_13"} 1763!15 = !{!16, !16, i64 0, i64 1} 1764!16 = !{!2, i64 1, !"type_15"} 1765!17 = !{!18, !18, i64 0, i64 1} 1766!18 = !{!2, i64 1, !"type_17"} 1767!19 = !{!20, !20, i64 0, i64 1} 1768!20 = !{!2, i64 1, !"type_19"} 1769!21 = !{!22, !22, i64 0, i64 1} 1770!22 = !{!2, i64 1, !"type_21"} 1771!23 = !{!24, !24, i64 0, i64 1} 1772!24 = !{!2, i64 1, !"type_23"} 1773!25 = !{!26, !26, i64 0, i64 1} 1774!26 = !{!2, i64 1, !"type_25"} 1775!27 = !{!28, !28, i64 0, i64 1} 1776!28 = !{!2, i64 1, !"type_27"} 1777!29 = !{!30, !30, i64 0, i64 1} 1778!30 = !{!2, i64 1, !"type_29"} 1779!31 = !{!32, !32, i64 0, i64 1} 1780!32 = !{!2, i64 1, !"type_31"} 1781!33 = !{!34, !34, i64 0, i64 1} 1782!34 = !{!2, i64 1, !"type_33"} 1783!35 = !{!36, !36, i64 0, i64 1} 1784!36 = !{!2, i64 1, !"type_35"} 1785!37 = !{!38, !38, i64 0, i64 1} 1786!38 = !{!2, i64 1, !"type_37"} 1787!39 = !{!40, !40, i64 0, i64 1} 1788!40 = !{!2, i64 1, !"type_39"} 1789!41 = !{!42, !42, i64 0, i64 1} 1790!42 = !{!2, i64 1, !"type_41"} 1791!43 = !{!44, !44, i64 0, i64 1} 1792!44 = !{!2, i64 1, !"type_43"} 1793!45 = !{!46, !46, i64 0, i64 1} 1794!46 = !{!2, i64 1, !"type_45"} 1795!47 = !{!48, !48, i64 0, i64 1} 1796!48 = !{!2, i64 1, !"type_47"} 1797!49 = !{!50, !50, i64 0, i64 1} 1798!50 = !{!2, i64 1, !"type_49"} 1799!51 = !{!52, !52, i64 0, i64 1} 1800!52 = !{!2, i64 1, !"type_51"} 1801!53 = !{!54, !54, i64 0, i64 1} 1802!54 = !{!2, i64 1, !"type_53"} 1803!55 = !{!56, !56, i64 0, i64 1} 1804!56 = !{!2, i64 1, !"type_55"} 1805!57 = !{!58, !58, i64 0, i64 1} 1806!58 = !{!2, i64 1, !"type_57"} 1807!59 = !{!60, !60, i64 0, i64 1} 1808!60 = !{!2, i64 1, !"type_59"} 1809 1810; CHECK-DAG: [[TYPE_0:!.*]] = !{{{.*}}, !"type_0"} 1811; CHECK-DAG: [[TAG_0]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 1} 1812; CHECK-DAG: [[TYPE_3:!.*]] = !{{{.*}}, !"type_3"} 1813; CHECK-DAG: [[TAG_3]] = !{[[TYPE_3]], [[TYPE_3]], i64 0, i64 1} 1814; CHECK-DAG: [[TYPE_5:!.*]] = !{{{.*}}, !"type_5"} 1815; CHECK-DAG: [[TAG_5]] = !{[[TYPE_5]], [[TYPE_5]], i64 0, i64 1} 1816; CHECK-DAG: [[TYPE_7:!.*]] = !{{{.*}}, !"type_7"} 1817; CHECK-DAG: [[TAG_7]] = !{[[TYPE_7]], [[TYPE_7]], i64 0, i64 1} 1818; CHECK-DAG: [[TYPE_9:!.*]] = !{{{.*}}, !"type_9"} 1819; CHECK-DAG: [[TAG_9]] = !{[[TYPE_9]], [[TYPE_9]], i64 0, i64 1} 1820; CHECK-DAG: [[TYPE_11:!.*]] = !{{{.*}}, !"type_11"} 1821; CHECK-DAG: [[TAG_11]] = !{[[TYPE_11]], [[TYPE_11]], i64 0, i64 1} 1822; CHECK-DAG: [[TYPE_13:!.*]] = !{{{.*}}, !"type_13"} 1823; CHECK-DAG: [[TAG_13]] = !{[[TYPE_13]], [[TYPE_13]], i64 0, i64 1} 1824; CHECK-DAG: [[TYPE_15:!.*]] = !{{{.*}}, !"type_15"} 1825; CHECK-DAG: [[TAG_15]] = !{[[TYPE_15]], [[TYPE_15]], i64 0, i64 1} 1826; CHECK-DAG: [[TYPE_17:!.*]] = !{{{.*}}, !"type_17"} 1827; CHECK-DAG: [[TAG_17]] = !{[[TYPE_17]], [[TYPE_17]], i64 0, i64 1} 1828; CHECK-DAG: [[TYPE_19:!.*]] = !{{{.*}}, !"type_19"} 1829; CHECK-DAG: [[TAG_19]] = !{[[TYPE_19]], [[TYPE_19]], i64 0, i64 1} 1830; CHECK-DAG: [[TYPE_21:!.*]] = !{{{.*}}, !"type_21"} 1831; CHECK-DAG: [[TAG_21]] = !{[[TYPE_21]], [[TYPE_21]], i64 0, i64 1} 1832; CHECK-DAG: [[TYPE_23:!.*]] = !{{{.*}}, !"type_23"} 1833; CHECK-DAG: [[TAG_23]] = !{[[TYPE_23]], [[TYPE_23]], i64 0, i64 1} 1834; CHECK-DAG: [[TYPE_25:!.*]] = !{{{.*}}, !"type_25"} 1835; CHECK-DAG: [[TAG_25]] = !{[[TYPE_25]], [[TYPE_25]], i64 0, i64 1} 1836; CHECK-DAG: [[TYPE_27:!.*]] = !{{{.*}}, !"type_27"} 1837; CHECK-DAG: [[TAG_27]] = !{[[TYPE_27]], [[TYPE_27]], i64 0, i64 1} 1838; CHECK-DAG: [[TYPE_29:!.*]] = !{{{.*}}, !"type_29"} 1839; CHECK-DAG: [[TAG_29]] = !{[[TYPE_29]], [[TYPE_29]], i64 0, i64 1} 1840; CHECK-DAG: [[TYPE_31:!.*]] = !{{{.*}}, !"type_31"} 1841; CHECK-DAG: [[TAG_31]] = !{[[TYPE_31]], [[TYPE_31]], i64 0, i64 1} 1842; CHECK-DAG: [[TYPE_33:!.*]] = !{{{.*}}, !"type_33"} 1843; CHECK-DAG: [[TAG_33]] = !{[[TYPE_33]], [[TYPE_33]], i64 0, i64 1} 1844; CHECK-DAG: [[TYPE_35:!.*]] = !{{{.*}}, !"type_35"} 1845; CHECK-DAG: [[TAG_35]] = !{[[TYPE_35]], [[TYPE_35]], i64 0, i64 1} 1846; CHECK-DAG: [[TYPE_37:!.*]] = !{{{.*}}, !"type_37"} 1847; CHECK-DAG: [[TAG_37]] = !{[[TYPE_37]], [[TYPE_37]], i64 0, i64 1} 1848; CHECK-DAG: [[TYPE_39:!.*]] = !{{{.*}}, !"type_39"} 1849; CHECK-DAG: [[TAG_39]] = !{[[TYPE_39]], [[TYPE_39]], i64 0, i64 1} 1850; CHECK-DAG: [[TYPE_41:!.*]] = !{{{.*}}, !"type_41"} 1851; CHECK-DAG: [[TAG_41]] = !{[[TYPE_41]], [[TYPE_41]], i64 0, i64 1} 1852; CHECK-DAG: [[TYPE_43:!.*]] = !{{{.*}}, !"type_43"} 1853; CHECK-DAG: [[TAG_43]] = !{[[TYPE_43]], [[TYPE_43]], i64 0, i64 1} 1854; CHECK-DAG: [[TYPE_45:!.*]] = !{{{.*}}, !"type_45"} 1855; CHECK-DAG: [[TAG_45]] = !{[[TYPE_45]], [[TYPE_45]], i64 0, i64 1} 1856; CHECK-DAG: [[TYPE_47:!.*]] = !{{{.*}}, !"type_47"} 1857; CHECK-DAG: [[TAG_47]] = !{[[TYPE_47]], [[TYPE_47]], i64 0, i64 1} 1858; CHECK-DAG: [[TYPE_49:!.*]] = !{{{.*}}, !"type_49"} 1859; CHECK-DAG: [[TAG_49]] = !{[[TYPE_49]], [[TYPE_49]], i64 0, i64 1} 1860; CHECK-DAG: [[TYPE_51:!.*]] = !{{{.*}}, !"type_51"} 1861; CHECK-DAG: [[TAG_51]] = !{[[TYPE_51]], [[TYPE_51]], i64 0, i64 1} 1862; CHECK-DAG: [[TYPE_53:!.*]] = !{{{.*}}, !"type_53"} 1863; CHECK-DAG: [[TAG_53]] = !{[[TYPE_53]], [[TYPE_53]], i64 0, i64 1} 1864; CHECK-DAG: [[TYPE_55:!.*]] = !{{{.*}}, !"type_55"} 1865; CHECK-DAG: [[TAG_55]] = !{[[TYPE_55]], [[TYPE_55]], i64 0, i64 1} 1866; CHECK-DAG: [[TYPE_57:!.*]] = !{{{.*}}, !"type_57"} 1867; CHECK-DAG: [[TAG_57]] = !{[[TYPE_57]], [[TYPE_57]], i64 0, i64 1} 1868; CHECK-DAG: [[TYPE_59:!.*]] = !{{{.*}}, !"type_59"} 1869; CHECK-DAG: [[TAG_59]] = !{[[TYPE_59]], [[TYPE_59]], i64 0, i64 1} 1870