1; This file is extracted from fp.pnacl.ll and vector-fcmp.ll in the lit 2; tests, with the "internal" attribute removed from the functions. 3 4define i32 @fcmpFalseFloat(float %a, float %b) { 5entry: 6 %cmp = fcmp false float %a, %b 7 %cmp.ret_ext = zext i1 %cmp to i32 8 ret i32 %cmp.ret_ext 9} 10; CHECK: fcmpFalseFloat: 11; CHECK: mov {{.*}}, 0 12 13define i32 @fcmpFalseDouble(double %a, double %b) { 14entry: 15 %cmp = fcmp false double %a, %b 16 %cmp.ret_ext = zext i1 %cmp to i32 17 ret i32 %cmp.ret_ext 18} 19; CHECK: fcmpFalseDouble: 20; CHECK: mov {{.*}}, 0 21 22define i32 @fcmpOeqFloat(float %a, float %b) { 23entry: 24 %cmp = fcmp oeq float %a, %b 25 %cmp.ret_ext = zext i1 %cmp to i32 26 ret i32 %cmp.ret_ext 27} 28; CHECK: fcmpOeqFloat: 29; CHECK: ucomiss 30; CHECK: jne . 31; CHECK: jp . 32 33define i32 @fcmpOeqDouble(double %a, double %b) { 34entry: 35 %cmp = fcmp oeq double %a, %b 36 %cmp.ret_ext = zext i1 %cmp to i32 37 ret i32 %cmp.ret_ext 38} 39; CHECK: fcmpOeqDouble: 40; CHECK: ucomisd 41; CHECK: jne . 42; CHECK: jp . 43 44define i32 @fcmpOgtFloat(float %a, float %b) { 45entry: 46 %cmp = fcmp ogt float %a, %b 47 %cmp.ret_ext = zext i1 %cmp to i32 48 ret i32 %cmp.ret_ext 49} 50; CHECK: fcmpOgtFloat: 51; CHECK: ucomiss 52; CHECK: ja . 53 54define i32 @fcmpOgtDouble(double %a, double %b) { 55entry: 56 %cmp = fcmp ogt double %a, %b 57 %cmp.ret_ext = zext i1 %cmp to i32 58 ret i32 %cmp.ret_ext 59} 60; CHECK: fcmpOgtDouble: 61; CHECK: ucomisd 62; CHECK: ja . 63 64define i32 @fcmpOgeFloat(float %a, float %b) { 65entry: 66 %cmp = fcmp oge float %a, %b 67 %cmp.ret_ext = zext i1 %cmp to i32 68 ret i32 %cmp.ret_ext 69} 70; CHECK: fcmpOgeFloat: 71; CHECK: ucomiss 72; CHECK: jae . 73 74define i32 @fcmpOgeDouble(double %a, double %b) { 75entry: 76 %cmp = fcmp oge double %a, %b 77 %cmp.ret_ext = zext i1 %cmp to i32 78 ret i32 %cmp.ret_ext 79} 80; CHECK: fcmpOgeDouble: 81; CHECK: ucomisd 82; CHECK: jae . 83 84define i32 @fcmpOltFloat(float %a, float %b) { 85entry: 86 %cmp = fcmp olt float %a, %b 87 %cmp.ret_ext = zext i1 %cmp to i32 88 ret i32 %cmp.ret_ext 89} 90; CHECK: fcmpOltFloat: 91; CHECK: ucomiss 92; CHECK: ja . 93 94define i32 @fcmpOltDouble(double %a, double %b) { 95entry: 96 %cmp = fcmp olt double %a, %b 97 %cmp.ret_ext = zext i1 %cmp to i32 98 ret i32 %cmp.ret_ext 99} 100; CHECK: fcmpOltDouble: 101; CHECK: ucomisd 102; CHECK: ja . 103 104define i32 @fcmpOleFloat(float %a, float %b) { 105entry: 106 %cmp = fcmp ole float %a, %b 107 %cmp.ret_ext = zext i1 %cmp to i32 108 ret i32 %cmp.ret_ext 109} 110; CHECK: fcmpOleFloat: 111; CHECK: ucomiss 112; CHECK: jae . 113 114define i32 @fcmpOleDouble(double %a, double %b) { 115entry: 116 %cmp = fcmp ole double %a, %b 117 %cmp.ret_ext = zext i1 %cmp to i32 118 ret i32 %cmp.ret_ext 119} 120; CHECK: fcmpOleDouble: 121; CHECK: ucomisd 122; CHECK: jae . 123 124define i32 @fcmpOneFloat(float %a, float %b) { 125entry: 126 %cmp = fcmp one float %a, %b 127 %cmp.ret_ext = zext i1 %cmp to i32 128 ret i32 %cmp.ret_ext 129} 130; CHECK: fcmpOneFloat: 131; CHECK: ucomiss 132; CHECK: jne . 133 134define i32 @fcmpOneDouble(double %a, double %b) { 135entry: 136 %cmp = fcmp one double %a, %b 137 %cmp.ret_ext = zext i1 %cmp to i32 138 ret i32 %cmp.ret_ext 139} 140; CHECK: fcmpOneDouble: 141; CHECK: ucomisd 142; CHECK: jne . 143 144define i32 @fcmpOrdFloat(float %a, float %b) { 145entry: 146 %cmp = fcmp ord float %a, %b 147 %cmp.ret_ext = zext i1 %cmp to i32 148 ret i32 %cmp.ret_ext 149} 150; CHECK: fcmpOrdFloat: 151; CHECK: ucomiss 152; CHECK: jnp . 153 154define i32 @fcmpOrdDouble(double %a, double %b) { 155entry: 156 %cmp = fcmp ord double %a, %b 157 %cmp.ret_ext = zext i1 %cmp to i32 158 ret i32 %cmp.ret_ext 159} 160; CHECK: fcmpOrdDouble: 161; CHECK: ucomisd 162; CHECK: jnp . 163 164define i32 @fcmpUeqFloat(float %a, float %b) { 165entry: 166 %cmp = fcmp ueq float %a, %b 167 %cmp.ret_ext = zext i1 %cmp to i32 168 ret i32 %cmp.ret_ext 169} 170; CHECK: fcmpUeqFloat: 171; CHECK: ucomiss 172; CHECK: je . 173 174define i32 @fcmpUeqDouble(double %a, double %b) { 175entry: 176 %cmp = fcmp ueq double %a, %b 177 %cmp.ret_ext = zext i1 %cmp to i32 178 ret i32 %cmp.ret_ext 179} 180; CHECK: fcmpUeqDouble: 181; CHECK: ucomisd 182; CHECK: je . 183 184define i32 @fcmpUgtFloat(float %a, float %b) { 185entry: 186 %cmp = fcmp ugt float %a, %b 187 %cmp.ret_ext = zext i1 %cmp to i32 188 ret i32 %cmp.ret_ext 189} 190; CHECK: fcmpUgtFloat: 191; CHECK: ucomiss 192; CHECK: jb . 193 194define i32 @fcmpUgtDouble(double %a, double %b) { 195entry: 196 %cmp = fcmp ugt double %a, %b 197 %cmp.ret_ext = zext i1 %cmp to i32 198 ret i32 %cmp.ret_ext 199} 200; CHECK: fcmpUgtDouble: 201; CHECK: ucomisd 202; CHECK: jb . 203 204define i32 @fcmpUgeFloat(float %a, float %b) { 205entry: 206 %cmp = fcmp uge float %a, %b 207 %cmp.ret_ext = zext i1 %cmp to i32 208 ret i32 %cmp.ret_ext 209} 210; CHECK: fcmpUgeFloat: 211; CHECK: ucomiss 212; CHECK: jbe . 213 214define i32 @fcmpUgeDouble(double %a, double %b) { 215entry: 216 %cmp = fcmp uge double %a, %b 217 %cmp.ret_ext = zext i1 %cmp to i32 218 ret i32 %cmp.ret_ext 219} 220; CHECK: fcmpUgeDouble: 221; CHECK: ucomisd 222; CHECK: jbe . 223 224define i32 @fcmpUltFloat(float %a, float %b) { 225entry: 226 %cmp = fcmp ult float %a, %b 227 %cmp.ret_ext = zext i1 %cmp to i32 228 ret i32 %cmp.ret_ext 229} 230; CHECK: fcmpUltFloat: 231; CHECK: ucomiss 232; CHECK: jb . 233 234define i32 @fcmpUltDouble(double %a, double %b) { 235entry: 236 %cmp = fcmp ult double %a, %b 237 %cmp.ret_ext = zext i1 %cmp to i32 238 ret i32 %cmp.ret_ext 239} 240; CHECK: fcmpUltDouble: 241; CHECK: ucomisd 242; CHECK: jb . 243 244define i32 @fcmpUleFloat(float %a, float %b) { 245entry: 246 %cmp = fcmp ule float %a, %b 247 %cmp.ret_ext = zext i1 %cmp to i32 248 ret i32 %cmp.ret_ext 249} 250; CHECK: fcmpUleFloat: 251; CHECK: ucomiss 252; CHECK: jbe . 253 254define i32 @fcmpUleDouble(double %a, double %b) { 255entry: 256 %cmp = fcmp ule double %a, %b 257 %cmp.ret_ext = zext i1 %cmp to i32 258 ret i32 %cmp.ret_ext 259} 260; CHECK: fcmpUleDouble: 261; CHECK: ucomisd 262; CHECK: jbe . 263 264define i32 @fcmpUneFloat(float %a, float %b) { 265entry: 266 %cmp = fcmp une float %a, %b 267 %cmp.ret_ext = zext i1 %cmp to i32 268 ret i32 %cmp.ret_ext 269} 270; CHECK: fcmpUneFloat: 271; CHECK: ucomiss 272; CHECK: je . 273; CHECK: jnp . 274 275define i32 @fcmpUneDouble(double %a, double %b) { 276entry: 277 %cmp = fcmp une double %a, %b 278 %cmp.ret_ext = zext i1 %cmp to i32 279 ret i32 %cmp.ret_ext 280} 281; CHECK: fcmpUneDouble: 282; CHECK: ucomisd 283; CHECK: je . 284; CHECK: jnp . 285 286define i32 @fcmpUnoFloat(float %a, float %b) { 287entry: 288 %cmp = fcmp uno float %a, %b 289 %cmp.ret_ext = zext i1 %cmp to i32 290 ret i32 %cmp.ret_ext 291} 292; CHECK: fcmpUnoFloat: 293; CHECK: ucomiss 294; CHECK: jp . 295 296define i32 @fcmpUnoDouble(double %a, double %b) { 297entry: 298 %cmp = fcmp uno double %a, %b 299 %cmp.ret_ext = zext i1 %cmp to i32 300 ret i32 %cmp.ret_ext 301} 302; CHECK: fcmpUnoDouble: 303; CHECK: ucomisd 304; CHECK: jp . 305 306define i32 @fcmpTrueFloat(float %a, float %b) { 307entry: 308 %cmp = fcmp true float %a, %b 309 %cmp.ret_ext = zext i1 %cmp to i32 310 ret i32 %cmp.ret_ext 311} 312; CHECK: fcmpTrueFloat: 313; CHECK: mov {{.*}}, 1 314 315define i32 @fcmpTrueDouble(double %a, double %b) { 316entry: 317 %cmp = fcmp true double %a, %b 318 %cmp.ret_ext = zext i1 %cmp to i32 319 ret i32 %cmp.ret_ext 320} 321; CHECK: fcmpTrueDouble: 322; CHECK: mov {{.*}}, 1 323 324define i32 @fcmpSelectFalseFloat(float %a, float %b, i32 %c, i32 %d) { 325entry: 326 %cmp = fcmp false float %a, %b 327 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 328 ret i32 %cmp.ret_ext 329} 330; CHECK: fcmpSelectFalseFloat: 331; CHECK: mov {{.*}}, 0 332 333define i32 @fcmpSelectFalseDouble(double %a, double %b, i32 %c, i32 %d) { 334entry: 335 %cmp = fcmp false double %a, %b 336 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 337 ret i32 %cmp.ret_ext 338} 339; CHECK: fcmpSelectFalseDouble: 340; CHECK: mov {{.*}}, 0 341 342define i32 @fcmpSelectOeqFloat(float %a, float %b, i32 %c, i32 %d) { 343entry: 344 %cmp = fcmp oeq float %a, %b 345 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 346 ret i32 %cmp.ret_ext 347} 348; CHECK: fcmpSelectOeqFloat: 349; CHECK: ucomiss 350; CHECK: jne . 351; CHECK: jp . 352 353define i32 @fcmpSelectOeqDouble(double %a, double %b, i32 %c, i32 %d) { 354entry: 355 %cmp = fcmp oeq double %a, %b 356 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 357 ret i32 %cmp.ret_ext 358} 359; CHECK: fcmpSelectOeqDouble: 360; CHECK: ucomisd 361; CHECK: jne . 362; CHECK: jp . 363 364define i32 @fcmpSelectOgtFloat(float %a, float %b, i32 %c, i32 %d) { 365entry: 366 %cmp = fcmp ogt float %a, %b 367 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 368 ret i32 %cmp.ret_ext 369} 370; CHECK: fcmpSelectOgtFloat: 371; CHECK: ucomiss 372; CHECK: ja . 373 374define i32 @fcmpSelectOgtDouble(double %a, double %b, i32 %c, i32 %d) { 375entry: 376 %cmp = fcmp ogt double %a, %b 377 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 378 ret i32 %cmp.ret_ext 379} 380; CHECK: fcmpSelectOgtDouble: 381; CHECK: ucomisd 382; CHECK: ja . 383 384define i32 @fcmpSelectOgeFloat(float %a, float %b, i32 %c, i32 %d) { 385entry: 386 %cmp = fcmp oge float %a, %b 387 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 388 ret i32 %cmp.ret_ext 389} 390; CHECK: fcmpSelectOgeFloat: 391; CHECK: ucomiss 392; CHECK: jae . 393 394define i32 @fcmpSelectOgeDouble(double %a, double %b, i32 %c, i32 %d) { 395entry: 396 %cmp = fcmp oge double %a, %b 397 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 398 ret i32 %cmp.ret_ext 399} 400; CHECK: fcmpSelectOgeDouble: 401; CHECK: ucomisd 402; CHECK: jae . 403 404define i32 @fcmpSelectOltFloat(float %a, float %b, i32 %c, i32 %d) { 405entry: 406 %cmp = fcmp olt float %a, %b 407 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 408 ret i32 %cmp.ret_ext 409} 410; CHECK: fcmpSelectOltFloat: 411; CHECK: ucomiss 412; CHECK: ja . 413 414define i32 @fcmpSelectOltDouble(double %a, double %b, i32 %c, i32 %d) { 415entry: 416 %cmp = fcmp olt double %a, %b 417 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 418 ret i32 %cmp.ret_ext 419} 420; CHECK: fcmpSelectOltDouble: 421; CHECK: ucomisd 422; CHECK: ja . 423 424define i32 @fcmpSelectOleFloat(float %a, float %b, i32 %c, i32 %d) { 425entry: 426 %cmp = fcmp ole float %a, %b 427 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 428 ret i32 %cmp.ret_ext 429} 430; CHECK: fcmpSelectOleFloat: 431; CHECK: ucomiss 432; CHECK: jae . 433 434define i32 @fcmpSelectOleDouble(double %a, double %b, i32 %c, i32 %d) { 435entry: 436 %cmp = fcmp ole double %a, %b 437 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 438 ret i32 %cmp.ret_ext 439} 440; CHECK: fcmpSelectOleDouble: 441; CHECK: ucomisd 442; CHECK: jae . 443 444define i32 @fcmpSelectOneFloat(float %a, float %b, i32 %c, i32 %d) { 445entry: 446 %cmp = fcmp one float %a, %b 447 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 448 ret i32 %cmp.ret_ext 449} 450; CHECK: fcmpSelectOneFloat: 451; CHECK: ucomiss 452; CHECK: jne . 453 454define i32 @fcmpSelectOneDouble(double %a, double %b, i32 %c, i32 %d) { 455entry: 456 %cmp = fcmp one double %a, %b 457 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 458 ret i32 %cmp.ret_ext 459} 460; CHECK: fcmpSelectOneDouble: 461; CHECK: ucomisd 462; CHECK: jne . 463 464define i32 @fcmpSelectOrdFloat(float %a, float %b, i32 %c, i32 %d) { 465entry: 466 %cmp = fcmp ord float %a, %b 467 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 468 ret i32 %cmp.ret_ext 469} 470; CHECK: fcmpSelectOrdFloat: 471; CHECK: ucomiss 472; CHECK: jnp . 473 474define i32 @fcmpSelectOrdDouble(double %a, double %b, i32 %c, i32 %d) { 475entry: 476 %cmp = fcmp ord double %a, %b 477 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 478 ret i32 %cmp.ret_ext 479} 480; CHECK: fcmpSelectOrdDouble: 481; CHECK: ucomisd 482; CHECK: jnp . 483 484define i32 @fcmpSelectUeqFloat(float %a, float %b, i32 %c, i32 %d) { 485entry: 486 %cmp = fcmp ueq float %a, %b 487 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 488 ret i32 %cmp.ret_ext 489} 490; CHECK: fcmpSelectUeqFloat: 491; CHECK: ucomiss 492; CHECK: je . 493 494define i32 @fcmpSelectUeqDouble(double %a, double %b, i32 %c, i32 %d) { 495entry: 496 %cmp = fcmp ueq double %a, %b 497 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 498 ret i32 %cmp.ret_ext 499} 500; CHECK: fcmpSelectUeqDouble: 501; CHECK: ucomisd 502; CHECK: je . 503 504define i32 @fcmpSelectUgtFloat(float %a, float %b, i32 %c, i32 %d) { 505entry: 506 %cmp = fcmp ugt float %a, %b 507 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 508 ret i32 %cmp.ret_ext 509} 510; CHECK: fcmpSelectUgtFloat: 511; CHECK: ucomiss 512; CHECK: jb . 513 514define i32 @fcmpSelectUgtDouble(double %a, double %b, i32 %c, i32 %d) { 515entry: 516 %cmp = fcmp ugt double %a, %b 517 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 518 ret i32 %cmp.ret_ext 519} 520; CHECK: fcmpSelectUgtDouble: 521; CHECK: ucomisd 522; CHECK: jb . 523 524define i32 @fcmpSelectUgeFloat(float %a, float %b, i32 %c, i32 %d) { 525entry: 526 %cmp = fcmp uge float %a, %b 527 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 528 ret i32 %cmp.ret_ext 529} 530; CHECK: fcmpSelectUgeFloat: 531; CHECK: ucomiss 532; CHECK: jbe . 533 534define i32 @fcmpSelectUgeDouble(double %a, double %b, i32 %c, i32 %d) { 535entry: 536 %cmp = fcmp uge double %a, %b 537 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 538 ret i32 %cmp.ret_ext 539} 540; CHECK: fcmpSelectUgeDouble: 541; CHECK: ucomisd 542; CHECK: jbe . 543 544define i32 @fcmpSelectUltFloat(float %a, float %b, i32 %c, i32 %d) { 545entry: 546 %cmp = fcmp ult float %a, %b 547 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 548 ret i32 %cmp.ret_ext 549} 550; CHECK: fcmpSelectUltFloat: 551; CHECK: ucomiss 552; CHECK: jb . 553 554define i32 @fcmpSelectUltDouble(double %a, double %b, i32 %c, i32 %d) { 555entry: 556 %cmp = fcmp ult double %a, %b 557 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 558 ret i32 %cmp.ret_ext 559} 560; CHECK: fcmpSelectUltDouble: 561; CHECK: ucomisd 562; CHECK: jb . 563 564define i32 @fcmpSelectUleFloat(float %a, float %b, i32 %c, i32 %d) { 565entry: 566 %cmp = fcmp ule float %a, %b 567 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 568 ret i32 %cmp.ret_ext 569} 570; CHECK: fcmpSelectUleFloat: 571; CHECK: ucomiss 572; CHECK: jbe . 573 574define i32 @fcmpSelectUleDouble(double %a, double %b, i32 %c, i32 %d) { 575entry: 576 %cmp = fcmp ule double %a, %b 577 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 578 ret i32 %cmp.ret_ext 579} 580; CHECK: fcmpSelectUleDouble: 581; CHECK: ucomisd 582; CHECK: jbe . 583 584define i32 @fcmpSelectUneFloat(float %a, float %b, i32 %c, i32 %d) { 585entry: 586 %cmp = fcmp une float %a, %b 587 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 588 ret i32 %cmp.ret_ext 589} 590; CHECK: fcmpSelectUneFloat: 591; CHECK: ucomiss 592; CHECK: je . 593; CHECK: jnp . 594 595define i32 @fcmpSelectUneDouble(double %a, double %b, i32 %c, i32 %d) { 596entry: 597 %cmp = fcmp une double %a, %b 598 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 599 ret i32 %cmp.ret_ext 600} 601; CHECK: fcmpSelectUneDouble: 602; CHECK: ucomisd 603; CHECK: je . 604; CHECK: jnp . 605 606define i32 @fcmpSelectUnoFloat(float %a, float %b, i32 %c, i32 %d) { 607entry: 608 %cmp = fcmp uno float %a, %b 609 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 610 ret i32 %cmp.ret_ext 611} 612; CHECK: fcmpSelectUnoFloat: 613; CHECK: ucomiss 614; CHECK: jp . 615 616define i32 @fcmpSelectUnoDouble(double %a, double %b, i32 %c, i32 %d) { 617entry: 618 %cmp = fcmp uno double %a, %b 619 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 620 ret i32 %cmp.ret_ext 621} 622; CHECK: fcmpSelectUnoDouble: 623; CHECK: ucomisd 624; CHECK: jp . 625 626define i32 @fcmpSelectTrueFloat(float %a, float %b, i32 %c, i32 %d) { 627entry: 628 %cmp = fcmp true float %a, %b 629 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 630 ret i32 %cmp.ret_ext 631} 632; CHECK: fcmpSelectTrueFloat: 633; CHECK: mov {{.*}}, 1 634 635define i32 @fcmpSelectTrueDouble(double %a, double %b, i32 %c, i32 %d) { 636entry: 637 %cmp = fcmp true double %a, %b 638 %cmp.ret_ext = select i1 %cmp, i32 %c, i32 %d 639 ret i32 %cmp.ret_ext 640} 641; CHECK: fcmpSelectTrueDouble: 642; CHECK: mov {{.*}}, 1 643 644define <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) { 645entry: 646 %res.trunc = fcmp false <4 x float> %a, %b 647 %res = sext <4 x i1> %res.trunc to <4 x i32> 648 ret <4 x i32> %res 649; CHECK-LABEL: fcmpFalseVector: 650; CHECK: pxor 651} 652 653define <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) { 654entry: 655 %res.trunc = fcmp oeq <4 x float> %a, %b 656 %res = sext <4 x i1> %res.trunc to <4 x i32> 657 ret <4 x i32> %res 658; CHECK-LABEL: fcmpOeqVector: 659; CHECK: cmpeqps 660} 661 662define <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) { 663entry: 664 %res.trunc = fcmp oge <4 x float> %a, %b 665 %res = sext <4 x i1> %res.trunc to <4 x i32> 666 ret <4 x i32> %res 667; CHECK-LABEL: fcmpOgeVector: 668; CHECK: cmpleps 669} 670 671define <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) { 672entry: 673 %res.trunc = fcmp ogt <4 x float> %a, %b 674 %res = sext <4 x i1> %res.trunc to <4 x i32> 675 ret <4 x i32> %res 676; CHECK-LABEL: fcmpOgtVector: 677; CHECK: cmpltps 678} 679 680define <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) { 681entry: 682 %res.trunc = fcmp ole <4 x float> %a, %b 683 %res = sext <4 x i1> %res.trunc to <4 x i32> 684 ret <4 x i32> %res 685; CHECK-LABEL: fcmpOleVector: 686; CHECK: cmpleps 687} 688 689define <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) { 690entry: 691 %res.trunc = fcmp olt <4 x float> %a, %b 692 %res = sext <4 x i1> %res.trunc to <4 x i32> 693 ret <4 x i32> %res 694; CHECK-LABEL: fcmpOltVector: 695; CHECK: cmpltps 696} 697 698define <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) { 699entry: 700 %res.trunc = fcmp one <4 x float> %a, %b 701 %res = sext <4 x i1> %res.trunc to <4 x i32> 702 ret <4 x i32> %res 703; CHECK-LABEL: fcmpOneVector: 704; CHECK: cmpneqps 705; CHECK: cmpordps 706; CHECK: pand 707} 708 709define <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) { 710entry: 711 %res.trunc = fcmp ord <4 x float> %a, %b 712 %res = sext <4 x i1> %res.trunc to <4 x i32> 713 ret <4 x i32> %res 714; CHECK-LABEL: fcmpOrdVector: 715; CHECK: cmpordps 716} 717 718define <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) { 719entry: 720 %res.trunc = fcmp true <4 x float> %a, %b 721 %res = sext <4 x i1> %res.trunc to <4 x i32> 722 ret <4 x i32> %res 723; CHECK-LABEL: fcmpTrueVector: 724; CHECK: pcmpeqd 725} 726 727define <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) { 728entry: 729 %res.trunc = fcmp ueq <4 x float> %a, %b 730 %res = sext <4 x i1> %res.trunc to <4 x i32> 731 ret <4 x i32> %res 732; CHECK-LABEL: fcmpUeqVector: 733; CHECK: cmpeqps 734; CHECK: cmpunordps 735; CHECK: por 736} 737 738define <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) { 739entry: 740 %res.trunc = fcmp uge <4 x float> %a, %b 741 %res = sext <4 x i1> %res.trunc to <4 x i32> 742 ret <4 x i32> %res 743; CHECK-LABEL: fcmpUgeVector: 744; CHECK: cmpnltps 745} 746 747define <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) { 748entry: 749 %res.trunc = fcmp ugt <4 x float> %a, %b 750 %res = sext <4 x i1> %res.trunc to <4 x i32> 751 ret <4 x i32> %res 752; CHECK-LABEL: fcmpUgtVector: 753; CHECK: cmpnleps 754} 755 756define <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) { 757entry: 758 %res.trunc = fcmp ule <4 x float> %a, %b 759 %res = sext <4 x i1> %res.trunc to <4 x i32> 760 ret <4 x i32> %res 761; CHECK-LABEL: fcmpUleVector: 762; CHECK: cmpnltps 763} 764 765define <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) { 766entry: 767 %res.trunc = fcmp ult <4 x float> %a, %b 768 %res = sext <4 x i1> %res.trunc to <4 x i32> 769 ret <4 x i32> %res 770; CHECK-LABEL: fcmpUltVector: 771; CHECK: cmpnleps 772} 773 774define <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) { 775entry: 776 %res.trunc = fcmp une <4 x float> %a, %b 777 %res = sext <4 x i1> %res.trunc to <4 x i32> 778 ret <4 x i32> %res 779; CHECK-LABEL: fcmpUneVector: 780; CHECK: cmpneqps 781} 782 783define <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) { 784entry: 785 %res.trunc = fcmp uno <4 x float> %a, %b 786 %res = sext <4 x i1> %res.trunc to <4 x i32> 787 ret <4 x i32> %res 788; CHECK-LABEL: fcmpUnoVector: 789; CHECK: cmpunordps 790} 791