1//===- subzero/src/IceTargetLoweringARM32.def - ARM32 X-macros --*- C++ -*-===// 2// 3// The Subzero Code Generator 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines certain patterns for lowering to ARM32 target 11// instructions, in the form of x-macros. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 16#define SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 17 18// Patterns for lowering fcmp. These are expected to be used in the following 19// manner: 20// 21// Scalar: 22// mov reg, #0 23// movCC0 reg, #1 /* only if CC0 != kNone */ 24// movCC1 reg, #1 /* only if CC1 != kNone */ 25// 26// Vector: 27// vcCC0_V Cmp0, Src0, Src1 /* only if CC0_V != none */ 28// vcCC1_V Cmp1, Src1, Src0 /* only if CC1_V != none */ 29// vorr Cmp2, Cmp0, Cmp1 /* only if CC1_V != none */ 30// vmvn Reg3, Cmp? /* only if NEG_V = true */ 31// 32// If INV_V = true, then Src0 and Src1 should be swapped. 33// 34#define FCMPARM32_TABLE \ 35 /*val , CC0 , CC1 , CC0_V, CC1_V, INV_V, NEG_V */ \ 36 X(False, kNone, kNone, none , none , false, false) \ 37 X(Oeq , EQ , kNone, eq , none , false, false) \ 38 X(Ogt , GT , kNone, gt , none , false, false) \ 39 X(Oge , GE , kNone, ge , none , false, false) \ 40 X(Olt , MI , kNone, gt , none , true , false) \ 41 X(Ole , LS , kNone, ge , none , true , false) \ 42 X(One , MI , GT , gt , gt , false, false) \ 43 X(Ord , VC , kNone, ge , gt , false, false) \ 44 X(Ueq , EQ , VS , gt , gt , false, true) \ 45 X(Ugt , HI , kNone, ge , none , true , true) \ 46 X(Uge , PL , kNone, gt , none , true , true) \ 47 X(Ult , LT , kNone, ge , none , false, true) \ 48 X(Ule , LE , kNone, gt , none , false, true) \ 49 X(Une , NE , kNone, eq , none , false, true) \ 50 X(Uno , VS , kNone, ge , gt , false, true) \ 51 X(True , AL , kNone, none , none , false, false) 52//#define X(val, CC0, CC1, CC0_V, CC1_V, INV_V, NEG_V) 53 54// Patterns for lowering icmp. 55#define ICMPARM32_TABLE \ 56 /*val, is_signed, swapped64, C_32, C1_64, C2_64, C_V, INV_V, NEG_V */ \ 57 X(Eq , false , false , EQ, EQ , NE , eq , false, false) \ 58 X(Ne , false , false , NE, NE , EQ , eq , false, true) \ 59 X(Ugt, false , false , HI, HI , LS , gt , false, false) \ 60 X(Uge, false , false , CS, CS , CC , ge , false, false) \ 61 X(Ult, false , false , CC, CC , CS , gt , true , false) \ 62 X(Ule, false , false , LS, LS , HI , ge , true , false) \ 63 X(Sgt, true , true , GT, LT , GE , gt , false, false) \ 64 X(Sge, true , false , GE, GE , LT , ge , false, false) \ 65 X(Slt, true , false , LT, LT , GE , gt , true , false) \ 66 X(Sle, true , true , LE, GE , LT , ge , true , false) 67//#define X(val, is_signed, swapped64, C_32, C1_64, C2_64, C_V, INV_V, NEG_V) 68 69#endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 70