1; Show that we know how to translate rsb. Uses shl as example, because it 2; uses rsb for type i64. 3 4; Also shows an example of a register-shifted register (data) operation. 5 6; REQUIRES: allow_dump 7 8; Compile using standalone assembler. 9; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 10; RUN: | FileCheck %s --check-prefix=ASM 11 12; Show bytes in assembled standalone code. 13; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 14; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 15 16; Compile using integrated assembler. 17; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 18; RUN: | FileCheck %s --check-prefix=IASM 19 20; Show bytes in assembled integrated code. 21; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 22; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 23 24define internal i64 @shiftLeft(i64 %v, i64 %l) { 25; ASM-LABEL:shiftLeft: 26; DIS-LABEL:00000000 <shiftLeft>: 27; IASM-LABEL:shiftLeft: 28 29entry: 30; ASM-NEXT:.LshiftLeft$entry: 31; IASM-NEXT:.LshiftLeft$entry: 32 33; ASM-NEXT: sub sp, sp, #24 34; DIS-NEXT: 0: e24dd018 35; IASM-NEXT: .byte 0x18 36; IASM-NEXT: .byte 0xd0 37; IASM-NEXT: .byte 0x4d 38; IASM-NEXT: .byte 0xe2 39 40; ASM-NEXT: str r0, [sp, #20] 41; ASM-NEXT: # [sp, #20] = def.pseudo 42; DIS-NEXT: 4: e58d0014 43; IASM-NEXT: .byte 0x14 44; IASM-NEXT: .byte 0x0 45; IASM-NEXT: .byte 0x8d 46; IASM-NEXT: .byte 0xe5 47 48; ASM-NEXT: mov r0, r1 49; DIS-NEXT: 8: e1a00001 50; IASM-NEXT: .byte 0x1 51; IASM-NEXT: .byte 0x0 52; IASM-NEXT: .byte 0xa0 53; IASM-NEXT: .byte 0xe1 54 55; ASM-NEXT: str r0, [sp, #16] 56; ASM-NEXT: # [sp, #16] = def.pseudo 57; DIS-NEXT: c: e58d0010 58; IASM-NEXT: .byte 0x10 59; IASM-NEXT: .byte 0x0 60; IASM-NEXT: .byte 0x8d 61; IASM-NEXT: .byte 0xe5 62 63; ASM-NEXT: mov r0, r2 64; DIS-NEXT: 10: e1a00002 65; IASM-NEXT: .byte 0x2 66; IASM-NEXT: .byte 0x0 67; IASM-NEXT: .byte 0xa0 68; IASM-NEXT: .byte 0xe1 69 70; ASM-NEXT: str r0, [sp, #12] 71; ASM-NEXT: # [sp, #12] = def.pseudo 72; DIS-NEXT: 14: e58d000c 73; IASM-NEXT: .byte 0xc 74; IASM-NEXT: .byte 0x0 75; IASM-NEXT: .byte 0x8d 76; IASM-NEXT: .byte 0xe5 77 78; ASM-NEXT: mov r0, r3 79; DIS-NEXT: 18: e1a00003 80; IASM-NEXT: .byte 0x3 81; IASM-NEXT: .byte 0x0 82; IASM-NEXT: .byte 0xa0 83; IASM-NEXT: .byte 0xe1 84 85; ASM-NEXT: str r0, [sp, #8] 86; ASM-NEXT: # [sp, #8] = def.pseudo 87; DIS-NEXT: 1c: e58d0008 88; IASM-NEXT: .byte 0x8 89; IASM-NEXT: .byte 0x0 90; IASM-NEXT: .byte 0x8d 91; IASM-NEXT: .byte 0xe5 92 93 %result = shl i64 %v, %l 94 95; ASM-NEXT: ldr r0, [sp, #20] 96; DIS-NEXT: 20: e59d0014 97; IASM-NEXT: .byte 0x14 98; IASM-NEXT: .byte 0x0 99; IASM-NEXT: .byte 0x9d 100; IASM-NEXT: .byte 0xe5 101 102; ASM-NEXT: ldr r1, [sp, #16] 103; DIS-NEXT: 24: e59d1010 104; IASM-NEXT: .byte 0x10 105; IASM-NEXT: .byte 0x10 106; IASM-NEXT: .byte 0x9d 107; IASM-NEXT: .byte 0xe5 108 109; ASM-NEXT: ldr r2, [sp, #12] 110; DIS-NEXT: 28: e59d200c 111; IASM-NEXT: .byte 0xc 112; IASM-NEXT: .byte 0x20 113; IASM-NEXT: .byte 0x9d 114; IASM-NEXT: .byte 0xe5 115 116; ****** Here is the example of rsb ***** 117; ASM-NEXT: rsb r3, r2, #32 118; DIS-NEXT: 2c: e2623020 119; IASM-NEXT: .byte 0x20 120; IASM-NEXT: .byte 0x30 121; IASM-NEXT: .byte 0x62 122; IASM-NEXT: .byte 0xe2 123 124; ASM-NEXT: lsr r3, r0, r3 125; DIS-NEXT: 30: e1a03330 126; IASM-NEXT: .byte 0x30 127; IASM-NEXT: .byte 0x33 128; IASM-NEXT: .byte 0xa0 129; IASM-NEXT: .byte 0xe1 130 131; ***** Here is an example of a register-shifted register ***** 132; ASM-NEXT: orr r1, r3, r1, lsl r2 133; DIS-NEXT: 34: e1831211 134; IASM-NEXT: .byte 0x11 135; IASM-NEXT: .byte 0x12 136; IASM-NEXT: .byte 0x83 137; IASM-NEXT: .byte 0xe1 138 139 ret i64 %result 140} 141