1; This test checks support for vector type in MIPS. 2 3; RUN: %if --need=target_MIPS32 --need=allow_dump \ 4; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\ 5; RUN: -i %s --args -O2 \ 6; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 7; RUN: --command FileCheck --check-prefix MIPS32 %s 8 9define internal i32 @test_0(<4 x i32> %a) #0 { 10entry: 11 %vecext = extractelement <4 x i32> %a, i32 0 12 ret i32 %vecext 13} 14; MIPS32-LABEL: test_0 15; MIPS32: move v0,a0 16 17define internal i32 @test_1(<4 x i32> %a) #0 { 18entry: 19 %vecext = extractelement <4 x i32> %a, i32 1 20 ret i32 %vecext 21} 22; MIPS32-LABEL: test_1 23; MIPS32: move v0,a1 24 25define internal i32 @test_2(<4 x i32> %a) #0 { 26entry: 27 %vecext = extractelement <4 x i32> %a, i32 2 28 ret i32 %vecext 29} 30; MIPS32-LABEL: test_2 31; MIPS32: move v0,a2 32 33define internal i32 @test_3(<4 x i32> %a) #0 { 34entry: 35 %vecext = extractelement <4 x i32> %a, i32 3 36 ret i32 %vecext 37} 38; MIPS32-LABEL: test_3 39; MIPS32: move v0,a3 40 41define internal float @test_4(<4 x float> %a) #0 { 42entry: 43 %vecext = extractelement <4 x float> %a, i32 1 44 ret float %vecext 45} 46; MIPS32-LABEL: test_4 47; MIPS32: mtc1 a1,$f0 48 49define internal float @test_5(<4 x float> %a) #0 { 50entry: 51 %vecext = extractelement <4 x float> %a, i32 2 52 ret float %vecext 53} 54; MIPS32-LABEL: test_5 55; MIPS32: mtc1 a2,$f0 56 57define internal i32 @test_6(<16 x i8> %a) #0 { 58entry: 59 %vecext = extractelement <16 x i8> %a, i32 0 60 %conv = sext i8 %vecext to i32 61 ret i32 %conv 62} 63; MIPS32-LABEL: test_6 64; MIPS32: andi a0,a0,0xff 65; MIPS32: sll a0,a0,0x18 66; MIPS32: sra a0,a0,0x18 67; MIPS32: move v0,a0 68 69define internal i32 @test_7(<16 x i8> %a) #0 { 70entry: 71 %vecext = extractelement <16 x i8> %a, i32 15 72 %conv = sext i8 %vecext to i32 73 ret i32 %conv 74} 75; MIPS32-LABEL: test_7 76; MIPS32: srl a3,a3,0x18 77; MIPS32: sll a3,a3,0x18 78; MIPS32: sra a3,a3,0x18 79; MIPS32: move v0,a3 80 81define internal i32 @test_8(<8 x i16> %a) #0 { 82entry: 83 %vecext = extractelement <8 x i16> %a, i32 0 84 %conv = sext i16 %vecext to i32 85 ret i32 %conv 86} 87; MIPS32-LABEL: test_8 88; MIPS32: andi a0,a0,0xffff 89; MIPS32: sll a0,a0,0x10 90; MIPS32: sra a0,a0,0x10 91; MIPS32: move v0,a0 92 93define internal i32 @test_9(<8 x i16> %a) #0 { 94entry: 95 %vecext = extractelement <8 x i16> %a, i32 7 96 %conv = sext i16 %vecext to i32 97 ret i32 %conv 98} 99; MIPS32-LABEL: test_9 100; MIPS32: srl a3,a3,0x10 101; MIPS32: sll a3,a3,0x10 102; MIPS32: sra a3,a3,0x10 103; MIPS32: move v0,a3 104 105define internal i32 @test_10(<4 x i1> %a) #0 { 106entry: 107 %vecext = extractelement <4 x i1> %a, i32 0 108 %conv = sext i1 %vecext to i32 109 ret i32 %conv 110} 111; MIPS32-LABEL: test_10 112; MIPS32: andi a0,a0,0x1 113; MIPS32: sll a0,a0,0x1f 114; MIPS32: sra a0,a0,0x1f 115; MIPS32: move v0,a0 116 117define internal i32 @test_11(<4 x i1> %a) #0 { 118entry: 119 %vecext = extractelement <4 x i1> %a, i32 2 120 %conv = sext i1 %vecext to i32 121 ret i32 %conv 122} 123; MIPS32-LABEL: test_11 124; MIPS32: andi a2,a2,0x1 125; MIPS32: sll a2,a2,0x1f 126; MIPS32: sra a2,a2,0x1f 127; MIPS32: move v0,a2 128 129define internal i32 @test_12(<8 x i1> %a) #0 { 130entry: 131 %vecext = extractelement <8 x i1> %a, i32 0 132 %conv = sext i1 %vecext to i32 133 ret i32 %conv 134} 135; MIPS32-LABEL: test_12 136; MIPS32: andi a0,a0,0xffff 137; MIPS32: andi a0,a0,0x1 138; MIPS32: sll a0,a0,0x1f 139; MIPS32: sra a0,a0,0x1f 140; MIPS32: move v0,a0 141 142define internal i32 @test_13(<8 x i1> %a) #0 { 143entry: 144 %vecext = extractelement <8 x i1> %a, i32 7 145 %conv = sext i1 %vecext to i32 146 ret i32 %conv 147} 148; MIPS32-LABEL: test_13 149; MIPS32: srl a3,a3,0x10 150; MIPS32: andi a3,a3,0x1 151; MIPS32: sll a3,a3,0x1f 152; MIPS32: sra a3,a3,0x1f 153; MIPS32: move v0,a3 154 155define internal i32 @test_14(<16 x i1> %a) #0 { 156entry: 157 %vecext = extractelement <16 x i1> %a, i32 0 158 %conv = sext i1 %vecext to i32 159 ret i32 %conv 160} 161; MIPS32-LABEL: test_14 162; MIPS32: andi a0,a0,0xff 163; MIPS32: andi a0,a0,0x1 164; MIPS32: sll a0,a0,0x1f 165; MIPS32: sra a0,a0,0x1f 166; MIPS32: move v0,a0 167 168define internal i32 @test_15(<16 x i1> %a) #0 { 169entry: 170 %vecext = extractelement <16 x i1> %a, i32 15 171 %conv = sext i1 %vecext to i32 172 ret i32 %conv 173} 174; MIPS32-LABEL: test_15 175; MIPS32: srl a3,a3,0x18 176; MIPS32: andi a3,a3,0x1 177; MIPS32: sll a3,a3,0x1f 178; MIPS32: sra a3,a3,0x1f 179; MIPS32: move v0,a3 180 181define internal i32 @test_16(i32 %i, <4 x i32> %a) #0 { 182entry: 183 %vecext = extractelement <4 x i32> %a, i32 0 184 %add = add nsw i32 %vecext, %i 185 ret i32 %add 186} 187; MIPS32-LABEL: test_16 188; MIPS32: addu a2,a2,a0 189; MIPS32: move v0,a2 190 191define internal i32 @test_17(i32 %i, <4 x i32> %a) #0 { 192entry: 193 %vecext = extractelement <4 x i32> %a, i32 3 194 %add = add nsw i32 %vecext, %i 195 ret i32 %add 196} 197; MIPS32-LABEL: test_17 198; MIPS32: lw v0,{{.*}}(sp) 199; MIPS32: addu v0,v0,a0 200 201define internal float @test_18(float %f, <4 x float> %a) #0 { 202entry: 203 %vecext = extractelement <4 x float> %a, i32 0 204 %add = fadd float %vecext, %f 205 ret float %add 206} 207; MIPS32-LABEL: test_18 208; MIPS32: mtc1 a2,$f0 209; MIPS32: add.s $f0,$f0,$f12 210 211define internal float @test_19(float %f, <4 x float> %a) #0 { 212entry: 213 %vecext = extractelement <4 x float> %a, i32 3 214 %add = fadd float %vecext, %f 215 ret float %add 216} 217; MIPS32-LABEL: test_19 218; MIPS32: lw v0,{{.*}}(sp) 219; MIPS32: mtc1 v0,$f0 220; MIPS32: add.s $f0,$f0,$f12 221 222define internal <4 x float> @test_20(i32 %addr_i, <4 x float> %addend) { 223entry: 224 %addr = inttoptr i32 %addr_i to <4 x float>* 225 %loaded = load <4 x float>, <4 x float>* %addr, align 4 226 %result = fadd <4 x float> %addend, %loaded 227 ret <4 x float> %result 228} 229; MIPS32-LABEL: test_20 230; MIPS32: add.s 231; MIPS32: add.s 232; MIPS32: add.s 233; MIPS32: add.s 234 235define internal <4 x i32> @test_21(i32 %addr_i, <4 x i32> %addend) { 236entry: 237 %addr = inttoptr i32 %addr_i to <4 x i32>* 238 %loaded = load <4 x i32>, <4 x i32>* %addr, align 4 239 %result = add <4 x i32> %addend, %loaded 240 ret <4 x i32> %result 241} 242; MIPS32-LABEL: test_21 243; MIPS32: add 244; MIPS32: add 245; MIPS32: add 246; MIPS32: add 247