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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *
4  * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
5  *
6  * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
7  */
8 
9 #include <common.h>
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/clock.h>
12 
mx31_uart1_hw_init(void)13 void mx31_uart1_hw_init(void)
14 {
15 	/* setup pins for UART1 */
16 	mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
17 	mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
18 	mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
19 	mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
20 }
21 
mx31_uart2_hw_init(void)22 void mx31_uart2_hw_init(void)
23 {
24 	/* setup pins for UART2 */
25 	mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
26 	mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
27 	mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
28 	mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
29 }
30 
31 #ifdef CONFIG_MXC_SPI
32 /*
33  * Note: putting several spi setups here makes no sense as they may differ
34  * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
35  */
mx31_spi2_hw_init(void)36 void mx31_spi2_hw_init(void)
37 {
38 	/* SPI2 */
39 	mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
40 	mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
41 	mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
42 	mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
43 	mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
44 	mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
45 	mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
46 
47 	/* start SPI2 clock */
48 	__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
49 }
50 #endif
51