1/* 2 * Device Tree file for Marvell Armada XP theadorable board 3 * 4 * Copyright (C) 2013-2014 Marvell 5 * 6 * Lior Amsalem <alior@marvell.com> 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9 * 10 * This file is dual-licensed: you can use it either under the terms 11 * of the GPL or the X11 license, at your option. Note that this dual 12 * licensing only applies to this file, and not this project as a 13 * whole. 14 * 15 * a) This file is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of the 18 * License, or (at your option) any later version. 19 * 20 * This file is distributed in the hope that it will be useful 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * Or, alternatively 26 * 27 * b) Permission is hereby granted, free of charge, to any person 28 * obtaining a copy of this software and associated documentation 29 * files (the "Software"), to deal in the Software without 30 * restriction, including without limitation the rights to use 31 * copy, modify, merge, publish, distribute, sublicense, and/or 32 * sell copies of the Software, and to permit persons to whom the 33 * Software is furnished to do so, subject to the following 34 * conditions: 35 * 36 * The above copyright notice and this permission notice shall be 37 * included in all copies or substantial portions of the Software. 38 * 39 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 40 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 41 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 42 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 43 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 44 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 45 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 46 * OTHER DEALINGS IN THE SOFTWARE. 47 * 48 * Note: this Device Tree assumes that the bootloader has remapped the 49 * internal registers to 0xf1000000 (instead of the default 50 * 0xd0000000). The 0xf1000000 is the default used by the recent, 51 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 52 * boards were delivered with an older version of the bootloader that 53 * left internal registers mapped at 0xd0000000. If you are in this 54 * situation, you should either update your bootloader (preferred 55 * solution) or the below Device Tree should be adjusted. 56 */ 57 58/dts-v1/; 59#include <dt-bindings/gpio/gpio.h> 60#include "armada-xp-mv78260.dtsi" 61 62/ { 63 model = "Marvell Armada XP theadorable"; 64 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; 65 66 chosen { 67 stdout-path = "serial0:115200n8"; 68 }; 69 70 aliases { 71 spi0 = &spi0; 72 spi1 = &spi1; 73 ethernet0 = ð0; 74 }; 75 76 memory { 77 device_type = "memory"; 78 reg = <0x00000000 0x00000000 0x00000000 0x80000000>; 79 }; 80 81 soc { 82 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 83 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 84 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; 85 86 internal-regs { 87 serial@12000 { 88 status = "okay"; 89 u-boot,dm-pre-reloc; 90 }; 91 92 serial@12100 { 93 status = "okay"; 94 }; 95 96 serial@12200 { 97 status = "okay"; 98 }; 99 100 serial@12300 { 101 status = "okay"; 102 }; 103 104 sata@a0000 { 105 nr-ports = <2>; 106 status = "okay"; 107 }; 108 109 mdio { 110 phy0: ethernet-phy@0 { 111 reg = <0>; 112 }; 113 }; 114 115 ethernet@70000 { 116 status = "okay"; 117 phy = <&phy0>; 118 phy-mode = "sgmii"; 119 }; 120 121 usb@50000 { 122 status = "okay"; 123 }; 124 125 usb@51000 { 126 status = "okay"; 127 }; 128 129 spi0: spi@10600 { 130 status = "okay"; 131 u-boot,dm-pre-reloc; 132 133 spi-flash@0 { 134 u-boot,dm-pre-reloc; 135 #address-cells = <1>; 136 #size-cells = <1>; 137 compatible = "n25q128a13", "jedec,spi-nor"; 138 reg = <0>; /* Chip select 0 */ 139 spi-max-frequency = <27777777>; 140 }; 141 142 fpga@1 { 143 #address-cells = <1>; 144 #size-cells = <1>; 145 compatible = "spi-generic-device"; 146 reg = <1>; /* Chip select 1 */ 147 spi-max-frequency = <27777777>; 148 }; 149 }; 150 151 spi1: spi@10680 { 152 status = "okay"; 153 154 fpga@2 { 155 #address-cells = <1>; 156 #size-cells = <1>; 157 compatible = "spi-generic-device"; 158 reg = <2>; /* Chip select 2 */ 159 spi-max-frequency = <27777777>; 160 }; 161 }; 162 }; 163 }; 164}; 165