1#include <dt-bindings/clock/ast2500-scu.h> 2#include <dt-bindings/reset/ast2500-reset.h> 3 4#include "ast2500.dtsi" 5 6/ { 7 scu: clock-controller@1e6e2000 { 8 compatible = "aspeed,ast2500-scu"; 9 reg = <0x1e6e2000 0x1000>; 10 u-boot,dm-pre-reloc; 11 #clock-cells = <1>; 12 #reset-cells = <1>; 13 }; 14 15 rst: reset-controller { 16 u-boot,dm-pre-reloc; 17 compatible = "aspeed,ast2500-reset"; 18 aspeed,wdt = <&wdt1>; 19 #reset-cells = <1>; 20 }; 21 22 sdrammc: sdrammc@1e6e0000 { 23 u-boot,dm-pre-reloc; 24 compatible = "aspeed,ast2500-sdrammc"; 25 reg = <0x1e6e0000 0x174 26 0x1e6e0200 0x1d4 >; 27 #reset-cells = <1>; 28 clocks = <&scu PLL_MPLL>; 29 resets = <&rst AST_RESET_SDRAM>; 30 }; 31 32 ahb { 33 u-boot,dm-pre-reloc; 34 35 apb { 36 u-boot,dm-pre-reloc; 37 }; 38 39 }; 40}; 41 42&uart1 { 43 clocks = <&scu PCLK_UART1>; 44}; 45 46&uart2 { 47 clocks = <&scu PCLK_UART2>; 48}; 49 50&uart3 { 51 clocks = <&scu PCLK_UART3>; 52}; 53 54&uart4 { 55 clocks = <&scu PCLK_UART4>; 56}; 57 58&uart5 { 59 clocks = <&scu PCLK_UART5>; 60}; 61 62&timer { 63 u-boot,dm-pre-reloc; 64}; 65 66&mac0 { 67 clocks = <&scu PCLK_MAC1>, <&scu PLL_D2PLL>; 68}; 69 70&mac1 { 71 clocks = <&scu PCLK_MAC2>, <&scu PLL_D2PLL>; 72}; 73