• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2.  This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/omap.h>
9
10/ {
11	compatible = "ti,dm816";
12	interrupt-parent = <&intc>;
13	#address-cells = <1>;
14	#size-cells = <1>;
15	chosen { };
16
17	aliases {
18		i2c0 = &i2c1;
19		i2c1 = &i2c2;
20		serial0 = &uart1;
21		serial1 = &uart2;
22		serial2 = &uart3;
23		ethernet0 = &eth0;
24		ethernet1 = &eth1;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30		cpu@0 {
31			compatible = "arm,cortex-a8";
32			device_type = "cpu";
33			reg = <0>;
34		};
35	};
36
37	pmu {
38		compatible = "arm,cortex-a8-pmu";
39		interrupts = <3>;
40	};
41
42	/*
43	 * The soc node represents the soc top level view. It is used for IPs
44	 * that are not memory mapped in the MPU view or for the MPU itself.
45	 */
46	soc {
47		compatible = "ti,omap-infra";
48		mpu {
49			compatible = "ti,omap3-mpu";
50			ti,hwmods = "mpu";
51		};
52	};
53
54	/*
55	 * XXX: Use a flat representation of the dm816x interconnect.
56	 * The real dm816x interconnect network is quite complex. Since
57	 * it will not bring real advantage to represent that in DT
58	 * for the moment, just use a fake OCP bus entry to represent
59	 * the whole bus hierarchy.
60	 */
61	ocp {
62		compatible = "simple-bus";
63		reg = <0x44000000 0x10000>;
64		interrupts = <9 10>;
65		#address-cells = <1>;
66		#size-cells = <1>;
67		ranges;
68
69		prcm: prcm@48180000 {
70			compatible = "ti,dm816-prcm";
71			reg = <0x48180000 0x4000>;
72
73			prcm_clocks: clocks {
74				#address-cells = <1>;
75				#size-cells = <0>;
76			};
77
78			prcm_clockdomains: clockdomains {
79			};
80		};
81
82		scrm: scrm@48140000 {
83			compatible = "ti,dm816-scrm", "simple-bus";
84			reg = <0x48140000 0x21000>;
85			#address-cells = <1>;
86			#size-cells = <1>;
87			#pinctrl-cells = <1>;
88			ranges = <0 0x48140000 0x21000>;
89
90			dm816x_pinmux: pinmux@800 {
91				compatible = "pinctrl-single";
92				reg = <0x800 0x50a>;
93				#address-cells = <1>;
94				#size-cells = <0>;
95				#pinctrl-cells = <1>;
96				pinctrl-single,register-width = <16>;
97				pinctrl-single,function-mask = <0xf>;
98			};
99
100			/* Device Configuration Registers */
101			scm_conf: syscon@600 {
102				compatible = "syscon", "simple-bus";
103				reg = <0x600 0x110>;
104				#address-cells = <1>;
105				#size-cells = <1>;
106				ranges = <0 0x600 0x110>;
107
108				usb_phy0: usb-phy@20 {
109					compatible = "ti,dm8168-usb-phy";
110					reg = <0x20 0x8>;
111					reg-names = "phy";
112					clocks = <&main_fapll 6>;
113					clock-names = "refclk";
114					#phy-cells = <0>;
115					syscon = <&scm_conf>;
116				};
117
118				usb_phy1: usb-phy@28 {
119					compatible = "ti,dm8168-usb-phy";
120					reg = <0x28 0x8>;
121					reg-names = "phy";
122					clocks = <&main_fapll 6>;
123					clock-names = "refclk";
124					#phy-cells = <0>;
125					syscon = <&scm_conf>;
126				};
127			};
128
129			scrm_clocks: clocks {
130				#address-cells = <1>;
131				#size-cells = <0>;
132			};
133
134			scrm_clockdomains: clockdomains {
135			};
136		};
137
138		edma: edma@49000000 {
139			compatible = "ti,edma3";
140			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
141			reg =   <0x49000000 0x10000>,
142			        <0x44e10f90 0x40>;
143			interrupts = <12 13 14>;
144			#dma-cells = <1>;
145		};
146
147		elm: elm@48080000 {
148			compatible = "ti,816-elm";
149			ti,hwmods = "elm";
150			reg = <0x48080000 0x2000>;
151			interrupts = <4>;
152		};
153
154		gpio1: gpio@48032000 {
155			compatible = "ti,omap4-gpio";
156			ti,hwmods = "gpio1";
157			ti,gpio-always-on;
158			reg = <0x48032000 0x1000>;
159			interrupts = <96>;
160			gpio-controller;
161			#gpio-cells = <2>;
162			interrupt-controller;
163			#interrupt-cells = <2>;
164		};
165
166		gpio2: gpio@4804c000 {
167			compatible = "ti,omap4-gpio";
168			ti,hwmods = "gpio2";
169			ti,gpio-always-on;
170			reg = <0x4804c000 0x1000>;
171			interrupts = <98>;
172			gpio-controller;
173			#gpio-cells = <2>;
174			interrupt-controller;
175			#interrupt-cells = <2>;
176		};
177
178		gpmc: gpmc@50000000 {
179			compatible = "ti,am3352-gpmc";
180			ti,hwmods = "gpmc";
181			reg = <0x50000000 0x2000>;
182			#address-cells = <2>;
183			#size-cells = <1>;
184			interrupts = <100>;
185			dmas = <&edma 52>;
186			dma-names = "rxtx";
187			gpmc,num-cs = <6>;
188			gpmc,num-waitpins = <2>;
189			interrupt-controller;
190			#interrupt-cells = <2>;
191			gpio-controller;
192			#gpio-cells = <2>;
193		};
194
195		i2c1: i2c@48028000 {
196			compatible = "ti,omap4-i2c";
197			ti,hwmods = "i2c1";
198			reg = <0x48028000 0x1000>;
199			#address-cells = <1>;
200			#size-cells = <0>;
201			interrupts = <70>;
202			dmas = <&edma 58 &edma 59>;
203			dma-names = "tx", "rx";
204		};
205
206		i2c2: i2c@4802a000 {
207			compatible = "ti,omap4-i2c";
208			ti,hwmods = "i2c2";
209			reg = <0x4802a000 0x1000>;
210			#address-cells = <1>;
211			#size-cells = <0>;
212			interrupts = <71>;
213			dmas = <&edma 60 &edma 61>;
214			dma-names = "tx", "rx";
215		};
216
217		intc: interrupt-controller@48200000 {
218			compatible = "ti,dm816-intc";
219			interrupt-controller;
220			#interrupt-cells = <1>;
221			reg = <0x48200000 0x1000>;
222		};
223
224		rtc: rtc@480c0000 {
225			compatible = "ti,am3352-rtc", "ti,da830-rtc";
226			reg = <0x480c0000 0x1000>;
227			interrupts = <75 76>;
228			ti,hwmods = "rtc";
229		};
230
231		mailbox: mailbox@480c8000 {
232			compatible = "ti,omap4-mailbox";
233			reg = <0x480c8000 0x2000>;
234			interrupts = <77>;
235			ti,hwmods = "mailbox";
236			#mbox-cells = <1>;
237			ti,mbox-num-users = <4>;
238			ti,mbox-num-fifos = <12>;
239			mbox_dsp: mbox_dsp {
240				ti,mbox-tx = <3 0 0>;
241				ti,mbox-rx = <0 0 0>;
242			};
243		};
244
245		spinbox: spinbox@480ca000 {
246			compatible = "ti,omap4-hwspinlock";
247			reg = <0x480ca000 0x2000>;
248			ti,hwmods = "spinbox";
249			#hwlock-cells = <1>;
250		};
251
252		mdio: mdio@4a100800 {
253			compatible = "ti,davinci_mdio";
254			#address-cells = <1>;
255			#size-cells = <0>;
256			reg = <0x4a100800 0x100>;
257			ti,hwmods = "davinci_mdio";
258			bus_freq = <1000000>;
259			phy0: ethernet-phy@0 {
260				reg = <1>;
261			};
262			phy1: ethernet-phy@1 {
263				reg = <2>;
264			};
265		};
266
267		eth0: ethernet@4a100000 {
268			compatible = "ti,dm816-emac";
269			ti,hwmods = "emac0";
270			reg = <0x4a100000 0x800
271			       0x4a100900 0x3700>;
272			clocks = <&sysclk24_ck>;
273			syscon = <&scm_conf>;
274			ti,davinci-ctrl-reg-offset = <0>;
275			ti,davinci-ctrl-mod-reg-offset = <0x900>;
276			ti,davinci-ctrl-ram-offset = <0x2000>;
277			ti,davinci-ctrl-ram-size = <0x2000>;
278			interrupts = <40 41 42 43>;
279			phy-handle = <&phy0>;
280		};
281
282		eth1: ethernet@4a120000 {
283			compatible = "ti,dm816-emac";
284			ti,hwmods = "emac1";
285			reg = <0x4a120000 0x4000>;
286			clocks = <&sysclk24_ck>;
287			syscon = <&scm_conf>;
288			ti,davinci-ctrl-reg-offset = <0>;
289			ti,davinci-ctrl-mod-reg-offset = <0x900>;
290			ti,davinci-ctrl-ram-offset = <0x2000>;
291			ti,davinci-ctrl-ram-size = <0x2000>;
292			interrupts = <44 45 46 47>;
293			phy-handle = <&phy1>;
294		};
295
296		mcspi1: spi@48030000 {
297			compatible = "ti,omap4-mcspi";
298			reg = <0x48030000 0x1000>;
299			#address-cells = <1>;
300			#size-cells = <0>;
301			interrupts = <65>;
302			ti,spi-num-cs = <4>;
303			ti,hwmods = "mcspi1";
304			dmas = <&edma 16 &edma 17
305				&edma 18 &edma 19
306				&edma 20 &edma 21
307				&edma 22 &edma 23>;
308			dma-names = "tx0", "rx0", "tx1", "rx1",
309				    "tx2", "rx2", "tx3", "rx3";
310		};
311
312		mmc1: mmc@48060000 {
313			compatible = "ti,omap4-hsmmc";
314			reg = <0x48060000 0x11000>;
315			ti,hwmods = "mmc1";
316			interrupts = <64>;
317			dmas = <&edma 24 &edma 25>;
318			dma-names = "tx", "rx";
319		};
320
321		timer1: timer@4802e000 {
322			compatible = "ti,dm816-timer";
323			reg = <0x4802e000 0x2000>;
324			interrupts = <67>;
325			ti,hwmods = "timer1";
326			ti,timer-alwon;
327		};
328
329		timer2: timer@48040000 {
330			compatible = "ti,dm816-timer";
331			reg = <0x48040000 0x2000>;
332			interrupts = <68>;
333			ti,hwmods = "timer2";
334		};
335
336		timer3: timer@48042000 {
337			compatible = "ti,dm816-timer";
338			reg = <0x48042000 0x2000>;
339			interrupts = <69>;
340			ti,hwmods = "timer3";
341		};
342
343		timer4: timer@48044000 {
344			compatible = "ti,dm816-timer";
345			reg = <0x48044000 0x2000>;
346			interrupts = <92>;
347			ti,hwmods = "timer4";
348			ti,timer-pwm;
349		};
350
351		timer5: timer@48046000 {
352			compatible = "ti,dm816-timer";
353			reg = <0x48046000 0x2000>;
354			interrupts = <93>;
355			ti,hwmods = "timer5";
356			ti,timer-pwm;
357		};
358
359		timer6: timer@48048000 {
360			compatible = "ti,dm816-timer";
361			reg = <0x48048000 0x2000>;
362			interrupts = <94>;
363			ti,hwmods = "timer6";
364			ti,timer-pwm;
365		};
366
367		timer7: timer@4804a000 {
368			compatible = "ti,dm816-timer";
369			reg = <0x4804a000 0x2000>;
370			interrupts = <95>;
371			ti,hwmods = "timer7";
372			ti,timer-pwm;
373		};
374
375		uart1: uart@48020000 {
376			compatible = "ti,am3352-uart", "ti,omap3-uart";
377			ti,hwmods = "uart1";
378			reg = <0x48020000 0x2000>;
379			clock-frequency = <48000000>;
380			interrupts = <72>;
381			dmas = <&edma 26 &edma 27>;
382			dma-names = "tx", "rx";
383		};
384
385		uart2: uart@48022000 {
386			compatible = "ti,am3352-uart", "ti,omap3-uart";
387			ti,hwmods = "uart2";
388			reg = <0x48022000 0x2000>;
389			clock-frequency = <48000000>;
390			interrupts = <73>;
391			dmas = <&edma 28 &edma 29>;
392			dma-names = "tx", "rx";
393		};
394
395		uart3: uart@48024000 {
396			compatible = "ti,am3352-uart", "ti,omap3-uart";
397			ti,hwmods = "uart3";
398			reg = <0x48024000 0x2000>;
399			clock-frequency = <48000000>;
400			interrupts = <74>;
401			dmas = <&edma 30 &edma 31>;
402			dma-names = "tx", "rx";
403		};
404
405		/* NOTE: USB needs a transceiver driver for phys to work */
406		usb: usb_otg_hs@47401000 {
407			compatible = "ti,am33xx-usb";
408			reg = <0x47401000 0x400000>;
409			ranges;
410			#address-cells = <1>;
411			#size-cells = <1>;
412			ti,hwmods = "usb_otg_hs";
413
414			usb0: usb@47401000 {
415				compatible = "ti,musb-dm816";
416				reg = <0x47401400 0x400
417				       0x47401000 0x200>;
418				reg-names = "mc", "control";
419				interrupts = <18>;
420				interrupt-names = "mc";
421				dr_mode = "host";
422				interface-type = <0>;
423				phys = <&usb_phy0>;
424				phy-names = "usb2-phy";
425				mentor,multipoint = <1>;
426				mentor,num-eps = <16>;
427				mentor,ram-bits = <12>;
428				mentor,power = <500>;
429
430				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
431					&cppi41dma  2 0 &cppi41dma  3 0
432					&cppi41dma  4 0 &cppi41dma  5 0
433					&cppi41dma  6 0 &cppi41dma  7 0
434					&cppi41dma  8 0 &cppi41dma  9 0
435					&cppi41dma 10 0 &cppi41dma 11 0
436					&cppi41dma 12 0 &cppi41dma 13 0
437					&cppi41dma 14 0 &cppi41dma  0 1
438					&cppi41dma  1 1 &cppi41dma  2 1
439					&cppi41dma  3 1 &cppi41dma  4 1
440					&cppi41dma  5 1 &cppi41dma  6 1
441					&cppi41dma  7 1 &cppi41dma  8 1
442					&cppi41dma  9 1 &cppi41dma 10 1
443					&cppi41dma 11 1 &cppi41dma 12 1
444					&cppi41dma 13 1 &cppi41dma 14 1>;
445				dma-names =
446					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
447					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
448					"rx14", "rx15",
449					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
450					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
451					"tx14", "tx15";
452			};
453
454			usb1: usb@47401800 {
455				compatible = "ti,musb-dm816";
456				reg = <0x47401c00 0x400
457				       0x47401800 0x200>;
458				reg-names = "mc", "control";
459				interrupts = <19>;
460				interrupt-names = "mc";
461				dr_mode = "host";
462				interface-type = <0>;
463				phys = <&usb_phy1>;
464				phy-names = "usb2-phy";
465				mentor,multipoint = <1>;
466				mentor,num-eps = <16>;
467				mentor,ram-bits = <12>;
468				mentor,power = <500>;
469
470				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
471					&cppi41dma 17 0 &cppi41dma 18 0
472					&cppi41dma 19 0 &cppi41dma 20 0
473					&cppi41dma 21 0 &cppi41dma 22 0
474					&cppi41dma 23 0 &cppi41dma 24 0
475					&cppi41dma 25 0 &cppi41dma 26 0
476					&cppi41dma 27 0 &cppi41dma 28 0
477					&cppi41dma 29 0 &cppi41dma 15 1
478					&cppi41dma 16 1 &cppi41dma 17 1
479					&cppi41dma 18 1 &cppi41dma 19 1
480					&cppi41dma 20 1 &cppi41dma 21 1
481					&cppi41dma 22 1 &cppi41dma 23 1
482					&cppi41dma 24 1 &cppi41dma 25 1
483					&cppi41dma 26 1 &cppi41dma 27 1
484					&cppi41dma 28 1 &cppi41dma 29 1>;
485				dma-names =
486					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
487					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
488					"rx14", "rx15",
489					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
490					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
491					"tx14", "tx15";
492			};
493
494			cppi41dma: dma-controller@47402000 {
495				compatible = "ti,am3359-cppi41";
496				reg =  <0x47400000 0x1000
497					0x47402000 0x1000
498					0x47403000 0x1000
499					0x47404000 0x4000>;
500				reg-names = "glue", "controller", "scheduler", "queuemgr";
501				interrupts = <17>;
502				interrupt-names = "glue";
503				#dma-cells = <2>;
504				#dma-channels = <30>;
505				#dma-requests = <256>;
506			};
507		};
508
509		wd_timer2: wd_timer@480c2000 {
510			compatible = "ti,omap3-wdt";
511			ti,hwmods = "wd_timer";
512			reg = <0x480c2000 0x1000>;
513			interrupts = <0>;
514		};
515	};
516};
517
518#include "dm816x-clocks.dtsi"
519