1// SPDX-License-Identifier: GPL-2.0+ OR X11 2/* 3 * Device Tree Include file for Freescale Layerscape-1043A family SoC. 4 * 5 * Copyright (C) 2015, Freescale Semiconductor 6 * 7 * Mingkai Hu <Mingkai.hu@freescale.com> 8 */ 9 10/dts-v1/; 11/include/ "fsl-ls1043a.dtsi" 12 13/ { 14 model = "LS1043A RDB Board"; 15 16 aliases { 17 spi1 = &dspi0; 18 }; 19 20}; 21 22&dspi0 { 23 bus-num = <0>; 24 status = "okay"; 25 26 dspiflash: n25q12a { 27 #address-cells = <1>; 28 #size-cells = <1>; 29 compatible = "spi-flash"; 30 reg = <0>; 31 spi-max-frequency = <1000000>; /* input clock */ 32 }; 33 34}; 35 36&i2c0 { 37 status = "okay"; 38 ina220@40 { 39 compatible = "ti,ina220"; 40 reg = <0x40>; 41 shunt-resistor = <1000>; 42 }; 43 adt7461a@4c { 44 compatible = "adi,adt7461a"; 45 reg = <0x4c>; 46 }; 47 eeprom@52 { 48 compatible = "at24,24c512"; 49 reg = <0x52>; 50 }; 51 52 eeprom@53 { 53 compatible = "at24,24c512"; 54 reg = <0x53>; 55 }; 56 57 rtc@68 { 58 compatible = "pericom,pt7c4338"; 59 reg = <0x68>; 60 }; 61}; 62 63&ifc { 64 status = "okay"; 65 #address-cells = <2>; 66 #size-cells = <1>; 67 /* NOR, NAND Flashes and FPGA on board */ 68 ranges = <0x0 0x0 0x0 0x60000000 0x08000000 69 0x1 0x0 0x0 0x7e800000 0x00010000 70 0x2 0x0 0x0 0x7fb00000 0x00000100>; 71 72 nor@0,0 { 73 compatible = "cfi-flash"; 74 #address-cells = <1>; 75 #size-cells = <1>; 76 reg = <0x0 0x0 0x8000000>; 77 bank-width = <2>; 78 device-width = <1>; 79 }; 80 81 nand@1,0 { 82 compatible = "fsl,ifc-nand"; 83 #address-cells = <1>; 84 #size-cells = <1>; 85 reg = <0x1 0x0 0x10000>; 86 }; 87 88 cpld: board-control@2,0 { 89 compatible = "fsl,ls1043ardb-cpld"; 90 reg = <0x2 0x0 0x0000100>; 91 }; 92}; 93 94&duart0 { 95 status = "okay"; 96}; 97 98&duart1 { 99 status = "okay"; 100}; 101