1/* 2 * Copyright (C) 2015 Altera Corporation <www.altera.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi" 18 19/ { 20 model = "Altera SOCFPGA Arria 10"; 21 compatible = "altr,socfpga-arria10", "altr,socfpga"; 22 23 aliases { 24 ethernet0 = &gmac0; 25 serial0 = &uart1; 26 }; 27 28 chosen { 29 bootargs = "earlyprintk"; 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 memory@0 { 34 name = "memory"; 35 device_type = "memory"; 36 reg = <0x0 0x40000000>; /* 1GB */ 37 }; 38 39 a10leds { 40 compatible = "gpio-leds"; 41 42 a10sr_led0 { 43 label = "a10sr-led0"; 44 gpios = <&a10sr_gpio 0 1>; 45 }; 46 47 a10sr_led1 { 48 label = "a10sr-led1"; 49 gpios = <&a10sr_gpio 1 1>; 50 }; 51 52 a10sr_led2 { 53 label = "a10sr-led2"; 54 gpios = <&a10sr_gpio 2 1>; 55 }; 56 57 a10sr_led3 { 58 label = "a10sr-led3"; 59 gpios = <&a10sr_gpio 3 1>; 60 }; 61 }; 62 63 soc { 64 u-boot,dm-pre-reloc; 65 }; 66}; 67 68&gmac0 { 69 phy-mode = "rgmii"; 70 phy-addr = <0xffffffff>; /* probe for phy addr */ 71 72 /* 73 * These skews assume the user's FPGA design is adding 600ps of delay 74 * for TX_CLK on Arria 10. 75 * 76 * All skews are offset since hardware skew values for the ksz9031 77 * range from a negative skew to a positive skew. 78 * See the micrel-ksz90x1.txt Documentation file for details. 79 */ 80 txd0-skew-ps = <0>; /* -420ps */ 81 txd1-skew-ps = <0>; /* -420ps */ 82 txd2-skew-ps = <0>; /* -420ps */ 83 txd3-skew-ps = <0>; /* -420ps */ 84 rxd0-skew-ps = <420>; /* 0ps */ 85 rxd1-skew-ps = <420>; /* 0ps */ 86 rxd2-skew-ps = <420>; /* 0ps */ 87 rxd3-skew-ps = <420>; /* 0ps */ 88 txen-skew-ps = <0>; /* -420ps */ 89 txc-skew-ps = <1860>; /* 960ps */ 90 rxdv-skew-ps = <420>; /* 0ps */ 91 rxc-skew-ps = <1680>; /* 780ps */ 92 max-frame-size = <3800>; 93 status = "okay"; 94}; 95 96&gpio1 { 97 status = "okay"; 98}; 99 100&spi1 { 101 status = "okay"; 102 103 resource-manager@0 { 104 compatible = "altr,a10sr"; 105 reg = <0>; 106 spi-max-frequency = <100000>; 107 /* low-level active IRQ at GPIO1_5 */ 108 interrupt-parent = <&portb>; 109 interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 110 interrupt-controller; 111 #interrupt-cells = <2>; 112 113 a10sr_gpio: gpio-controller { 114 compatible = "altr,a10sr-gpio"; 115 gpio-controller; 116 #gpio-cells = <2>; 117 }; 118 119 a10sr_rst: reset-controller { 120 compatible = "altr,a10sr-reset"; 121 #reset-cells = <1>; 122 }; 123 }; 124}; 125 126&i2c1 { 127 status = "okay"; 128 129 /* 130 * adjust the falling times to decrease the i2c frequency to 50Khz 131 * because the LCD module does not work at the standard 100Khz 132 */ 133 clock-frequency = <100000>; 134 i2c-sda-falling-time-ns = <6000>; 135 i2c-scl-falling-time-ns = <6000>; 136 137 eeprom@51 { 138 compatible = "atmel,24c32"; 139 reg = <0x51>; 140 pagesize = <32>; 141 }; 142 143 rtc@68 { 144 compatible = "dallas,ds1339"; 145 reg = <0x68>; 146 }; 147 148 ltc@5c { 149 compatible = "ltc2977"; 150 reg = <0x5c>; 151 }; 152}; 153 154&uart1 { 155 clock-frequency = <50000000>; 156 u-boot,dm-pre-reloc; 157 status = "okay"; 158}; 159 160&usb0 { 161 status = "okay"; 162 disable-over-current; 163}; 164 165&watchdog1 { 166 status = "okay"; 167}; 168