1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * LPC32xx GPIO interface 4 * 5 * (C) Copyright 2014 DENX Software Engineering GmbH 6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 7 */ 8 9 /** 10 * GPIO Register map for LPC32xx 11 */ 12 13 struct gpio_regs { 14 u32 p3_inp_state; 15 u32 p3_outp_set; 16 u32 p3_outp_clr; 17 u32 p3_outp_state; 18 /* Watch out! the following are shared between p2 and p3 */ 19 u32 p2_p3_dir_set; 20 u32 p2_p3_dir_clr; 21 u32 p2_p3_dir_state; 22 /* Now back to 'one register for one port' */ 23 u32 p2_inp_state; 24 u32 p2_outp_set; 25 u32 p2_outp_clr; 26 u32 reserved1[6]; 27 u32 p0_inp_state; 28 u32 p0_outp_set; 29 u32 p0_outp_clr; 30 u32 p0_outp_state; 31 u32 p0_dir_set; 32 u32 p0_dir_clr; 33 u32 p0_dir_state; 34 u32 reserved2; 35 u32 p1_inp_state; 36 u32 p1_outp_set; 37 u32 p1_outp_clr; 38 u32 p1_outp_state; 39 u32 p1_dir_set; 40 u32 p1_dir_clr; 41 u32 p1_dir_state; 42 }; 43