1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2012 Samsung Electronics 4 */ 5 6 #ifndef __TZPC_H_ 7 #define __TZPC_H_ 8 9 #ifndef __ASSEMBLY__ 10 struct exynos_tzpc { 11 unsigned int r0size; 12 char res1[0x7FC]; 13 unsigned int decprot0stat; 14 unsigned int decprot0set; 15 unsigned int decprot0clr; 16 unsigned int decprot1stat; 17 unsigned int decprot1set; 18 unsigned int decprot1clr; 19 unsigned int decprot2stat; 20 unsigned int decprot2set; 21 unsigned int decprot2clr; 22 unsigned int decprot3stat; 23 unsigned int decprot3set; 24 unsigned int decprot3clr; 25 char res2[0x7B0]; 26 unsigned int periphid0; 27 unsigned int periphid1; 28 unsigned int periphid2; 29 unsigned int periphid3; 30 unsigned int pcellid0; 31 unsigned int pcellid1; 32 unsigned int pcellid2; 33 unsigned int pcellid3; 34 }; 35 36 #define EXYNOS4_NR_TZPC_BANKS 6 37 #define EXYNOS5_NR_TZPC_BANKS 10 38 39 /* TZPC : Register Offsets */ 40 #define TZPC_BASE_OFFSET 0x10000 41 42 /* 43 * TZPC Register Value : 44 * R0SIZE: 0x0 : Size of secured ram 45 */ 46 #define R0SIZE 0x0 47 48 /* 49 * TZPC Decode Protection Register Value : 50 * DECPROTXSET: 0xFF : Set Decode region to non-secure 51 */ 52 #define DECPROTXSET 0xFF 53 void tzpc_init(void); 54 55 #endif 56 57 #endif 58