1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016 Stefan Roese <sr@denx.de> 4 */ 5 6 #include <common.h> 7 #include <dm.h> 8 #include <fdtdec.h> 9 #include <linux/libfdt.h> 10 #include <pci.h> 11 #include <asm/io.h> 12 #include <asm/system.h> 13 #include <asm/arch/cpu.h> 14 #include <asm/arch/soc.h> 15 #include <asm/armv8/mmu.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 /* 20 * Not all memory is mapped in the MMU. So we need to restrict the 21 * memory size so that U-Boot does not try to access it. Also, the 22 * internal registers are located at 0xf000.0000 - 0xffff.ffff. 23 * Currently only 2GiB are mapped for system memory. This is what 24 * we pass to the U-Boot subsystem here. 25 */ 26 #define USABLE_RAM_SIZE 0x80000000 27 board_get_usable_ram_top(ulong total_size)28ulong board_get_usable_ram_top(ulong total_size) 29 { 30 if (gd->ram_size > USABLE_RAM_SIZE) 31 return USABLE_RAM_SIZE; 32 33 return gd->ram_size; 34 } 35 36 /* 37 * On ARMv8, MBus is not configured in U-Boot. To enable compilation 38 * of the already implemented drivers, lets add a dummy version of 39 * this function so that linking does not fail. 40 */ mvebu_mbus_dram_info(void)41const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) 42 { 43 return NULL; 44 } 45 46 /* DRAM init code ... */ 47 dram_init_banksize(void)48int dram_init_banksize(void) 49 { 50 fdtdec_setup_memory_banksize(); 51 52 return 0; 53 } 54 dram_init(void)55int dram_init(void) 56 { 57 if (fdtdec_setup_memory_size() != 0) 58 return -EINVAL; 59 60 return 0; 61 } 62 arch_cpu_init(void)63int arch_cpu_init(void) 64 { 65 /* Nothing to do (yet) */ 66 return 0; 67 } 68 arch_early_init_r(void)69int arch_early_init_r(void) 70 { 71 struct udevice *dev; 72 int ret; 73 int i; 74 75 /* 76 * Loop over all MISC uclass drivers to call the comphy code 77 * and init all CP110 devices enabled in the DT 78 */ 79 i = 0; 80 while (1) { 81 /* Call the comphy code via the MISC uclass driver */ 82 ret = uclass_get_device(UCLASS_MISC, i++, &dev); 83 84 /* We're done, once no further CP110 device is found */ 85 if (ret) 86 break; 87 } 88 89 /* Cause the SATA device to do its early init */ 90 uclass_first_device(UCLASS_AHCI, &dev); 91 92 #ifdef CONFIG_DM_PCI 93 /* Trigger PCIe devices detection */ 94 pci_init(); 95 #endif 96 97 return 0; 98 } 99