1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
4 */
5
6 /* Tegra vpr routines */
7
8 #include <common.h>
9 #include <asm/io.h>
10 #include <asm/arch/tegra.h>
11 #include <asm/arch/mc.h>
12
13 #include <fdt_support.h>
14
15 static bool _configured;
16
tegra_gpu_config(void)17 void tegra_gpu_config(void)
18 {
19 struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
20
21 /* Turn VPR off */
22 writel(0, &mc->mc_video_protect_size_mb);
23 writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
24 &mc->mc_video_protect_reg_ctrl);
25 /* read back to ensure the write went through */
26 readl(&mc->mc_video_protect_reg_ctrl);
27
28 debug("configured VPR\n");
29
30 _configured = true;
31 }
32
33 #if defined(CONFIG_OF_LIBFDT)
34
tegra_gpu_enable_node(void * blob,const char * compat)35 int tegra_gpu_enable_node(void *blob, const char *compat)
36 {
37 int offset;
38
39 if (!_configured)
40 return 0;
41
42 offset = fdt_node_offset_by_compatible(blob, -1, compat);
43 while (offset != -FDT_ERR_NOTFOUND) {
44 fdt_status_okay(blob, offset);
45 offset = fdt_node_offset_by_compatible(blob, offset, compat);
46 }
47
48 return 0;
49 }
50
51 #endif
52