1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2017 Socionext Inc. 4 */ 5 6 #include <linux/bitops.h> 7 #include <linux/io.h> 8 9 #include "../init.h" 10 #include "../sc64-regs.h" 11 12 #define SDCTRL_EMMC_HW_RESET 0x59810280 13 uniphier_pxs3_clk_init(void)14void uniphier_pxs3_clk_init(void) 15 { 16 u32 tmp; 17 18 tmp = readl(SC_RSTCTRL6); 19 tmp |= BIT(8); /* Mali */ 20 writel(tmp, SC_RSTCTRL6); 21 22 tmp = readl(SC_CLKCTRL6); 23 tmp |= BIT(8); /* Mali */ 24 writel(tmp, SC_CLKCTRL6); 25 26 /* TODO: use "mmc-pwrseq-emmc" */ 27 writel(1, SDCTRL_EMMC_HW_RESET); 28 } 29