1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2000-2002
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002 (440 port)
7 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
8 *
9 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
10 * Xianghua Xiao (X.Xiao@motorola.com)
11 *
12 * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port)
13 * Jeff Brown
14 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
15 */
16
17 #include <common.h>
18 #include <mpc86xx.h>
19 #include <command.h>
20 #include <asm/processor.h>
21 #ifdef CONFIG_POST
22 #include <post.h>
23 #endif
24
interrupt_init_cpu(unsigned * decrementer_count)25 void interrupt_init_cpu(unsigned *decrementer_count)
26 {
27 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
28 volatile ccsr_pic_t *pic = &immr->im_pic;
29
30 #ifdef CONFIG_POST
31 /*
32 * The POST word is stored in the PIC's TFRR register which gets
33 * cleared when the PIC is reset. Save it off so we can restore it
34 * later.
35 */
36 ulong post_word = post_word_load();
37 #endif
38
39 pic->gcr = MPC86xx_PICGCR_RST;
40 while (pic->gcr & MPC86xx_PICGCR_RST)
41 ;
42 pic->gcr = MPC86xx_PICGCR_MODE;
43
44 *decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
45 debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %d\n",
46 (get_tbclk() / 1000000),
47 *decrementer_count);
48
49 #ifdef CONFIG_INTERRUPTS
50
51 pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
52 debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1);
53
54 pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
55 debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2);
56
57 pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
58 debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3);
59
60 #if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
61 pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
62 debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8);
63 #endif
64 #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
65 pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
66 debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9);
67 #endif
68
69 pic->ctpr = 0; /* 40080 clear current task priority register */
70 #endif
71
72 #ifdef CONFIG_POST
73 post_word_store(post_word);
74 #endif
75 }
76
77 /*
78 * timer_interrupt - gets called when the decrementer overflows,
79 * with interrupts disabled.
80 * Trivial implementation - no need to be really accurate.
81 */
timer_interrupt_cpu(struct pt_regs * regs)82 void timer_interrupt_cpu(struct pt_regs *regs)
83 {
84 /* nothing to do here */
85 }
86
87 /*
88 * Install and free a interrupt handler. Not implemented yet.
89 */
irq_install_handler(int vec,interrupt_handler_t * handler,void * arg)90 void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
91 {
92 }
93
irq_free_handler(int vec)94 void irq_free_handler(int vec)
95 {
96 }
97
98 /*
99 * irqinfo - print information about PCI devices,not implemented.
100 */
do_irqinfo(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])101 int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
102 {
103 return 0;
104 }
105
106 /*
107 * Handle external interrupts
108 */
external_interrupt(struct pt_regs * regs)109 void external_interrupt(struct pt_regs *regs)
110 {
111 puts("external_interrupt (oops!)\n");
112 }
113