1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2014 Freescale Semiconductor
4 *
5 * Freescale T2080RDB board-specific CPLD controlling supports.
6 */
7
8 #include <common.h>
9 #include <command.h>
10 #include "cpld.h"
11
cpld_read(unsigned int reg)12 u8 cpld_read(unsigned int reg)
13 {
14 void *p = (void *)CONFIG_SYS_CPLD_BASE;
15
16 return in_8(p + reg);
17 }
18
cpld_write(unsigned int reg,u8 value)19 void cpld_write(unsigned int reg, u8 value)
20 {
21 void *p = (void *)CONFIG_SYS_CPLD_BASE;
22
23 out_8(p + reg, value);
24 }
25
26 /* Set the boot bank to the alternate bank */
cpld_set_altbank(void)27 void cpld_set_altbank(void)
28 {
29 u8 reg = CPLD_READ(flash_csr);
30
31 reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
32 CPLD_WRITE(flash_csr, reg);
33 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
34 }
35
36 /* Set the boot bank to the default bank */
cpld_set_defbank(void)37 void cpld_set_defbank(void)
38 {
39 u8 reg = CPLD_READ(flash_csr);
40
41 reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
42 CPLD_WRITE(flash_csr, reg);
43 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
44 }
45
do_cpld(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])46 int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
47 {
48 int rc = 0;
49
50 if (argc <= 1)
51 return cmd_usage(cmdtp);
52
53 if (strcmp(argv[1], "reset") == 0) {
54 if (strcmp(argv[2], "altbank") == 0)
55 cpld_set_altbank();
56 else
57 cpld_set_defbank();
58 } else {
59 rc = cmd_usage(cmdtp);
60 }
61
62 return rc;
63 }
64
65 U_BOOT_CMD(
66 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
67 "Reset the board or alternate bank",
68 "reset: reset to default bank\n"
69 "cpld reset altbank: reset to alternate bank\n"
70 );
71