1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017 DENX Software Engineering 4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5 */ 6 7 #ifndef __DISPL5_COMMON_H_ 8 #define __DISPL5_COMMON_H_ 9 10 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 11 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 12 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 13 14 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 15 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ 16 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 17 18 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 19 PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \ 20 PAD_CTL_DSE_40ohm | PAD_CTL_HYS) 21 22 #define SPI_PAD_CTRL (PAD_CTL_HYS | \ 23 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ 24 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 25 26 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 27 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 28 PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ 29 PAD_CTL_ODE | PAD_CTL_SRE_FAST) 30 31 #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ 32 PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 33 34 void displ5_set_iomux_uart_spl(void); 35 void displ5_set_iomux_uart(void); 36 void displ5_set_iomux_ecspi_spl(void); 37 void displ5_set_iomux_ecspi(void); 38 void displ5_set_iomux_usdhc_spl(void); 39 void displ5_set_iomux_usdhc(void); 40 void displ5_set_iomux_misc_spl(void); 41 42 #endif /* __DISPL5_COMMON_H_ */ 43