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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4  */
5 
6 #include <common.h>
7 #include <netdev.h>
8 #include <asm/io.h>
9 #include "vct.h"
10 
11 /*
12  * EBI initialization for SMC911x access
13  */
ebi_init_smc911x(void)14 int ebi_init_smc911x(void)
15 {
16 	reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020);
17 	reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
18 
19 	reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100);
20 	reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111);
21 
22 	reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000);
23 	reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
24 
25 	reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100);
26 	reg_write(EBI_DEV1_TIM1_WR2(EBI_BASE), 0x3FC21110);
27 
28 	return 0;
29 }
30 
31 /*
32  * Accessor functions replacing the "weak" functions in
33  * drivers/net/smc911x.c
34  */
smc911x_reg_read(struct eth_device * dev,u32 addr)35 u32 smc911x_reg_read(struct eth_device *dev, u32 addr)
36 {
37 	volatile u32 data;
38 
39 	addr += dev->iobase;
40 	reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
41 	ebi_wait();
42 	reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
43 	ebi_wait();
44 	data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
45 
46 	return (data);
47 }
48 
smc911x_reg_write(struct eth_device * dev,u32 addr,u32 data)49 void smc911x_reg_write(struct eth_device *dev, u32 addr, u32 data)
50 {
51 	addr += dev->iobase;
52 	reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
53 	ebi_wait();
54 	reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
55 	reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
56 		  EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
57 	ebi_wait();
58 }
59 
pkt_data_push(struct eth_device * dev,u32 addr,u32 data)60 void pkt_data_push(struct eth_device *dev, u32 addr, u32 data)
61 {
62 	addr += dev->iobase;
63 	reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
64 	ebi_wait();
65 	reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
66 	reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
67 		  EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
68 	ebi_wait();
69 
70 	return;
71 }
72 
pkt_data_pull(struct eth_device * dev,u32 addr)73 u32 pkt_data_pull(struct eth_device *dev, u32 addr)
74 {
75 	volatile u32 data;
76 
77 	addr += dev->iobase;
78 	reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
79 	ebi_wait();
80 	reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
81 	ebi_wait();
82 	data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
83 
84 	return data;
85 }
86 
board_eth_init(bd_t * bis)87 int board_eth_init(bd_t *bis)
88 {
89 	int rc = 0;
90 #ifdef CONFIG_SMC911X
91 	rc = smc911x_initialize(0, CONFIG_DRIVER_SMC911X_BASE);
92 #endif
93 	return rc;
94 }
95