1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * K2L EVM : Board initialization
4 *
5 * (C) Copyright 2014
6 * Texas Instruments Incorporated, <www.ti.com>
7 */
8
9 #include <common.h>
10 #include <asm/arch/ddr3.h>
11 #include <asm/arch/hardware.h>
12 #include <asm/ti-common/keystone_net.h>
13
get_external_clk(u32 clk)14 unsigned int get_external_clk(u32 clk)
15 {
16 unsigned int clk_freq;
17
18 switch (clk) {
19 case sys_clk:
20 clk_freq = 122880000;
21 break;
22 case alt_core_clk:
23 clk_freq = 100000000;
24 break;
25 case pa_clk:
26 clk_freq = 122880000;
27 break;
28 case tetris_clk:
29 clk_freq = 122880000;
30 break;
31 case ddr3a_clk:
32 clk_freq = 100000000;
33 break;
34 default:
35 clk_freq = 0;
36 break;
37 }
38
39 return clk_freq;
40 }
41
42 static struct pll_init_data core_pll_config[NUM_SPDS] = {
43 [SPD800] = CORE_PLL_799,
44 [SPD1000] = CORE_PLL_1000,
45 [SPD1200] = CORE_PLL_1198,
46 };
47
48 s16 divn_val[16] = {
49 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
50 };
51
52 static struct pll_init_data tetris_pll_config[] = {
53 [SPD800] = TETRIS_PLL_799,
54 [SPD1000] = TETRIS_PLL_1000,
55 [SPD1200] = TETRIS_PLL_1198,
56 [SPD1350] = TETRIS_PLL_1352,
57 [SPD1400] = TETRIS_PLL_1401,
58 };
59
60 static struct pll_init_data pa_pll_config =
61 PASS_PLL_983;
62
get_pll_init_data(int pll)63 struct pll_init_data *get_pll_init_data(int pll)
64 {
65 int speed;
66 struct pll_init_data *data;
67
68 switch (pll) {
69 case MAIN_PLL:
70 speed = get_max_dev_speed(speeds);
71 data = &core_pll_config[speed];
72 break;
73 case TETRIS_PLL:
74 speed = get_max_arm_speed(speeds);
75 data = &tetris_pll_config[speed];
76 break;
77 case PASS_PLL:
78 data = &pa_pll_config;
79 break;
80 default:
81 data = NULL;
82 }
83
84 return data;
85 }
86
87 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
88 struct eth_priv_t eth_priv_cfg[] = {
89 {
90 .int_name = "K2L_EMAC",
91 .rx_flow = 0,
92 .phy_addr = 0,
93 .slave_port = 1,
94 .sgmii_link_type = SGMII_LINK_MAC_PHY,
95 .phy_if = PHY_INTERFACE_MODE_SGMII,
96 },
97 {
98 .int_name = "K2L_EMAC1",
99 .rx_flow = 8,
100 .phy_addr = 1,
101 .slave_port = 2,
102 .sgmii_link_type = SGMII_LINK_MAC_PHY,
103 .phy_if = PHY_INTERFACE_MODE_SGMII,
104 },
105 {
106 .int_name = "K2L_EMAC2",
107 .rx_flow = 16,
108 .phy_addr = 2,
109 .slave_port = 3,
110 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
111 .phy_if = PHY_INTERFACE_MODE_SGMII,
112 },
113 {
114 .int_name = "K2L_EMAC3",
115 .rx_flow = 32,
116 .phy_addr = 3,
117 .slave_port = 4,
118 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
119 .phy_if = PHY_INTERFACE_MODE_SGMII,
120 },
121 };
122
get_num_eth_ports(void)123 int get_num_eth_ports(void)
124 {
125 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
126 }
127 #endif
128
129 #ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f(void)130 int board_early_init_f(void)
131 {
132 init_plls();
133
134 return 0;
135 }
136 #endif
137
138 #if defined(CONFIG_MULTI_DTB_FIT)
board_fit_config_name_match(const char * name)139 int board_fit_config_name_match(const char *name)
140 {
141 if (!strcmp(name, "keystone-k2l-evm"))
142 return 0;
143
144 return -1;
145 }
146 #endif
147
148 #ifdef CONFIG_SPL_BUILD
spl_init_keystone_plls(void)149 void spl_init_keystone_plls(void)
150 {
151 init_plls();
152 }
153 #endif
154