1Xilinx Zynq QSPI controller Device Tree Bindings 2------------------------------------------------- 3 4Required properties: 5- compatible : Should be "xlnx,zynq-qspi-1.0". 6- reg : Physical base address and size of QSPI registers map. 7- interrupts : Property with a value describing the interrupt 8 number. 9- interrupt-parent : Must be core interrupt controller 10- clock-names : List of input clock names - "ref_clk", "pclk" 11 (See clock bindings for details). 12- clocks : Clock phandles (see clock bindings for details). 13 14Optional properties: 15- num-cs : Number of chip selects used. 16 17Example: 18 qspi@e000d000 { 19 compatible = "xlnx,zynq-qspi-1.0"; 20 clock-names = "ref_clk", "pclk"; 21 clocks = <&clkc 10>, <&clkc 43>; 22 interrupt-parent = <&intc>; 23 interrupts = <0 19 4>; 24 num-cs = <1>; 25 reg = <0xe000d000 0x1000>; 26 } ; 27